cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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yenta_socket.c (40128B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Regular cardbus driver ("yenta_socket")
      4 *
      5 * (C) Copyright 1999, 2000 Linus Torvalds
      6 *
      7 * Changelog:
      8 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
      9 * 	Dynamically adjust the size of the bridge resource
     10 *
     11 * May 2003: Dominik Brodowski <linux@brodo.de>
     12 * 	Merge pci_socket.c and yenta.c into one file
     13 */
     14#include <linux/init.h>
     15#include <linux/pci.h>
     16#include <linux/workqueue.h>
     17#include <linux/interrupt.h>
     18#include <linux/delay.h>
     19#include <linux/module.h>
     20#include <linux/io.h>
     21#include <linux/slab.h>
     22
     23#include <pcmcia/ss.h>
     24
     25#include "yenta_socket.h"
     26#include "i82365.h"
     27
     28static bool disable_clkrun;
     29module_param(disable_clkrun, bool, 0444);
     30MODULE_PARM_DESC(disable_clkrun,
     31		 "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)");
     32
     33static bool isa_probe = 1;
     34module_param(isa_probe, bool, 0444);
     35MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
     36
     37static bool pwr_irqs_off;
     38module_param(pwr_irqs_off, bool, 0644);
     39MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
     40
     41static char o2_speedup[] = "default";
     42module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
     43MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
     44	"or 'default' (uses recommended behaviour for the detected bridge)");
     45
     46/*
     47 * Only probe "regular" interrupts, don't
     48 * touch dangerous spots like the mouse irq,
     49 * because there are mice that apparently
     50 * get really confused if they get fondled
     51 * too intimately.
     52 *
     53 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
     54 */
     55static u32 isa_interrupts = 0x0ef8;
     56
     57
     58#define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
     59
     60/* Don't ask.. */
     61#define to_cycles(ns)	((ns)/120)
     62#define to_ns(cycles)	((cycles)*120)
     63
     64/*
     65 * yenta PCI irq probing.
     66 * currently only used in the TI/EnE initialization code
     67 */
     68#ifdef CONFIG_YENTA_TI
     69static int yenta_probe_cb_irq(struct yenta_socket *socket);
     70static unsigned int yenta_probe_irq(struct yenta_socket *socket,
     71				u32 isa_irq_mask);
     72#endif
     73
     74
     75static unsigned int override_bios;
     76module_param(override_bios, uint, 0000);
     77MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
     78
     79/*
     80 * Generate easy-to-use ways of reading a cardbus sockets
     81 * regular memory space ("cb_xxx"), configuration space
     82 * ("config_xxx") and compatibility space ("exca_xxxx")
     83 */
     84static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
     85{
     86	u32 val = readl(socket->base + reg);
     87	debug("%04x %08x\n", socket, reg, val);
     88	return val;
     89}
     90
     91static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
     92{
     93	debug("%04x %08x\n", socket, reg, val);
     94	writel(val, socket->base + reg);
     95	readl(socket->base + reg); /* avoid problems with PCI write posting */
     96}
     97
     98static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
     99{
    100	u8 val;
    101	pci_read_config_byte(socket->dev, offset, &val);
    102	debug("%04x %02x\n", socket, offset, val);
    103	return val;
    104}
    105
    106static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
    107{
    108	u16 val;
    109	pci_read_config_word(socket->dev, offset, &val);
    110	debug("%04x %04x\n", socket, offset, val);
    111	return val;
    112}
    113
    114static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
    115{
    116	u32 val;
    117	pci_read_config_dword(socket->dev, offset, &val);
    118	debug("%04x %08x\n", socket, offset, val);
    119	return val;
    120}
    121
    122static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
    123{
    124	debug("%04x %02x\n", socket, offset, val);
    125	pci_write_config_byte(socket->dev, offset, val);
    126}
    127
    128static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
    129{
    130	debug("%04x %04x\n", socket, offset, val);
    131	pci_write_config_word(socket->dev, offset, val);
    132}
    133
    134static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
    135{
    136	debug("%04x %08x\n", socket, offset, val);
    137	pci_write_config_dword(socket->dev, offset, val);
    138}
    139
    140static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
    141{
    142	u8 val = readb(socket->base + 0x800 + reg);
    143	debug("%04x %02x\n", socket, reg, val);
    144	return val;
    145}
    146
    147/*
    148static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
    149{
    150	u16 val;
    151	val = readb(socket->base + 0x800 + reg);
    152	val |= readb(socket->base + 0x800 + reg + 1) << 8;
    153	debug("%04x %04x\n", socket, reg, val);
    154	return val;
    155}
    156*/
    157
    158static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
    159{
    160	debug("%04x %02x\n", socket, reg, val);
    161	writeb(val, socket->base + 0x800 + reg);
    162	readb(socket->base + 0x800 + reg); /* PCI write posting... */
    163}
    164
    165static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
    166{
    167	debug("%04x %04x\n", socket, reg, val);
    168	writeb(val, socket->base + 0x800 + reg);
    169	writeb(val >> 8, socket->base + 0x800 + reg + 1);
    170
    171	/* PCI write posting... */
    172	readb(socket->base + 0x800 + reg);
    173	readb(socket->base + 0x800 + reg + 1);
    174}
    175
    176static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
    177{
    178	struct yenta_socket *socket = dev_get_drvdata(yentadev);
    179	int offset = 0, i;
    180
    181	offset = sysfs_emit(buf, "CB registers:");
    182	for (i = 0; i < 0x24; i += 4) {
    183		unsigned val;
    184		if (!(i & 15))
    185			offset += sysfs_emit_at(buf, offset, "\n%02x:", i);
    186		val = cb_readl(socket, i);
    187		offset += sysfs_emit_at(buf, offset, " %08x", val);
    188	}
    189
    190	offset += sysfs_emit_at(buf, offset, "\n\nExCA registers:");
    191	for (i = 0; i < 0x45; i++) {
    192		unsigned char val;
    193		if (!(i & 7)) {
    194			if (i & 8) {
    195				memcpy(buf + offset, " -", 2);
    196				offset += 2;
    197			} else
    198				offset += sysfs_emit_at(buf, offset, "\n%02x:", i);
    199		}
    200		val = exca_readb(socket, i);
    201		offset += sysfs_emit_at(buf, offset, " %02x", val);
    202	}
    203	sysfs_emit_at(buf, offset, "\n");
    204	return offset;
    205}
    206
    207static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
    208
    209/*
    210 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
    211 * on what kind of card is inserted..
    212 */
    213static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
    214{
    215	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
    216	unsigned int val;
    217	u32 state = cb_readl(socket, CB_SOCKET_STATE);
    218
    219	val  = (state & CB_3VCARD) ? SS_3VCARD : 0;
    220	val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
    221	val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
    222	val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
    223
    224
    225	if (state & CB_CBCARD) {
    226		val |= SS_CARDBUS;
    227		val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
    228		val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
    229		val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
    230	} else if (state & CB_16BITCARD) {
    231		u8 status = exca_readb(socket, I365_STATUS);
    232		val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
    233		if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
    234			val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
    235		} else {
    236			val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
    237			val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
    238		}
    239		val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
    240		val |= (status & I365_CS_READY) ? SS_READY : 0;
    241		val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
    242	}
    243
    244	*value = val;
    245	return 0;
    246}
    247
    248static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
    249{
    250	/* some birdges require to use the ExCA registers to power 16bit cards */
    251	if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
    252	    (socket->flags & YENTA_16BIT_POWER_EXCA)) {
    253		u8 reg, old;
    254		reg = old = exca_readb(socket, I365_POWER);
    255		reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
    256
    257		/* i82365SL-DF style */
    258		if (socket->flags & YENTA_16BIT_POWER_DF) {
    259			switch (state->Vcc) {
    260			case 33:
    261				reg |= I365_VCC_3V;
    262				break;
    263			case 50:
    264				reg |= I365_VCC_5V;
    265				break;
    266			default:
    267				reg = 0;
    268				break;
    269			}
    270			switch (state->Vpp) {
    271			case 33:
    272			case 50:
    273				reg |= I365_VPP1_5V;
    274				break;
    275			case 120:
    276				reg |= I365_VPP1_12V;
    277				break;
    278			}
    279		} else {
    280			/* i82365SL-B style */
    281			switch (state->Vcc) {
    282			case 50:
    283				reg |= I365_VCC_5V;
    284				break;
    285			default:
    286				reg = 0;
    287				break;
    288			}
    289			switch (state->Vpp) {
    290			case 50:
    291				reg |= I365_VPP1_5V | I365_VPP2_5V;
    292				break;
    293			case 120:
    294				reg |= I365_VPP1_12V | I365_VPP2_12V;
    295				break;
    296			}
    297		}
    298
    299		if (reg != old)
    300			exca_writeb(socket, I365_POWER, reg);
    301	} else {
    302		u32 reg = 0;	/* CB_SC_STPCLK? */
    303		switch (state->Vcc) {
    304		case 33:
    305			reg = CB_SC_VCC_3V;
    306			break;
    307		case 50:
    308			reg = CB_SC_VCC_5V;
    309			break;
    310		default:
    311			reg = 0;
    312			break;
    313		}
    314		switch (state->Vpp) {
    315		case 33:
    316			reg |= CB_SC_VPP_3V;
    317			break;
    318		case 50:
    319			reg |= CB_SC_VPP_5V;
    320			break;
    321		case 120:
    322			reg |= CB_SC_VPP_12V;
    323			break;
    324		}
    325		if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
    326			cb_writel(socket, CB_SOCKET_CONTROL, reg);
    327	}
    328}
    329
    330static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
    331{
    332	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
    333	u16 bridge;
    334
    335	/* if powering down: do it immediately */
    336	if (state->Vcc == 0)
    337		yenta_set_power(socket, state);
    338
    339	socket->io_irq = state->io_irq;
    340	bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
    341	if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
    342		u8 intr;
    343		bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
    344
    345		/* ISA interrupt control? */
    346		intr = exca_readb(socket, I365_INTCTL);
    347		intr = (intr & ~0xf);
    348		if (!socket->dev->irq) {
    349			intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
    350			bridge |= CB_BRIDGE_INTR;
    351		}
    352		exca_writeb(socket, I365_INTCTL, intr);
    353	}  else {
    354		u8 reg;
    355
    356		reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
    357		reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
    358		reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
    359		if (state->io_irq != socket->dev->irq) {
    360			reg |= state->io_irq;
    361			bridge |= CB_BRIDGE_INTR;
    362		}
    363		exca_writeb(socket, I365_INTCTL, reg);
    364
    365		reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
    366		reg |= I365_PWR_NORESET;
    367		if (state->flags & SS_PWR_AUTO)
    368			reg |= I365_PWR_AUTO;
    369		if (state->flags & SS_OUTPUT_ENA)
    370			reg |= I365_PWR_OUT;
    371		if (exca_readb(socket, I365_POWER) != reg)
    372			exca_writeb(socket, I365_POWER, reg);
    373
    374		/* CSC interrupt: no ISA irq for CSC */
    375		reg = exca_readb(socket, I365_CSCINT);
    376		reg &= I365_CSC_IRQ_MASK;
    377		reg |= I365_CSC_DETECT;
    378		if (state->flags & SS_IOCARD) {
    379			if (state->csc_mask & SS_STSCHG)
    380				reg |= I365_CSC_STSCHG;
    381		} else {
    382			if (state->csc_mask & SS_BATDEAD)
    383				reg |= I365_CSC_BVD1;
    384			if (state->csc_mask & SS_BATWARN)
    385				reg |= I365_CSC_BVD2;
    386			if (state->csc_mask & SS_READY)
    387				reg |= I365_CSC_READY;
    388		}
    389		exca_writeb(socket, I365_CSCINT, reg);
    390		exca_readb(socket, I365_CSC);
    391		if (sock->zoom_video)
    392			sock->zoom_video(sock, state->flags & SS_ZVCARD);
    393	}
    394	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
    395	/* Socket event mask: get card insert/remove events.. */
    396	cb_writel(socket, CB_SOCKET_EVENT, -1);
    397	cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
    398
    399	/* if powering up: do it as the last step when the socket is configured */
    400	if (state->Vcc != 0)
    401		yenta_set_power(socket, state);
    402	return 0;
    403}
    404
    405static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
    406{
    407	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
    408	int map;
    409	unsigned char ioctl, addr, enable;
    410
    411	map = io->map;
    412
    413	if (map > 1)
    414		return -EINVAL;
    415
    416	enable = I365_ENA_IO(map);
    417	addr = exca_readb(socket, I365_ADDRWIN);
    418
    419	/* Disable the window before changing it.. */
    420	if (addr & enable) {
    421		addr &= ~enable;
    422		exca_writeb(socket, I365_ADDRWIN, addr);
    423	}
    424
    425	exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
    426	exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
    427
    428	ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
    429	if (io->flags & MAP_0WS)
    430		ioctl |= I365_IOCTL_0WS(map);
    431	if (io->flags & MAP_16BIT)
    432		ioctl |= I365_IOCTL_16BIT(map);
    433	if (io->flags & MAP_AUTOSZ)
    434		ioctl |= I365_IOCTL_IOCS16(map);
    435	exca_writeb(socket, I365_IOCTL, ioctl);
    436
    437	if (io->flags & MAP_ACTIVE)
    438		exca_writeb(socket, I365_ADDRWIN, addr | enable);
    439	return 0;
    440}
    441
    442static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
    443{
    444	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
    445	struct pci_bus_region region;
    446	int map;
    447	unsigned char addr, enable;
    448	unsigned int start, stop, card_start;
    449	unsigned short word;
    450
    451	pcibios_resource_to_bus(socket->dev->bus, &region, mem->res);
    452
    453	map = mem->map;
    454	start = region.start;
    455	stop = region.end;
    456	card_start = mem->card_start;
    457
    458	if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
    459	    (card_start >> 26) || mem->speed > 1000)
    460		return -EINVAL;
    461
    462	enable = I365_ENA_MEM(map);
    463	addr = exca_readb(socket, I365_ADDRWIN);
    464	if (addr & enable) {
    465		addr &= ~enable;
    466		exca_writeb(socket, I365_ADDRWIN, addr);
    467	}
    468
    469	exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
    470
    471	word = (start >> 12) & 0x0fff;
    472	if (mem->flags & MAP_16BIT)
    473		word |= I365_MEM_16BIT;
    474	if (mem->flags & MAP_0WS)
    475		word |= I365_MEM_0WS;
    476	exca_writew(socket, I365_MEM(map) + I365_W_START, word);
    477
    478	word = (stop >> 12) & 0x0fff;
    479	switch (to_cycles(mem->speed)) {
    480	case 0:
    481		break;
    482	case 1:
    483		word |= I365_MEM_WS0;
    484		break;
    485	case 2:
    486		word |= I365_MEM_WS1;
    487		break;
    488	default:
    489		word |= I365_MEM_WS1 | I365_MEM_WS0;
    490		break;
    491	}
    492	exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
    493
    494	word = ((card_start - start) >> 12) & 0x3fff;
    495	if (mem->flags & MAP_WRPROT)
    496		word |= I365_MEM_WRPROT;
    497	if (mem->flags & MAP_ATTRIB)
    498		word |= I365_MEM_REG;
    499	exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
    500
    501	if (mem->flags & MAP_ACTIVE)
    502		exca_writeb(socket, I365_ADDRWIN, addr | enable);
    503	return 0;
    504}
    505
    506
    507
    508static irqreturn_t yenta_interrupt(int irq, void *dev_id)
    509{
    510	unsigned int events;
    511	struct yenta_socket *socket = (struct yenta_socket *) dev_id;
    512	u8 csc;
    513	u32 cb_event;
    514
    515	/* Clear interrupt status for the event */
    516	cb_event = cb_readl(socket, CB_SOCKET_EVENT);
    517	cb_writel(socket, CB_SOCKET_EVENT, cb_event);
    518
    519	csc = exca_readb(socket, I365_CSC);
    520
    521	if (!(cb_event || csc))
    522		return IRQ_NONE;
    523
    524	events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
    525	events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
    526	if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
    527		events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
    528	} else {
    529		events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
    530		events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
    531		events |= (csc & I365_CSC_READY) ? SS_READY : 0;
    532	}
    533
    534	if (events)
    535		pcmcia_parse_events(&socket->socket, events);
    536
    537	return IRQ_HANDLED;
    538}
    539
    540static void yenta_interrupt_wrapper(struct timer_list *t)
    541{
    542	struct yenta_socket *socket = from_timer(socket, t, poll_timer);
    543
    544	yenta_interrupt(0, (void *)socket);
    545	socket->poll_timer.expires = jiffies + HZ;
    546	add_timer(&socket->poll_timer);
    547}
    548
    549static void yenta_clear_maps(struct yenta_socket *socket)
    550{
    551	int i;
    552	struct resource res = { .start = 0, .end = 0x0fff };
    553	pccard_io_map io = { 0, 0, 0, 0, 1 };
    554	pccard_mem_map mem = { .res = &res, };
    555
    556	yenta_set_socket(&socket->socket, &dead_socket);
    557	for (i = 0; i < 2; i++) {
    558		io.map = i;
    559		yenta_set_io_map(&socket->socket, &io);
    560	}
    561	for (i = 0; i < 5; i++) {
    562		mem.map = i;
    563		yenta_set_mem_map(&socket->socket, &mem);
    564	}
    565}
    566
    567/* redoes voltage interrogation if required */
    568static void yenta_interrogate(struct yenta_socket *socket)
    569{
    570	u32 state;
    571
    572	state = cb_readl(socket, CB_SOCKET_STATE);
    573	if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
    574	    (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
    575	    ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
    576		cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
    577}
    578
    579/* Called at resume and initialization events */
    580static int yenta_sock_init(struct pcmcia_socket *sock)
    581{
    582	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
    583
    584	exca_writeb(socket, I365_GBLCTL, 0x00);
    585	exca_writeb(socket, I365_GENCTL, 0x00);
    586
    587	/* Redo card voltage interrogation */
    588	yenta_interrogate(socket);
    589
    590	yenta_clear_maps(socket);
    591
    592	if (socket->type && socket->type->sock_init)
    593		socket->type->sock_init(socket);
    594
    595	/* Re-enable CSC interrupts */
    596	cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
    597
    598	return 0;
    599}
    600
    601static int yenta_sock_suspend(struct pcmcia_socket *sock)
    602{
    603	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
    604
    605	/* Disable CSC interrupts */
    606	cb_writel(socket, CB_SOCKET_MASK, 0x0);
    607
    608	return 0;
    609}
    610
    611/*
    612 * Use an adaptive allocation for the memory resource,
    613 * sometimes the memory behind pci bridges is limited:
    614 * 1/8 of the size of the io window of the parent.
    615 * max 4 MB, min 16 kB. We try very hard to not get below
    616 * the "ACC" values, though.
    617 */
    618#define BRIDGE_MEM_MAX (4*1024*1024)
    619#define BRIDGE_MEM_ACC (128*1024)
    620#define BRIDGE_MEM_MIN (16*1024)
    621
    622#define BRIDGE_IO_MAX 512
    623#define BRIDGE_IO_ACC 256
    624#define BRIDGE_IO_MIN 32
    625
    626#ifndef PCIBIOS_MIN_CARDBUS_IO
    627#define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
    628#endif
    629
    630static int yenta_search_one_res(struct resource *root, struct resource *res,
    631				u32 min)
    632{
    633	u32 align, size, start, end;
    634
    635	if (res->flags & IORESOURCE_IO) {
    636		align = 1024;
    637		size = BRIDGE_IO_MAX;
    638		start = PCIBIOS_MIN_CARDBUS_IO;
    639		end = ~0U;
    640	} else {
    641		unsigned long avail = root->end - root->start;
    642		int i;
    643		size = BRIDGE_MEM_MAX;
    644		if (size > avail/8) {
    645			size = (avail+1)/8;
    646			/* round size down to next power of 2 */
    647			i = 0;
    648			while ((size /= 2) != 0)
    649				i++;
    650			size = 1 << i;
    651		}
    652		if (size < min)
    653			size = min;
    654		align = size;
    655		start = PCIBIOS_MIN_MEM;
    656		end = ~0U;
    657	}
    658
    659	do {
    660		if (allocate_resource(root, res, size, start, end, align,
    661				      NULL, NULL) == 0) {
    662			return 1;
    663		}
    664		size = size/2;
    665		align = size;
    666	} while (size >= min);
    667
    668	return 0;
    669}
    670
    671
    672static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
    673			    u32 min)
    674{
    675	struct resource *root;
    676	int i;
    677
    678	pci_bus_for_each_resource(socket->dev->bus, root, i) {
    679		if (!root)
    680			continue;
    681
    682		if ((res->flags ^ root->flags) &
    683		    (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
    684			continue; /* Wrong type */
    685
    686		if (yenta_search_one_res(root, res, min))
    687			return 1;
    688	}
    689	return 0;
    690}
    691
    692static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
    693{
    694	struct pci_dev *dev = socket->dev;
    695	struct resource *res;
    696	struct pci_bus_region region;
    697	unsigned mask;
    698
    699	res = &dev->resource[nr];
    700	/* Already allocated? */
    701	if (res->parent)
    702		return 0;
    703
    704	/* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
    705	mask = ~0xfff;
    706	if (type & IORESOURCE_IO)
    707		mask = ~3;
    708
    709	res->name = dev->subordinate->name;
    710	res->flags = type;
    711
    712	region.start = config_readl(socket, addr_start) & mask;
    713	region.end = config_readl(socket, addr_end) | ~mask;
    714	if (region.start && region.end > region.start && !override_bios) {
    715		pcibios_bus_to_resource(dev->bus, res, &region);
    716		if (pci_claim_resource(dev, nr) == 0)
    717			return 0;
    718		dev_info(&dev->dev,
    719			 "Preassigned resource %d busy or not available, reconfiguring...\n",
    720			 nr);
    721	}
    722
    723	if (type & IORESOURCE_IO) {
    724		if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
    725		    (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
    726		    (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
    727			return 1;
    728	} else {
    729		if (type & IORESOURCE_PREFETCH) {
    730			if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
    731			    (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
    732			    (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
    733				return 1;
    734			/* Approximating prefetchable by non-prefetchable */
    735			res->flags = IORESOURCE_MEM;
    736		}
    737		if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
    738		    (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
    739		    (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
    740			return 1;
    741	}
    742
    743	dev_info(&dev->dev,
    744		 "no resource of type %x available, trying to continue...\n",
    745		 type);
    746	res->start = res->end = res->flags = 0;
    747	return 0;
    748}
    749
    750static void yenta_free_res(struct yenta_socket *socket, int nr)
    751{
    752	struct pci_dev *dev = socket->dev;
    753	struct resource *res;
    754
    755	res = &dev->resource[nr];
    756	if (res->start != 0 && res->end != 0)
    757		release_resource(res);
    758
    759	res->start = res->end = res->flags = 0;
    760}
    761
    762/*
    763 * Allocate the bridge mappings for the device..
    764 */
    765static void yenta_allocate_resources(struct yenta_socket *socket)
    766{
    767	int program = 0;
    768	program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW,
    769			   IORESOURCE_IO,
    770			   PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
    771	program += yenta_allocate_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW,
    772			   IORESOURCE_IO,
    773			   PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
    774	program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW,
    775			   IORESOURCE_MEM | IORESOURCE_PREFETCH,
    776			   PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
    777	program += yenta_allocate_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW,
    778			   IORESOURCE_MEM,
    779			   PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
    780	if (program)
    781		pci_setup_cardbus(socket->dev->subordinate);
    782}
    783
    784
    785/*
    786 * Free the bridge mappings for the device..
    787 */
    788static void yenta_free_resources(struct yenta_socket *socket)
    789{
    790	yenta_free_res(socket, PCI_CB_BRIDGE_IO_0_WINDOW);
    791	yenta_free_res(socket, PCI_CB_BRIDGE_IO_1_WINDOW);
    792	yenta_free_res(socket, PCI_CB_BRIDGE_MEM_0_WINDOW);
    793	yenta_free_res(socket, PCI_CB_BRIDGE_MEM_1_WINDOW);
    794}
    795
    796
    797/*
    798 * Close it down - release our resources and go home..
    799 */
    800static void yenta_close(struct pci_dev *dev)
    801{
    802	struct yenta_socket *sock = pci_get_drvdata(dev);
    803
    804	/* Remove the register attributes */
    805	device_remove_file(&dev->dev, &dev_attr_yenta_registers);
    806
    807	/* we don't want a dying socket registered */
    808	pcmcia_unregister_socket(&sock->socket);
    809
    810	/* Disable all events so we don't die in an IRQ storm */
    811	cb_writel(sock, CB_SOCKET_MASK, 0x0);
    812	exca_writeb(sock, I365_CSCINT, 0);
    813
    814	if (sock->cb_irq)
    815		free_irq(sock->cb_irq, sock);
    816	else
    817		del_timer_sync(&sock->poll_timer);
    818
    819	iounmap(sock->base);
    820	yenta_free_resources(sock);
    821
    822	pci_release_regions(dev);
    823	pci_disable_device(dev);
    824	pci_set_drvdata(dev, NULL);
    825	kfree(sock);
    826}
    827
    828
    829static struct pccard_operations yenta_socket_operations = {
    830	.init			= yenta_sock_init,
    831	.suspend		= yenta_sock_suspend,
    832	.get_status		= yenta_get_status,
    833	.set_socket		= yenta_set_socket,
    834	.set_io_map		= yenta_set_io_map,
    835	.set_mem_map		= yenta_set_mem_map,
    836};
    837
    838
    839#ifdef CONFIG_YENTA_TI
    840#include "ti113x.h"
    841#endif
    842#ifdef CONFIG_YENTA_RICOH
    843#include "ricoh.h"
    844#endif
    845#ifdef CONFIG_YENTA_TOSHIBA
    846#include "topic.h"
    847#endif
    848#ifdef CONFIG_YENTA_O2
    849#include "o2micro.h"
    850#endif
    851
    852enum {
    853	CARDBUS_TYPE_DEFAULT = -1,
    854	CARDBUS_TYPE_TI,
    855	CARDBUS_TYPE_TI113X,
    856	CARDBUS_TYPE_TI12XX,
    857	CARDBUS_TYPE_TI1250,
    858	CARDBUS_TYPE_RICOH,
    859	CARDBUS_TYPE_TOPIC95,
    860	CARDBUS_TYPE_TOPIC97,
    861	CARDBUS_TYPE_O2MICRO,
    862	CARDBUS_TYPE_ENE,
    863};
    864
    865/*
    866 * Different cardbus controllers have slightly different
    867 * initialization sequences etc details. List them here..
    868 */
    869static struct cardbus_type cardbus_type[] = {
    870#ifdef CONFIG_YENTA_TI
    871	[CARDBUS_TYPE_TI]	= {
    872		.override	= ti_override,
    873		.save_state	= ti_save_state,
    874		.restore_state	= ti_restore_state,
    875		.sock_init	= ti_init,
    876	},
    877	[CARDBUS_TYPE_TI113X]	= {
    878		.override	= ti113x_override,
    879		.save_state	= ti_save_state,
    880		.restore_state	= ti_restore_state,
    881		.sock_init	= ti_init,
    882	},
    883	[CARDBUS_TYPE_TI12XX]	= {
    884		.override	= ti12xx_override,
    885		.save_state	= ti_save_state,
    886		.restore_state	= ti_restore_state,
    887		.sock_init	= ti_init,
    888	},
    889	[CARDBUS_TYPE_TI1250]	= {
    890		.override	= ti1250_override,
    891		.save_state	= ti_save_state,
    892		.restore_state	= ti_restore_state,
    893		.sock_init	= ti_init,
    894	},
    895	[CARDBUS_TYPE_ENE]	= {
    896		.override	= ene_override,
    897		.save_state	= ti_save_state,
    898		.restore_state	= ti_restore_state,
    899		.sock_init	= ti_init,
    900	},
    901#endif
    902#ifdef CONFIG_YENTA_RICOH
    903	[CARDBUS_TYPE_RICOH]	= {
    904		.override	= ricoh_override,
    905		.save_state	= ricoh_save_state,
    906		.restore_state	= ricoh_restore_state,
    907	},
    908#endif
    909#ifdef CONFIG_YENTA_TOSHIBA
    910	[CARDBUS_TYPE_TOPIC95]	= {
    911		.override	= topic95_override,
    912	},
    913	[CARDBUS_TYPE_TOPIC97]	= {
    914		.override	= topic97_override,
    915	},
    916#endif
    917#ifdef CONFIG_YENTA_O2
    918	[CARDBUS_TYPE_O2MICRO]	= {
    919		.override	= o2micro_override,
    920		.restore_state	= o2micro_restore_state,
    921	},
    922#endif
    923};
    924
    925
    926static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
    927{
    928	int i;
    929	unsigned long val;
    930	u32 mask;
    931	u8 reg;
    932
    933	/*
    934	 * Probe for usable interrupts using the force
    935	 * register to generate bogus card status events.
    936	 */
    937	cb_writel(socket, CB_SOCKET_EVENT, -1);
    938	cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
    939	reg = exca_readb(socket, I365_CSCINT);
    940	exca_writeb(socket, I365_CSCINT, 0);
    941	val = probe_irq_on() & isa_irq_mask;
    942	for (i = 1; i < 16; i++) {
    943		if (!((val >> i) & 1))
    944			continue;
    945		exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
    946		cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
    947		udelay(100);
    948		cb_writel(socket, CB_SOCKET_EVENT, -1);
    949	}
    950	cb_writel(socket, CB_SOCKET_MASK, 0);
    951	exca_writeb(socket, I365_CSCINT, reg);
    952
    953	mask = probe_irq_mask(val) & 0xffff;
    954
    955	return mask;
    956}
    957
    958
    959/*
    960 * yenta PCI irq probing.
    961 * currently only used in the TI/EnE initialization code
    962 */
    963#ifdef CONFIG_YENTA_TI
    964
    965/* interrupt handler, only used during probing */
    966static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
    967{
    968	struct yenta_socket *socket = (struct yenta_socket *) dev_id;
    969	u8 csc;
    970	u32 cb_event;
    971
    972	/* Clear interrupt status for the event */
    973	cb_event = cb_readl(socket, CB_SOCKET_EVENT);
    974	cb_writel(socket, CB_SOCKET_EVENT, -1);
    975	csc = exca_readb(socket, I365_CSC);
    976
    977	if (cb_event || csc) {
    978		socket->probe_status = 1;
    979		return IRQ_HANDLED;
    980	}
    981
    982	return IRQ_NONE;
    983}
    984
    985/* probes the PCI interrupt, use only on override functions */
    986static int yenta_probe_cb_irq(struct yenta_socket *socket)
    987{
    988	u8 reg = 0;
    989
    990	if (!socket->cb_irq)
    991		return -1;
    992
    993	socket->probe_status = 0;
    994
    995	if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
    996		dev_warn(&socket->dev->dev,
    997			 "request_irq() in yenta_probe_cb_irq() failed!\n");
    998		return -1;
    999	}
   1000
   1001	/* generate interrupt, wait */
   1002	if (!socket->dev->irq)
   1003		reg = exca_readb(socket, I365_CSCINT);
   1004	exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
   1005	cb_writel(socket, CB_SOCKET_EVENT, -1);
   1006	cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
   1007	cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
   1008
   1009	msleep(100);
   1010
   1011	/* disable interrupts */
   1012	cb_writel(socket, CB_SOCKET_MASK, 0);
   1013	exca_writeb(socket, I365_CSCINT, reg);
   1014	cb_writel(socket, CB_SOCKET_EVENT, -1);
   1015	exca_readb(socket, I365_CSC);
   1016
   1017	free_irq(socket->cb_irq, socket);
   1018
   1019	return (int) socket->probe_status;
   1020}
   1021
   1022#endif /* CONFIG_YENTA_TI */
   1023
   1024
   1025/*
   1026 * Set static data that doesn't need re-initializing..
   1027 */
   1028static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
   1029{
   1030	socket->socket.pci_irq = socket->cb_irq;
   1031	if (isa_probe)
   1032		socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
   1033	else
   1034		socket->socket.irq_mask = 0;
   1035
   1036	dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
   1037		 socket->socket.irq_mask, socket->cb_irq);
   1038}
   1039
   1040/*
   1041 * Initialize the standard cardbus registers
   1042 */
   1043static void yenta_config_init(struct yenta_socket *socket)
   1044{
   1045	u16 bridge;
   1046	struct pci_dev *dev = socket->dev;
   1047	struct pci_bus_region region;
   1048
   1049	pcibios_resource_to_bus(socket->dev->bus, &region, &dev->resource[0]);
   1050
   1051	config_writel(socket, CB_LEGACY_MODE_BASE, 0);
   1052	config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
   1053	config_writew(socket, PCI_COMMAND,
   1054			PCI_COMMAND_IO |
   1055			PCI_COMMAND_MEMORY |
   1056			PCI_COMMAND_MASTER |
   1057			PCI_COMMAND_WAIT);
   1058
   1059	/* MAGIC NUMBERS! Fixme */
   1060	config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
   1061	config_writeb(socket, PCI_LATENCY_TIMER, 168);
   1062	config_writel(socket, PCI_PRIMARY_BUS,
   1063		(176 << 24) |			   /* sec. latency timer */
   1064		((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */
   1065		((unsigned int)dev->subordinate->busn_res.start << 8) |  /* secondary bus */
   1066		dev->subordinate->primary);		   /* primary bus */
   1067
   1068	/*
   1069	 * Set up the bridging state:
   1070	 *  - enable write posting.
   1071	 *  - memory window 0 prefetchable, window 1 non-prefetchable
   1072	 *  - PCI interrupts enabled if a PCI interrupt exists..
   1073	 */
   1074	bridge = config_readw(socket, CB_BRIDGE_CONTROL);
   1075	bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
   1076	bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
   1077	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
   1078}
   1079
   1080/**
   1081 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
   1082 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
   1083 *
   1084 * Checks if devices on the bus which the CardBus bridge bridges to would be
   1085 * invisible during PCI scans because of a misconfigured subordinate number
   1086 * of the parent brige - some BIOSes seem to be too lazy to set it right.
   1087 * Does the fixup carefully by checking how far it can go without conflicts.
   1088 * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
   1089 */
   1090static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
   1091{
   1092	struct pci_bus *sibling;
   1093	unsigned char upper_limit;
   1094	/*
   1095	 * We only check and fix the parent bridge: All systems which need
   1096	 * this fixup that have been reviewed are laptops and the only bridge
   1097	 * which needed fixing was the parent bridge of the CardBus bridge:
   1098	 */
   1099	struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
   1100
   1101	/* Check bus numbers are already set up correctly: */
   1102	if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end)
   1103		return; /* The subordinate number is ok, nothing to do */
   1104
   1105	if (!bridge_to_fix->parent)
   1106		return; /* Root bridges are ok */
   1107
   1108	/* stay within the limits of the bus range of the parent: */
   1109	upper_limit = bridge_to_fix->parent->busn_res.end;
   1110
   1111	/* check the bus ranges of all sibling bridges to prevent overlap */
   1112	list_for_each_entry(sibling, &bridge_to_fix->parent->children,
   1113			node) {
   1114		/*
   1115		 * If the sibling has a higher secondary bus number
   1116		 * and it's secondary is equal or smaller than our
   1117		 * current upper limit, set the new upper limit to
   1118		 * the bus number below the sibling's range:
   1119		 */
   1120		if (sibling->busn_res.start > bridge_to_fix->busn_res.end
   1121		    && sibling->busn_res.start <= upper_limit)
   1122			upper_limit = sibling->busn_res.start - 1;
   1123	}
   1124
   1125	/* Show that the wanted subordinate number is not possible: */
   1126	if (cardbus_bridge->busn_res.end > upper_limit)
   1127		dev_warn(&cardbus_bridge->dev,
   1128			 "Upper limit for fixing this bridge's parent bridge: #%02x\n",
   1129			 upper_limit);
   1130
   1131	/* If we have room to increase the bridge's subordinate number, */
   1132	if (bridge_to_fix->busn_res.end < upper_limit) {
   1133
   1134		/* use the highest number of the hidden bus, within limits */
   1135		unsigned char subordinate_to_assign =
   1136			min_t(int, cardbus_bridge->busn_res.end, upper_limit);
   1137
   1138		dev_info(&bridge_to_fix->dev,
   1139			 "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n",
   1140			 bridge_to_fix->number,
   1141			 (int)bridge_to_fix->busn_res.end,
   1142			 subordinate_to_assign);
   1143
   1144		/* Save the new subordinate in the bus struct of the bridge */
   1145		bridge_to_fix->busn_res.end = subordinate_to_assign;
   1146
   1147		/* and update the PCI config space with the new subordinate */
   1148		pci_write_config_byte(bridge_to_fix->self,
   1149			PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end);
   1150	}
   1151}
   1152
   1153/*
   1154 * Initialize a cardbus controller. Make sure we have a usable
   1155 * interrupt, and that we can map the cardbus area. Fill in the
   1156 * socket information structure..
   1157 */
   1158static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
   1159{
   1160	struct yenta_socket *socket;
   1161	int ret;
   1162
   1163	/*
   1164	 * If we failed to assign proper bus numbers for this cardbus
   1165	 * controller during PCI probe, its subordinate pci_bus is NULL.
   1166	 * Bail out if so.
   1167	 */
   1168	if (!dev->subordinate) {
   1169		dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n");
   1170		return -ENODEV;
   1171	}
   1172
   1173	socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
   1174	if (!socket)
   1175		return -ENOMEM;
   1176
   1177	/* prepare pcmcia_socket */
   1178	socket->socket.ops = &yenta_socket_operations;
   1179	socket->socket.resource_ops = &pccard_nonstatic_ops;
   1180	socket->socket.dev.parent = &dev->dev;
   1181	socket->socket.driver_data = socket;
   1182	socket->socket.owner = THIS_MODULE;
   1183	socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
   1184	socket->socket.map_size = 0x1000;
   1185	socket->socket.cb_dev = dev;
   1186
   1187	/* prepare struct yenta_socket */
   1188	socket->dev = dev;
   1189	pci_set_drvdata(dev, socket);
   1190
   1191	/*
   1192	 * Do some basic sanity checking..
   1193	 */
   1194	if (pci_enable_device(dev)) {
   1195		ret = -EBUSY;
   1196		goto free;
   1197	}
   1198
   1199	ret = pci_request_regions(dev, "yenta_socket");
   1200	if (ret)
   1201		goto disable;
   1202
   1203	if (!pci_resource_start(dev, 0)) {
   1204		dev_err(&dev->dev, "No cardbus resource!\n");
   1205		ret = -ENODEV;
   1206		goto release;
   1207	}
   1208
   1209	/*
   1210	 * Ok, start setup.. Map the cardbus registers,
   1211	 * and request the IRQ.
   1212	 */
   1213	socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
   1214	if (!socket->base) {
   1215		ret = -ENOMEM;
   1216		goto release;
   1217	}
   1218
   1219	/*
   1220	 * report the subsystem vendor and device for help debugging
   1221	 * the irq stuff...
   1222	 */
   1223	dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n",
   1224		 dev->subsystem_vendor, dev->subsystem_device);
   1225
   1226	yenta_config_init(socket);
   1227
   1228	/* Disable all events */
   1229	cb_writel(socket, CB_SOCKET_MASK, 0x0);
   1230
   1231	/* Set up the bridge regions.. */
   1232	yenta_allocate_resources(socket);
   1233
   1234	socket->cb_irq = dev->irq;
   1235
   1236	/* Do we have special options for the device? */
   1237	if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
   1238	    id->driver_data < ARRAY_SIZE(cardbus_type)) {
   1239		socket->type = &cardbus_type[id->driver_data];
   1240
   1241		ret = socket->type->override(socket);
   1242		if (ret < 0)
   1243			goto unmap;
   1244	}
   1245
   1246	/* We must finish initialization here */
   1247
   1248	if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
   1249		/* No IRQ or request_irq failed. Poll */
   1250		socket->cb_irq = 0; /* But zero is a valid IRQ number. */
   1251		timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0);
   1252		mod_timer(&socket->poll_timer, jiffies + HZ);
   1253		dev_info(&dev->dev,
   1254			 "no PCI IRQ, CardBus support disabled for this socket.\n");
   1255		dev_info(&dev->dev,
   1256			 "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
   1257	} else {
   1258		socket->socket.features |= SS_CAP_CARDBUS;
   1259	}
   1260
   1261	/* Figure out what the dang thing can do for the PCMCIA layer... */
   1262	yenta_interrogate(socket);
   1263	yenta_get_socket_capabilities(socket, isa_interrupts);
   1264	dev_info(&dev->dev, "Socket status: %08x\n",
   1265		 cb_readl(socket, CB_SOCKET_STATE));
   1266
   1267	yenta_fixup_parent_bridge(dev->subordinate);
   1268
   1269	/* Register it with the pcmcia layer.. */
   1270	ret = pcmcia_register_socket(&socket->socket);
   1271	if (ret)
   1272		goto free_irq;
   1273
   1274	/* Add the yenta register attributes */
   1275	ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
   1276	if (ret)
   1277		goto unregister_socket;
   1278
   1279	return ret;
   1280
   1281	/* error path... */
   1282 unregister_socket:
   1283	pcmcia_unregister_socket(&socket->socket);
   1284 free_irq:
   1285	if (socket->cb_irq)
   1286		free_irq(socket->cb_irq, socket);
   1287	else
   1288		del_timer_sync(&socket->poll_timer);
   1289 unmap:
   1290	iounmap(socket->base);
   1291	yenta_free_resources(socket);
   1292 release:
   1293	pci_release_regions(dev);
   1294 disable:
   1295	pci_disable_device(dev);
   1296 free:
   1297	pci_set_drvdata(dev, NULL);
   1298	kfree(socket);
   1299	return ret;
   1300}
   1301
   1302#ifdef CONFIG_PM_SLEEP
   1303static int yenta_dev_suspend_noirq(struct device *dev)
   1304{
   1305	struct pci_dev *pdev = to_pci_dev(dev);
   1306	struct yenta_socket *socket = pci_get_drvdata(pdev);
   1307
   1308	if (!socket)
   1309		return 0;
   1310
   1311	if (socket->type && socket->type->save_state)
   1312		socket->type->save_state(socket);
   1313
   1314	pci_save_state(pdev);
   1315	pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
   1316	pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
   1317	pci_disable_device(pdev);
   1318
   1319	return 0;
   1320}
   1321
   1322static int yenta_dev_resume_noirq(struct device *dev)
   1323{
   1324	struct pci_dev *pdev = to_pci_dev(dev);
   1325	struct yenta_socket *socket = pci_get_drvdata(pdev);
   1326	int ret;
   1327
   1328	if (!socket)
   1329		return 0;
   1330
   1331	pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
   1332	pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
   1333
   1334	ret = pci_enable_device(pdev);
   1335	if (ret)
   1336		return ret;
   1337
   1338	pci_set_master(pdev);
   1339
   1340	if (socket->type && socket->type->restore_state)
   1341		socket->type->restore_state(socket);
   1342
   1343	return 0;
   1344}
   1345
   1346static const struct dev_pm_ops yenta_pm_ops = {
   1347	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(yenta_dev_suspend_noirq, yenta_dev_resume_noirq)
   1348};
   1349
   1350#define YENTA_PM_OPS	(&yenta_pm_ops)
   1351#else
   1352#define YENTA_PM_OPS	NULL
   1353#endif
   1354
   1355#define CB_ID(vend, dev, type)				\
   1356	{						\
   1357		.vendor		= vend,			\
   1358		.device		= dev,			\
   1359		.subvendor	= PCI_ANY_ID,		\
   1360		.subdevice	= PCI_ANY_ID,		\
   1361		.class		= PCI_CLASS_BRIDGE_CARDBUS << 8, \
   1362		.class_mask	= ~0,			\
   1363		.driver_data	= CARDBUS_TYPE_##type,	\
   1364	}
   1365
   1366static const struct pci_device_id yenta_table[] = {
   1367	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
   1368
   1369	/*
   1370	 * TBD: Check if these TI variants can use more
   1371	 * advanced overrides instead.  (I can't get the
   1372	 * data sheets for these devices. --rmk)
   1373	 */
   1374#ifdef CONFIG_YENTA_TI
   1375	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
   1376
   1377	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
   1378	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
   1379
   1380	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
   1381	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
   1382	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
   1383	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
   1384	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
   1385	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
   1386	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
   1387	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
   1388	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
   1389	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
   1390	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
   1391	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
   1392	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
   1393	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
   1394	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
   1395	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
   1396	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
   1397
   1398	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
   1399	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
   1400
   1401	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
   1402	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
   1403	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
   1404	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
   1405	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
   1406	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
   1407	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
   1408	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
   1409
   1410	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
   1411	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
   1412	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
   1413	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
   1414	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
   1415	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
   1416	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
   1417	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
   1418#endif /* CONFIG_YENTA_TI */
   1419
   1420#ifdef CONFIG_YENTA_RICOH
   1421	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
   1422	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
   1423	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
   1424	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
   1425	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
   1426#endif
   1427
   1428#ifdef CONFIG_YENTA_TOSHIBA
   1429	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
   1430	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
   1431	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
   1432#endif
   1433
   1434#ifdef CONFIG_YENTA_O2
   1435	CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
   1436#endif
   1437
   1438	/* match any cardbus bridge */
   1439	CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
   1440	{ /* all zeroes */ }
   1441};
   1442MODULE_DEVICE_TABLE(pci, yenta_table);
   1443
   1444
   1445static struct pci_driver yenta_cardbus_driver = {
   1446	.name		= "yenta_cardbus",
   1447	.id_table	= yenta_table,
   1448	.probe		= yenta_probe,
   1449	.remove		= yenta_close,
   1450	.driver.pm	= YENTA_PM_OPS,
   1451};
   1452
   1453module_pci_driver(yenta_cardbus_driver);
   1454
   1455MODULE_LICENSE("GPL");