cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (1111B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2
      3if (ARCH_MXC && ARM64) || COMPILE_TEST
      4
      5config PHY_FSL_IMX8MQ_USB
      6	tristate "Freescale i.MX8M USB3 PHY"
      7	depends on OF && HAS_IOMEM
      8	select GENERIC_PHY
      9	default ARCH_MXC && ARM64
     10
     11config PHY_MIXEL_MIPI_DPHY
     12	tristate "Mixel MIPI DSI PHY support"
     13	depends on OF && HAS_IOMEM
     14	select GENERIC_PHY
     15	select GENERIC_PHY_MIPI_DPHY
     16	select REGMAP_MMIO
     17	help
     18	  Enable this to add support for the Mixel DSI PHY as found
     19	  on NXP's i.MX8 family of SOCs.
     20
     21config PHY_FSL_IMX8M_PCIE
     22	tristate "Freescale i.MX8M PCIE PHY"
     23	depends on OF && HAS_IOMEM
     24	select GENERIC_PHY
     25	help
     26	  Enable this to add support for the PCIE PHY as found on
     27	  i.MX8M family of SOCs.
     28
     29endif
     30
     31config PHY_FSL_LYNX_28G
     32	tristate "Freescale Layerscape Lynx 28G SerDes PHY support"
     33	depends on OF
     34	depends on ARCH_LAYERSCAPE || COMPILE_TEST
     35	select GENERIC_PHY
     36	help
     37	  Enable this to add support for the Lynx SerDes 28G PHY as
     38	  found on NXP's Layerscape platforms such as LX2160A.
     39	  Used to change the protocol running on SerDes lanes at runtime.
     40	  Only useful for a restricted set of Ethernet protocols.