cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (1673B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2#
      3# Phy drivers for STMicro platforms
      4#
      5config PHY_MIPHY28LP
      6	tristate "STMicroelectronics MIPHY28LP PHY driver for STiH407"
      7	depends on ARCH_STI
      8	select GENERIC_PHY
      9	help
     10	  Enable this to support the miphy transceiver (for SATA/PCIE/USB3)
     11	  that is part of STMicroelectronics STiH407 SoC.
     12
     13config PHY_ST_SPEAR1310_MIPHY
     14	tristate "ST SPEAR1310-MIPHY driver"
     15	select GENERIC_PHY
     16	depends on MACH_SPEAR1310 || COMPILE_TEST
     17	help
     18	  Support for ST SPEAr1310 MIPHY which can be used for PCIe and SATA.
     19
     20config PHY_ST_SPEAR1340_MIPHY
     21	tristate "ST SPEAR1340-MIPHY driver"
     22	select GENERIC_PHY
     23	depends on MACH_SPEAR1340 || COMPILE_TEST
     24	help
     25	  Support for ST SPEAr1340 MIPHY which can be used for PCIe and SATA.
     26
     27config PHY_STIH407_USB
     28	tristate "STMicroelectronics USB2 picoPHY driver for STiH407 family"
     29	depends on RESET_CONTROLLER
     30	depends on ARCH_STI || COMPILE_TEST
     31	select GENERIC_PHY
     32	help
     33	  Enable this support to enable the picoPHY device used by USB2
     34	  and USB3 controllers on STMicroelectronics STiH407 SoC families.
     35
     36config PHY_STM32_USBPHYC
     37	tristate "STMicroelectronics STM32 USB HS PHY Controller driver"
     38	depends on ARCH_STM32 || COMPILE_TEST
     39	depends on COMMON_CLK
     40	select GENERIC_PHY
     41	help
     42	  Enable this to support the High-Speed USB transceivers that are part
     43	  of some STMicroelectronics STM32 SoCs.
     44
     45	  This driver controls the entire USB PHY block: the USB PHY controller
     46	  (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
     47	  used by an HS USB Host controller, and the second one is shared
     48	  between an HS USB OTG controller and an HS USB Host controller,
     49	  selected by a USB switch.