cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (3485B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2#
      3# Phy drivers for TI platforms
      4#
      5config PHY_DA8XX_USB
      6	tristate "TI DA8xx USB PHY Driver"
      7	depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
      8	select GENERIC_PHY
      9	select MFD_SYSCON
     10	help
     11	  Enable this to support the USB PHY on DA8xx SoCs.
     12
     13	  This driver controls both the USB 1.1 PHY and the USB 2.0 PHY.
     14
     15config PHY_DM816X_USB
     16	tristate "TI dm816x USB PHY driver"
     17	depends on ARCH_OMAP2PLUS || COMPILE_TEST
     18	depends on USB_SUPPORT
     19	select GENERIC_PHY
     20	select USB_PHY
     21	help
     22	  Enable this for dm816x USB to work.
     23
     24config PHY_AM654_SERDES
     25	tristate "TI AM654 SERDES support"
     26	depends on OF && ARCH_K3 || COMPILE_TEST
     27	depends on COMMON_CLK
     28	select GENERIC_PHY
     29	select MULTIPLEXER
     30	select REGMAP_MMIO
     31	select MUX_MMIO
     32	help
     33	  This option enables support for TI AM654 SerDes PHY used for
     34	  PCIe.
     35
     36config PHY_J721E_WIZ
     37	tristate "TI J721E WIZ (SERDES Wrapper) support"
     38	depends on OF && ARCH_K3 || COMPILE_TEST
     39	depends on HAS_IOMEM && OF_ADDRESS
     40	depends on COMMON_CLK
     41	select GENERIC_PHY
     42	select MULTIPLEXER
     43	select REGMAP_MMIO
     44	select MUX_MMIO
     45	help
     46	  This option enables support for WIZ module present in TI's J721E
     47	  SoC. WIZ is a serdes wrapper used to configure some of the input
     48	  signals to the SERDES (Sierra/Torrent). This driver configures
     49	  three clock selects (pll0, pll1, dig) and resets for each of the
     50	  lanes.
     51
     52config OMAP_CONTROL_PHY
     53	tristate "OMAP CONTROL PHY Driver"
     54	depends on ARCH_OMAP2PLUS || COMPILE_TEST
     55	help
     56	  Enable this to add support for the PHY part present in the control
     57	  module. This driver has API to power on the USB2 PHY and to write to
     58	  the mailbox. The mailbox is present only in omap4 and the register to
     59	  power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
     60	  additional register to power on USB3 PHY/SATA PHY/PCIE PHY
     61	  (PIPE3 PHY).
     62
     63config OMAP_USB2
     64	tristate "OMAP USB2 PHY Driver"
     65	depends on ARCH_OMAP2PLUS || ARCH_K3
     66	depends on USB_SUPPORT
     67	select GENERIC_PHY
     68	select USB_PHY
     69	select OMAP_CONTROL_PHY if ARCH_OMAP2PLUS || COMPILE_TEST
     70	help
     71	  Enable this to support the transceiver that is part of SOC. This
     72	  driver takes care of all the PHY functionality apart from comparator.
     73	  The USB OTG controller communicates with the comparator using this
     74	  driver.
     75
     76config TI_PIPE3
     77	tristate "TI PIPE3 PHY Driver"
     78	depends on ARCH_OMAP2PLUS || COMPILE_TEST
     79	select GENERIC_PHY
     80	select OMAP_CONTROL_PHY
     81	help
     82	  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
     83	  driver takes care of all the PHY functionality apart from comparator.
     84	  This driver interacts with the "OMAP Control PHY Driver" to power
     85	  on/off the PHY.
     86
     87config PHY_TUSB1210
     88	tristate "TI TUSB1210 ULPI PHY module"
     89	depends on USB_ULPI_BUS
     90	select GENERIC_PHY
     91	help
     92	  Support for TI TUSB1210 USB ULPI PHY.
     93
     94config TWL4030_USB
     95	tristate "TWL4030 USB Transceiver Driver"
     96	depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
     97	depends on USB_SUPPORT
     98	depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, this can't 'y'
     99	select GENERIC_PHY
    100	select USB_PHY
    101	help
    102	  Enable this to support the USB OTG transceiver on TWL4030
    103	  family chips (including the TWL5030 and TPS659x0 devices).
    104	  This transceiver supports high and full speed devices plus,
    105	  in host mode, low speed.
    106
    107config PHY_TI_GMII_SEL
    108	tristate
    109	select GENERIC_PHY
    110	select REGMAP
    111	help
    112	  This driver supports configuring of the TI CPSW Port mode depending on
    113	  the Ethernet PHY connected to the CPSW Port.