cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-bcm6368.c (12532B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Driver for BCM6368 GPIO unit (pinctrl + GPIO)
      4 *
      5 * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
      6 * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
      7 */
      8
      9#include <linux/bits.h>
     10#include <linux/gpio/driver.h>
     11#include <linux/kernel.h>
     12#include <linux/of.h>
     13#include <linux/pinctrl/pinmux.h>
     14#include <linux/platform_device.h>
     15#include <linux/regmap.h>
     16
     17#include "../pinctrl-utils.h"
     18
     19#include "pinctrl-bcm63xx.h"
     20
     21#define BCM6368_NUM_GPIOS	38
     22
     23#define BCM6368_MODE_REG	0x18
     24#define BCM6368_BASEMODE_REG	0x38
     25#define  BCM6368_BASEMODE_MASK	0x7
     26#define  BCM6368_BASEMODE_GPIO	0x0
     27#define  BCM6368_BASEMODE_UART1	0x1
     28
     29struct bcm6368_pingroup {
     30	const char *name;
     31	const unsigned * const pins;
     32	const unsigned num_pins;
     33};
     34
     35struct bcm6368_function {
     36	const char *name;
     37	const char * const *groups;
     38	const unsigned num_groups;
     39
     40	unsigned dir_out:16;
     41	unsigned basemode:3;
     42};
     43
     44struct bcm6368_priv {
     45	struct regmap_field *overlays;
     46};
     47
     48#define BCM6368_BASEMODE_PIN(a, b)		\
     49	{					\
     50		.number = a,			\
     51		.name = b,			\
     52		.drv_data = (void *)true	\
     53	}
     54
     55static const struct pinctrl_pin_desc bcm6368_pins[] = {
     56	PINCTRL_PIN(0, "gpio0"),
     57	PINCTRL_PIN(1, "gpio1"),
     58	PINCTRL_PIN(2, "gpio2"),
     59	PINCTRL_PIN(3, "gpio3"),
     60	PINCTRL_PIN(4, "gpio4"),
     61	PINCTRL_PIN(5, "gpio5"),
     62	PINCTRL_PIN(6, "gpio6"),
     63	PINCTRL_PIN(7, "gpio7"),
     64	PINCTRL_PIN(8, "gpio8"),
     65	PINCTRL_PIN(9, "gpio9"),
     66	PINCTRL_PIN(10, "gpio10"),
     67	PINCTRL_PIN(11, "gpio11"),
     68	PINCTRL_PIN(12, "gpio12"),
     69	PINCTRL_PIN(13, "gpio13"),
     70	PINCTRL_PIN(14, "gpio14"),
     71	PINCTRL_PIN(15, "gpio15"),
     72	PINCTRL_PIN(16, "gpio16"),
     73	PINCTRL_PIN(17, "gpio17"),
     74	PINCTRL_PIN(18, "gpio18"),
     75	PINCTRL_PIN(19, "gpio19"),
     76	PINCTRL_PIN(20, "gpio20"),
     77	PINCTRL_PIN(21, "gpio21"),
     78	PINCTRL_PIN(22, "gpio22"),
     79	PINCTRL_PIN(23, "gpio23"),
     80	PINCTRL_PIN(24, "gpio24"),
     81	PINCTRL_PIN(25, "gpio25"),
     82	PINCTRL_PIN(26, "gpio26"),
     83	PINCTRL_PIN(27, "gpio27"),
     84	PINCTRL_PIN(28, "gpio28"),
     85	PINCTRL_PIN(29, "gpio29"),
     86	BCM6368_BASEMODE_PIN(30, "gpio30"),
     87	BCM6368_BASEMODE_PIN(31, "gpio31"),
     88	BCM6368_BASEMODE_PIN(32, "gpio32"),
     89	BCM6368_BASEMODE_PIN(33, "gpio33"),
     90	PINCTRL_PIN(34, "gpio34"),
     91	PINCTRL_PIN(35, "gpio35"),
     92	PINCTRL_PIN(36, "gpio36"),
     93	PINCTRL_PIN(37, "gpio37"),
     94};
     95
     96static unsigned gpio0_pins[] = { 0 };
     97static unsigned gpio1_pins[] = { 1 };
     98static unsigned gpio2_pins[] = { 2 };
     99static unsigned gpio3_pins[] = { 3 };
    100static unsigned gpio4_pins[] = { 4 };
    101static unsigned gpio5_pins[] = { 5 };
    102static unsigned gpio6_pins[] = { 6 };
    103static unsigned gpio7_pins[] = { 7 };
    104static unsigned gpio8_pins[] = { 8 };
    105static unsigned gpio9_pins[] = { 9 };
    106static unsigned gpio10_pins[] = { 10 };
    107static unsigned gpio11_pins[] = { 11 };
    108static unsigned gpio12_pins[] = { 12 };
    109static unsigned gpio13_pins[] = { 13 };
    110static unsigned gpio14_pins[] = { 14 };
    111static unsigned gpio15_pins[] = { 15 };
    112static unsigned gpio16_pins[] = { 16 };
    113static unsigned gpio17_pins[] = { 17 };
    114static unsigned gpio18_pins[] = { 18 };
    115static unsigned gpio19_pins[] = { 19 };
    116static unsigned gpio20_pins[] = { 20 };
    117static unsigned gpio21_pins[] = { 21 };
    118static unsigned gpio22_pins[] = { 22 };
    119static unsigned gpio23_pins[] = { 23 };
    120static unsigned gpio24_pins[] = { 24 };
    121static unsigned gpio25_pins[] = { 25 };
    122static unsigned gpio26_pins[] = { 26 };
    123static unsigned gpio27_pins[] = { 27 };
    124static unsigned gpio28_pins[] = { 28 };
    125static unsigned gpio29_pins[] = { 29 };
    126static unsigned gpio30_pins[] = { 30 };
    127static unsigned gpio31_pins[] = { 31 };
    128static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
    129
    130#define BCM6368_GROUP(n)				\
    131	{						\
    132		.name = #n,				\
    133		.pins = n##_pins,			\
    134		.num_pins = ARRAY_SIZE(n##_pins),	\
    135	}
    136
    137static struct bcm6368_pingroup bcm6368_groups[] = {
    138	BCM6368_GROUP(gpio0),
    139	BCM6368_GROUP(gpio1),
    140	BCM6368_GROUP(gpio2),
    141	BCM6368_GROUP(gpio3),
    142	BCM6368_GROUP(gpio4),
    143	BCM6368_GROUP(gpio5),
    144	BCM6368_GROUP(gpio6),
    145	BCM6368_GROUP(gpio7),
    146	BCM6368_GROUP(gpio8),
    147	BCM6368_GROUP(gpio9),
    148	BCM6368_GROUP(gpio10),
    149	BCM6368_GROUP(gpio11),
    150	BCM6368_GROUP(gpio12),
    151	BCM6368_GROUP(gpio13),
    152	BCM6368_GROUP(gpio14),
    153	BCM6368_GROUP(gpio15),
    154	BCM6368_GROUP(gpio16),
    155	BCM6368_GROUP(gpio17),
    156	BCM6368_GROUP(gpio18),
    157	BCM6368_GROUP(gpio19),
    158	BCM6368_GROUP(gpio20),
    159	BCM6368_GROUP(gpio21),
    160	BCM6368_GROUP(gpio22),
    161	BCM6368_GROUP(gpio23),
    162	BCM6368_GROUP(gpio24),
    163	BCM6368_GROUP(gpio25),
    164	BCM6368_GROUP(gpio26),
    165	BCM6368_GROUP(gpio27),
    166	BCM6368_GROUP(gpio28),
    167	BCM6368_GROUP(gpio29),
    168	BCM6368_GROUP(gpio30),
    169	BCM6368_GROUP(gpio31),
    170	BCM6368_GROUP(uart1_grp),
    171};
    172
    173static const char * const analog_afe_0_groups[] = {
    174	"gpio0",
    175};
    176
    177static const char * const analog_afe_1_groups[] = {
    178	"gpio1",
    179};
    180
    181static const char * const sys_irq_groups[] = {
    182	"gpio2",
    183};
    184
    185static const char * const serial_led_data_groups[] = {
    186	"gpio3",
    187};
    188
    189static const char * const serial_led_clk_groups[] = {
    190	"gpio4",
    191};
    192
    193static const char * const inet_led_groups[] = {
    194	"gpio5",
    195};
    196
    197static const char * const ephy0_led_groups[] = {
    198	"gpio6",
    199};
    200
    201static const char * const ephy1_led_groups[] = {
    202	"gpio7",
    203};
    204
    205static const char * const ephy2_led_groups[] = {
    206	"gpio8",
    207};
    208
    209static const char * const ephy3_led_groups[] = {
    210	"gpio9",
    211};
    212
    213static const char * const robosw_led_data_groups[] = {
    214	"gpio10",
    215};
    216
    217static const char * const robosw_led_clk_groups[] = {
    218	"gpio11",
    219};
    220
    221static const char * const robosw_led0_groups[] = {
    222	"gpio12",
    223};
    224
    225static const char * const robosw_led1_groups[] = {
    226	"gpio13",
    227};
    228
    229static const char * const usb_device_led_groups[] = {
    230	"gpio14",
    231};
    232
    233static const char * const pci_req1_groups[] = {
    234	"gpio16",
    235};
    236
    237static const char * const pci_gnt1_groups[] = {
    238	"gpio17",
    239};
    240
    241static const char * const pci_intb_groups[] = {
    242	"gpio18",
    243};
    244
    245static const char * const pci_req0_groups[] = {
    246	"gpio19",
    247};
    248
    249static const char * const pci_gnt0_groups[] = {
    250	"gpio20",
    251};
    252
    253static const char * const pcmcia_cd1_groups[] = {
    254	"gpio22",
    255};
    256
    257static const char * const pcmcia_cd2_groups[] = {
    258	"gpio23",
    259};
    260
    261static const char * const pcmcia_vs1_groups[] = {
    262	"gpio24",
    263};
    264
    265static const char * const pcmcia_vs2_groups[] = {
    266	"gpio25",
    267};
    268
    269static const char * const ebi_cs2_groups[] = {
    270	"gpio26",
    271};
    272
    273static const char * const ebi_cs3_groups[] = {
    274	"gpio27",
    275};
    276
    277static const char * const spi_cs2_groups[] = {
    278	"gpio28",
    279};
    280
    281static const char * const spi_cs3_groups[] = {
    282	"gpio29",
    283};
    284
    285static const char * const spi_cs4_groups[] = {
    286	"gpio30",
    287};
    288
    289static const char * const spi_cs5_groups[] = {
    290	"gpio31",
    291};
    292
    293static const char * const uart1_groups[] = {
    294	"uart1_grp",
    295};
    296
    297#define BCM6368_FUN(n, out)				\
    298	{						\
    299		.name = #n,				\
    300		.groups = n##_groups,			\
    301		.num_groups = ARRAY_SIZE(n##_groups),	\
    302		.dir_out = out,				\
    303	}
    304
    305#define BCM6368_BASEMODE_FUN(n, val, out)		\
    306	{						\
    307		.name = #n,				\
    308		.groups = n##_groups,			\
    309		.num_groups = ARRAY_SIZE(n##_groups),	\
    310		.basemode = BCM6368_BASEMODE_##val,	\
    311		.dir_out = out,				\
    312	}
    313
    314static const struct bcm6368_function bcm6368_funcs[] = {
    315	BCM6368_FUN(analog_afe_0, 1),
    316	BCM6368_FUN(analog_afe_1, 1),
    317	BCM6368_FUN(sys_irq, 1),
    318	BCM6368_FUN(serial_led_data, 1),
    319	BCM6368_FUN(serial_led_clk, 1),
    320	BCM6368_FUN(inet_led, 1),
    321	BCM6368_FUN(ephy0_led, 1),
    322	BCM6368_FUN(ephy1_led, 1),
    323	BCM6368_FUN(ephy2_led, 1),
    324	BCM6368_FUN(ephy3_led, 1),
    325	BCM6368_FUN(robosw_led_data, 1),
    326	BCM6368_FUN(robosw_led_clk, 1),
    327	BCM6368_FUN(robosw_led0, 1),
    328	BCM6368_FUN(robosw_led1, 1),
    329	BCM6368_FUN(usb_device_led, 1),
    330	BCM6368_FUN(pci_req1, 0),
    331	BCM6368_FUN(pci_gnt1, 0),
    332	BCM6368_FUN(pci_intb, 0),
    333	BCM6368_FUN(pci_req0, 0),
    334	BCM6368_FUN(pci_gnt0, 0),
    335	BCM6368_FUN(pcmcia_cd1, 0),
    336	BCM6368_FUN(pcmcia_cd2, 0),
    337	BCM6368_FUN(pcmcia_vs1, 0),
    338	BCM6368_FUN(pcmcia_vs2, 0),
    339	BCM6368_FUN(ebi_cs2, 1),
    340	BCM6368_FUN(ebi_cs3, 1),
    341	BCM6368_FUN(spi_cs2, 1),
    342	BCM6368_FUN(spi_cs3, 1),
    343	BCM6368_FUN(spi_cs4, 1),
    344	BCM6368_FUN(spi_cs5, 1),
    345	BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
    346};
    347
    348static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
    349{
    350	return ARRAY_SIZE(bcm6368_groups);
    351}
    352
    353static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
    354						  unsigned group)
    355{
    356	return bcm6368_groups[group].name;
    357}
    358
    359static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
    360					  unsigned group, const unsigned **pins,
    361					  unsigned *num_pins)
    362{
    363	*pins = bcm6368_groups[group].pins;
    364	*num_pins = bcm6368_groups[group].num_pins;
    365
    366	return 0;
    367}
    368
    369static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
    370{
    371	return ARRAY_SIZE(bcm6368_funcs);
    372}
    373
    374static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
    375						 unsigned selector)
    376{
    377	return bcm6368_funcs[selector].name;
    378}
    379
    380static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
    381				      unsigned selector,
    382				      const char * const **groups,
    383				      unsigned * const num_groups)
    384{
    385	*groups = bcm6368_funcs[selector].groups;
    386	*num_groups = bcm6368_funcs[selector].num_groups;
    387
    388	return 0;
    389}
    390
    391static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
    392				   unsigned selector, unsigned group)
    393{
    394	struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
    395	struct bcm6368_priv *priv = pc->driver_data;
    396	const struct bcm6368_pingroup *pg = &bcm6368_groups[group];
    397	const struct bcm6368_function *fun = &bcm6368_funcs[selector];
    398	int i, pin;
    399
    400	if (fun->basemode) {
    401		unsigned int mask = 0;
    402
    403		for (i = 0; i < pg->num_pins; i++) {
    404			pin = pg->pins[i];
    405			if (pin < BCM63XX_BANK_GPIOS)
    406				mask |= BIT(pin);
    407		}
    408
    409		regmap_update_bits(pc->regs, BCM6368_MODE_REG, mask, 0);
    410		regmap_field_write(priv->overlays, fun->basemode);
    411	} else {
    412		pin = pg->pins[0];
    413
    414		if (bcm6368_pins[pin].drv_data)
    415			regmap_field_write(priv->overlays,
    416					   BCM6368_BASEMODE_GPIO);
    417
    418		regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin),
    419				   BIT(pin));
    420	}
    421
    422	for (pin = 0; pin < pg->num_pins; pin++) {
    423		struct pinctrl_gpio_range *range;
    424		int hw_gpio = bcm6368_pins[pin].number;
    425
    426		range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
    427		if (range) {
    428			struct gpio_chip *gc = range->gc;
    429
    430			if (fun->dir_out & BIT(pin))
    431				gc->direction_output(gc, hw_gpio, 0);
    432			else
    433				gc->direction_input(gc, hw_gpio);
    434		}
    435	}
    436
    437	return 0;
    438}
    439
    440static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
    441				       struct pinctrl_gpio_range *range,
    442				       unsigned offset)
    443{
    444	struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
    445	struct bcm6368_priv *priv = pc->driver_data;
    446
    447	if (offset >= BCM63XX_BANK_GPIOS && !bcm6368_pins[offset].drv_data)
    448		return 0;
    449
    450	/* disable all functions using this pin */
    451	if (offset < BCM63XX_BANK_GPIOS)
    452		regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(offset), 0);
    453
    454	if (bcm6368_pins[offset].drv_data)
    455		regmap_field_write(priv->overlays, BCM6368_BASEMODE_GPIO);
    456
    457	return 0;
    458}
    459
    460static const struct pinctrl_ops bcm6368_pctl_ops = {
    461	.dt_free_map = pinctrl_utils_free_map,
    462	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
    463	.get_group_name = bcm6368_pinctrl_get_group_name,
    464	.get_group_pins = bcm6368_pinctrl_get_group_pins,
    465	.get_groups_count = bcm6368_pinctrl_get_group_count,
    466};
    467
    468static const struct pinmux_ops bcm6368_pmx_ops = {
    469	.get_function_groups = bcm6368_pinctrl_get_groups,
    470	.get_function_name = bcm6368_pinctrl_get_func_name,
    471	.get_functions_count = bcm6368_pinctrl_get_func_count,
    472	.gpio_request_enable = bcm6368_gpio_request_enable,
    473	.set_mux = bcm6368_pinctrl_set_mux,
    474	.strict = true,
    475};
    476
    477static const struct bcm63xx_pinctrl_soc bcm6368_soc = {
    478	.ngpios = BCM6368_NUM_GPIOS,
    479	.npins = ARRAY_SIZE(bcm6368_pins),
    480	.pctl_ops = &bcm6368_pctl_ops,
    481	.pins = bcm6368_pins,
    482	.pmx_ops = &bcm6368_pmx_ops,
    483};
    484
    485static int bcm6368_pinctrl_probe(struct platform_device *pdev)
    486{
    487	struct reg_field overlays = REG_FIELD(BCM6368_BASEMODE_REG, 0, 15);
    488	struct device *dev = &pdev->dev;
    489	struct bcm63xx_pinctrl *pc;
    490	struct bcm6368_priv *priv;
    491	int err;
    492
    493	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
    494	if (!priv)
    495		return -ENOMEM;
    496
    497	err = bcm63xx_pinctrl_probe(pdev, &bcm6368_soc, (void *) priv);
    498	if (err)
    499		return err;
    500
    501	pc = platform_get_drvdata(pdev);
    502
    503	priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
    504	if (IS_ERR(priv->overlays))
    505		return PTR_ERR(priv->overlays);
    506
    507	return 0;
    508}
    509
    510static const struct of_device_id bcm6368_pinctrl_match[] = {
    511	{ .compatible = "brcm,bcm6368-pinctrl", },
    512	{ /* sentinel */ }
    513};
    514
    515static struct platform_driver bcm6368_pinctrl_driver = {
    516	.probe = bcm6368_pinctrl_probe,
    517	.driver = {
    518		.name = "bcm6368-pinctrl",
    519		.of_match_table = bcm6368_pinctrl_match,
    520	},
    521};
    522
    523builtin_platform_driver(bcm6368_pinctrl_driver);