pinctrl-madera-core.c (27441B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Pinctrl for Cirrus Logic Madera codecs 4 * 5 * Copyright (C) 2016-2018 Cirrus Logic 6 */ 7 8#include <linux/err.h> 9#include <linux/module.h> 10#include <linux/platform_device.h> 11#include <linux/property.h> 12#include <linux/regmap.h> 13#include <linux/slab.h> 14 15#include <linux/pinctrl/machine.h> 16#include <linux/pinctrl/pinctrl.h> 17#include <linux/pinctrl/pinmux.h> 18#include <linux/pinctrl/pinconf.h> 19#include <linux/pinctrl/pinconf-generic.h> 20 21#include <linux/mfd/madera/core.h> 22#include <linux/mfd/madera/registers.h> 23 24#include "../pinctrl-utils.h" 25 26#include "pinctrl-madera.h" 27 28/* 29 * Use pin GPIO names for consistency 30 * NOTE: IDs are zero-indexed for coding convenience 31 */ 32static const struct pinctrl_pin_desc madera_pins[] = { 33 PINCTRL_PIN(0, "gpio1"), 34 PINCTRL_PIN(1, "gpio2"), 35 PINCTRL_PIN(2, "gpio3"), 36 PINCTRL_PIN(3, "gpio4"), 37 PINCTRL_PIN(4, "gpio5"), 38 PINCTRL_PIN(5, "gpio6"), 39 PINCTRL_PIN(6, "gpio7"), 40 PINCTRL_PIN(7, "gpio8"), 41 PINCTRL_PIN(8, "gpio9"), 42 PINCTRL_PIN(9, "gpio10"), 43 PINCTRL_PIN(10, "gpio11"), 44 PINCTRL_PIN(11, "gpio12"), 45 PINCTRL_PIN(12, "gpio13"), 46 PINCTRL_PIN(13, "gpio14"), 47 PINCTRL_PIN(14, "gpio15"), 48 PINCTRL_PIN(15, "gpio16"), 49 PINCTRL_PIN(16, "gpio17"), 50 PINCTRL_PIN(17, "gpio18"), 51 PINCTRL_PIN(18, "gpio19"), 52 PINCTRL_PIN(19, "gpio20"), 53 PINCTRL_PIN(20, "gpio21"), 54 PINCTRL_PIN(21, "gpio22"), 55 PINCTRL_PIN(22, "gpio23"), 56 PINCTRL_PIN(23, "gpio24"), 57 PINCTRL_PIN(24, "gpio25"), 58 PINCTRL_PIN(25, "gpio26"), 59 PINCTRL_PIN(26, "gpio27"), 60 PINCTRL_PIN(27, "gpio28"), 61 PINCTRL_PIN(28, "gpio29"), 62 PINCTRL_PIN(29, "gpio30"), 63 PINCTRL_PIN(30, "gpio31"), 64 PINCTRL_PIN(31, "gpio32"), 65 PINCTRL_PIN(32, "gpio33"), 66 PINCTRL_PIN(33, "gpio34"), 67 PINCTRL_PIN(34, "gpio35"), 68 PINCTRL_PIN(35, "gpio36"), 69 PINCTRL_PIN(36, "gpio37"), 70 PINCTRL_PIN(37, "gpio38"), 71 PINCTRL_PIN(38, "gpio39"), 72 PINCTRL_PIN(39, "gpio40"), 73}; 74 75/* 76 * All single-pin functions can be mapped to any GPIO, however pinmux applies 77 * functions to pin groups and only those groups declared as supporting that 78 * function. To make this work we must put each pin in its own dummy group so 79 * that the functions can be described as applying to all pins. 80 * Since these do not correspond to anything in the actual hardware - they are 81 * merely an adaptation to pinctrl's view of the world - we use the same name 82 * as the pin to avoid confusion when comparing with datasheet instructions 83 */ 84static const char * const madera_pin_single_group_names[] = { 85 "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 86 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 87 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 88 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 89 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 90 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", 91}; 92 93/* set of pin numbers for single-pin groups, zero-indexed */ 94static const unsigned int madera_pin_single_group_pins[] = { 95 0, 1, 2, 3, 4, 5, 6, 96 7, 8, 9, 10, 11, 12, 13, 97 14, 15, 16, 17, 18, 19, 20, 98 21, 22, 23, 24, 25, 26, 27, 99 28, 29, 30, 31, 32, 33, 34, 100 35, 36, 37, 38, 39, 101}; 102 103static const char * const madera_aif1_group_names[] = { "aif1" }; 104static const char * const madera_aif2_group_names[] = { "aif2" }; 105static const char * const madera_aif3_group_names[] = { "aif3" }; 106static const char * const madera_aif4_group_names[] = { "aif4" }; 107static const char * const madera_mif1_group_names[] = { "mif1" }; 108static const char * const madera_mif2_group_names[] = { "mif2" }; 109static const char * const madera_mif3_group_names[] = { "mif3" }; 110static const char * const madera_dmic3_group_names[] = { "dmic3" }; 111static const char * const madera_dmic4_group_names[] = { "dmic4" }; 112static const char * const madera_dmic5_group_names[] = { "dmic5" }; 113static const char * const madera_dmic6_group_names[] = { "dmic6" }; 114static const char * const madera_spk1_group_names[] = { "pdmspk1" }; 115static const char * const madera_spk2_group_names[] = { "pdmspk2" }; 116 117/* 118 * alt-functions always apply to a single pin group, other functions always 119 * apply to all pins 120 */ 121static const struct { 122 const char *name; 123 const char * const *group_names; 124 u32 func; 125} madera_mux_funcs[] = { 126 { 127 .name = "aif1", 128 .group_names = madera_aif1_group_names, 129 .func = 0x000 130 }, 131 { 132 .name = "aif2", 133 .group_names = madera_aif2_group_names, 134 .func = 0x000 135 }, 136 { 137 .name = "aif3", 138 .group_names = madera_aif3_group_names, 139 .func = 0x000 140 }, 141 { 142 .name = "aif4", 143 .group_names = madera_aif4_group_names, 144 .func = 0x000 145 }, 146 { 147 .name = "mif1", 148 .group_names = madera_mif1_group_names, 149 .func = 0x000 150 }, 151 { 152 .name = "mif2", 153 .group_names = madera_mif2_group_names, 154 .func = 0x000 155 }, 156 { 157 .name = "mif3", 158 .group_names = madera_mif3_group_names, 159 .func = 0x000 160 }, 161 { 162 .name = "dmic3", 163 .group_names = madera_dmic3_group_names, 164 .func = 0x000 165 }, 166 { 167 .name = "dmic4", 168 .group_names = madera_dmic4_group_names, 169 .func = 0x000 170 }, 171 { 172 .name = "dmic5", 173 .group_names = madera_dmic5_group_names, 174 .func = 0x000 175 }, 176 { 177 .name = "dmic6", 178 .group_names = madera_dmic6_group_names, 179 .func = 0x000 180 }, 181 { 182 .name = "pdmspk1", 183 .group_names = madera_spk1_group_names, 184 .func = 0x000 185 }, 186 { 187 .name = "pdmspk2", 188 .group_names = madera_spk2_group_names, 189 .func = 0x000 190 }, 191 { 192 .name = "io", 193 .group_names = madera_pin_single_group_names, 194 .func = 0x001 195 }, 196 { 197 .name = "dsp-gpio", 198 .group_names = madera_pin_single_group_names, 199 .func = 0x002 200 }, 201 { 202 .name = "irq1", 203 .group_names = madera_pin_single_group_names, 204 .func = 0x003 205 }, 206 { 207 .name = "irq2", 208 .group_names = madera_pin_single_group_names, 209 .func = 0x004 210 }, 211 { 212 .name = "fll1-clk", 213 .group_names = madera_pin_single_group_names, 214 .func = 0x010 215 }, 216 { 217 .name = "fll2-clk", 218 .group_names = madera_pin_single_group_names, 219 .func = 0x011 220 }, 221 { 222 .name = "fll3-clk", 223 .group_names = madera_pin_single_group_names, 224 .func = 0x012 225 }, 226 { 227 .name = "fllao-clk", 228 .group_names = madera_pin_single_group_names, 229 .func = 0x013 230 }, 231 { 232 .name = "fll1-lock", 233 .group_names = madera_pin_single_group_names, 234 .func = 0x018 235 }, 236 { 237 .name = "fll2-lock", 238 .group_names = madera_pin_single_group_names, 239 .func = 0x019 240 }, 241 { 242 .name = "fll3-lock", 243 .group_names = madera_pin_single_group_names, 244 .func = 0x01a 245 }, 246 { 247 .name = "fllao-lock", 248 .group_names = madera_pin_single_group_names, 249 .func = 0x01b 250 }, 251 { 252 .name = "opclk", 253 .group_names = madera_pin_single_group_names, 254 .func = 0x040 255 }, 256 { 257 .name = "opclk-async", 258 .group_names = madera_pin_single_group_names, 259 .func = 0x041 260 }, 261 { 262 .name = "pwm1", 263 .group_names = madera_pin_single_group_names, 264 .func = 0x048 265 }, 266 { 267 .name = "pwm2", 268 .group_names = madera_pin_single_group_names, 269 .func = 0x049 270 }, 271 { 272 .name = "spdif", 273 .group_names = madera_pin_single_group_names, 274 .func = 0x04c 275 }, 276 { 277 .name = "asrc1-in1-lock", 278 .group_names = madera_pin_single_group_names, 279 .func = 0x088 280 }, 281 { 282 .name = "asrc1-in2-lock", 283 .group_names = madera_pin_single_group_names, 284 .func = 0x089 285 }, 286 { 287 .name = "asrc2-in1-lock", 288 .group_names = madera_pin_single_group_names, 289 .func = 0x08a 290 }, 291 { 292 .name = "asrc2-in2-lock", 293 .group_names = madera_pin_single_group_names, 294 .func = 0x08b 295 }, 296 { 297 .name = "spkl-short-circuit", 298 .group_names = madera_pin_single_group_names, 299 .func = 0x0b6 300 }, 301 { 302 .name = "spkr-short-circuit", 303 .group_names = madera_pin_single_group_names, 304 .func = 0x0b7 305 }, 306 { 307 .name = "spk-shutdown", 308 .group_names = madera_pin_single_group_names, 309 .func = 0x0e0 310 }, 311 { 312 .name = "spk-overheat-shutdown", 313 .group_names = madera_pin_single_group_names, 314 .func = 0x0e1 315 }, 316 { 317 .name = "spk-overheat-warn", 318 .group_names = madera_pin_single_group_names, 319 .func = 0x0e2 320 }, 321 { 322 .name = "timer1-sts", 323 .group_names = madera_pin_single_group_names, 324 .func = 0x140 325 }, 326 { 327 .name = "timer2-sts", 328 .group_names = madera_pin_single_group_names, 329 .func = 0x141 330 }, 331 { 332 .name = "timer3-sts", 333 .group_names = madera_pin_single_group_names, 334 .func = 0x142 335 }, 336 { 337 .name = "timer4-sts", 338 .group_names = madera_pin_single_group_names, 339 .func = 0x143 340 }, 341 { 342 .name = "timer5-sts", 343 .group_names = madera_pin_single_group_names, 344 .func = 0x144 345 }, 346 { 347 .name = "timer6-sts", 348 .group_names = madera_pin_single_group_names, 349 .func = 0x145 350 }, 351 { 352 .name = "timer7-sts", 353 .group_names = madera_pin_single_group_names, 354 .func = 0x146 355 }, 356 { 357 .name = "timer8-sts", 358 .group_names = madera_pin_single_group_names, 359 .func = 0x147 360 }, 361 { 362 .name = "log1-fifo-ne", 363 .group_names = madera_pin_single_group_names, 364 .func = 0x150 365 }, 366 { 367 .name = "log2-fifo-ne", 368 .group_names = madera_pin_single_group_names, 369 .func = 0x151 370 }, 371 { 372 .name = "log3-fifo-ne", 373 .group_names = madera_pin_single_group_names, 374 .func = 0x152 375 }, 376 { 377 .name = "log4-fifo-ne", 378 .group_names = madera_pin_single_group_names, 379 .func = 0x153 380 }, 381 { 382 .name = "log5-fifo-ne", 383 .group_names = madera_pin_single_group_names, 384 .func = 0x154 385 }, 386 { 387 .name = "log6-fifo-ne", 388 .group_names = madera_pin_single_group_names, 389 .func = 0x155 390 }, 391 { 392 .name = "log7-fifo-ne", 393 .group_names = madera_pin_single_group_names, 394 .func = 0x156 395 }, 396 { 397 .name = "log8-fifo-ne", 398 .group_names = madera_pin_single_group_names, 399 .func = 0x157 400 }, 401 { 402 .name = "aux-pdm-clk", 403 .group_names = madera_pin_single_group_names, 404 .func = 0x280 405 }, 406 { 407 .name = "aux-pdm-dat", 408 .group_names = madera_pin_single_group_names, 409 .func = 0x281 410 }, 411}; 412 413static u16 madera_pin_make_drv_str(struct madera_pin_private *priv, 414 unsigned int milliamps) 415{ 416 switch (milliamps) { 417 case 4: 418 return 0; 419 case 8: 420 return 2 << MADERA_GP1_DRV_STR_SHIFT; 421 default: 422 break; 423 } 424 425 dev_warn(priv->dev, "%u mA not a valid drive strength", milliamps); 426 427 return 0; 428} 429 430static unsigned int madera_pin_unmake_drv_str(struct madera_pin_private *priv, 431 u16 regval) 432{ 433 regval = (regval & MADERA_GP1_DRV_STR_MASK) >> MADERA_GP1_DRV_STR_SHIFT; 434 435 switch (regval) { 436 case 0: 437 return 4; 438 case 2: 439 return 8; 440 default: 441 return 0; 442 } 443} 444 445static int madera_get_groups_count(struct pinctrl_dev *pctldev) 446{ 447 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 448 449 /* Number of alt function groups plus number of single-pin groups */ 450 return priv->chip->n_pin_groups + priv->chip->n_pins; 451} 452 453static const char *madera_get_group_name(struct pinctrl_dev *pctldev, 454 unsigned int selector) 455{ 456 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 457 458 if (selector < priv->chip->n_pin_groups) 459 return priv->chip->pin_groups[selector].name; 460 461 selector -= priv->chip->n_pin_groups; 462 return madera_pin_single_group_names[selector]; 463} 464 465static int madera_get_group_pins(struct pinctrl_dev *pctldev, 466 unsigned int selector, 467 const unsigned int **pins, 468 unsigned int *num_pins) 469{ 470 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 471 472 if (selector < priv->chip->n_pin_groups) { 473 *pins = priv->chip->pin_groups[selector].pins; 474 *num_pins = priv->chip->pin_groups[selector].n_pins; 475 } else { 476 /* return the dummy group for a single pin */ 477 selector -= priv->chip->n_pin_groups; 478 *pins = &madera_pin_single_group_pins[selector]; 479 *num_pins = 1; 480 } 481 return 0; 482} 483 484static void madera_pin_dbg_show_fn(struct madera_pin_private *priv, 485 struct seq_file *s, 486 unsigned int pin, unsigned int fn) 487{ 488 const struct madera_pin_chip *chip = priv->chip; 489 int i, g_pin; 490 491 if (fn != 0) { 492 for (i = 0; i < ARRAY_SIZE(madera_mux_funcs); ++i) { 493 if (madera_mux_funcs[i].func == fn) { 494 seq_printf(s, " FN=%s", 495 madera_mux_funcs[i].name); 496 return; 497 } 498 } 499 return; /* ignore unknown function values */ 500 } 501 502 /* alt function */ 503 for (i = 0; i < chip->n_pin_groups; ++i) { 504 for (g_pin = 0; g_pin < chip->pin_groups[i].n_pins; ++g_pin) { 505 if (chip->pin_groups[i].pins[g_pin] == pin) { 506 seq_printf(s, " FN=%s", 507 chip->pin_groups[i].name); 508 return; 509 } 510 } 511 } 512} 513 514static void __maybe_unused madera_pin_dbg_show(struct pinctrl_dev *pctldev, 515 struct seq_file *s, 516 unsigned int pin) 517{ 518 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 519 unsigned int conf[2]; 520 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); 521 unsigned int fn; 522 int ret; 523 524 ret = regmap_read(priv->madera->regmap, reg, &conf[0]); 525 if (ret) 526 return; 527 528 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]); 529 if (ret) 530 return; 531 532 seq_printf(s, "%04x:%04x", conf[0], conf[1]); 533 534 fn = (conf[0] & MADERA_GP1_FN_MASK) >> MADERA_GP1_FN_SHIFT; 535 madera_pin_dbg_show_fn(priv, s, pin, fn); 536 537 /* State of direction bit is only relevant if function==1 */ 538 if (fn == 1) { 539 if (conf[1] & MADERA_GP1_DIR_MASK) 540 seq_puts(s, " IN"); 541 else 542 seq_puts(s, " OUT"); 543 } 544 545 if (conf[1] & MADERA_GP1_PU_MASK) 546 seq_puts(s, " PU"); 547 548 if (conf[1] & MADERA_GP1_PD_MASK) 549 seq_puts(s, " PD"); 550 551 if (conf[0] & MADERA_GP1_DB_MASK) 552 seq_puts(s, " DB"); 553 554 if (conf[0] & MADERA_GP1_OP_CFG_MASK) 555 seq_puts(s, " OD"); 556 else 557 seq_puts(s, " CMOS"); 558 559 seq_printf(s, " DRV=%umA", madera_pin_unmake_drv_str(priv, conf[1])); 560 561 if (conf[0] & MADERA_GP1_IP_CFG_MASK) 562 seq_puts(s, " SCHMITT"); 563} 564 565static const struct pinctrl_ops madera_pin_group_ops = { 566 .get_groups_count = madera_get_groups_count, 567 .get_group_name = madera_get_group_name, 568 .get_group_pins = madera_get_group_pins, 569#if IS_ENABLED(CONFIG_OF) 570 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 571 .dt_free_map = pinctrl_utils_free_map, 572#endif 573#if IS_ENABLED(CONFIG_DEBUG_FS) 574 .pin_dbg_show = madera_pin_dbg_show, 575#endif 576}; 577 578static int madera_mux_get_funcs_count(struct pinctrl_dev *pctldev) 579{ 580 return ARRAY_SIZE(madera_mux_funcs); 581} 582 583static const char *madera_mux_get_func_name(struct pinctrl_dev *pctldev, 584 unsigned int selector) 585{ 586 return madera_mux_funcs[selector].name; 587} 588 589static int madera_mux_get_groups(struct pinctrl_dev *pctldev, 590 unsigned int selector, 591 const char * const **groups, 592 unsigned int * const num_groups) 593{ 594 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 595 596 *groups = madera_mux_funcs[selector].group_names; 597 598 if (madera_mux_funcs[selector].func == 0) { 599 /* alt func always maps to a single group */ 600 *num_groups = 1; 601 } else { 602 /* other funcs map to all available gpio pins */ 603 *num_groups = priv->chip->n_pins; 604 } 605 606 return 0; 607} 608 609static int madera_mux_set_mux(struct pinctrl_dev *pctldev, 610 unsigned int selector, 611 unsigned int group) 612{ 613 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 614 struct madera *madera = priv->madera; 615 const struct madera_pin_groups *pin_group = priv->chip->pin_groups; 616 unsigned int n_chip_groups = priv->chip->n_pin_groups; 617 const char *func_name = madera_mux_funcs[selector].name; 618 unsigned int reg; 619 int i, ret = 0; 620 621 dev_dbg(priv->dev, "%s selecting %u (%s) for group %u (%s)\n", 622 __func__, selector, func_name, group, 623 madera_get_group_name(pctldev, group)); 624 625 if (madera_mux_funcs[selector].func == 0) { 626 /* alt func pin assignments are codec-specific */ 627 for (i = 0; i < n_chip_groups; ++i) { 628 if (strcmp(func_name, pin_group->name) == 0) 629 break; 630 631 ++pin_group; 632 } 633 634 if (i == n_chip_groups) 635 return -EINVAL; 636 637 for (i = 0; i < pin_group->n_pins; ++i) { 638 reg = MADERA_GPIO1_CTRL_1 + (2 * pin_group->pins[i]); 639 640 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0\n", 641 __func__, reg); 642 643 ret = regmap_update_bits(madera->regmap, reg, 644 MADERA_GP1_FN_MASK, 0); 645 if (ret) 646 break; 647 648 } 649 } else { 650 /* 651 * for other funcs the group will be the gpio number and will 652 * be offset by the number of chip-specific functions at the 653 * start of the group list 654 */ 655 group -= n_chip_groups; 656 reg = MADERA_GPIO1_CTRL_1 + (2 * group); 657 658 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0x%x\n", 659 __func__, reg, madera_mux_funcs[selector].func); 660 661 ret = regmap_update_bits(madera->regmap, 662 reg, 663 MADERA_GP1_FN_MASK, 664 madera_mux_funcs[selector].func); 665 } 666 667 if (ret) 668 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 669 670 return ret; 671} 672 673static int madera_gpio_set_direction(struct pinctrl_dev *pctldev, 674 struct pinctrl_gpio_range *range, 675 unsigned int offset, 676 bool input) 677{ 678 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 679 struct madera *madera = priv->madera; 680 unsigned int reg = MADERA_GPIO1_CTRL_2 + (2 * offset); 681 unsigned int val; 682 int ret; 683 684 if (input) 685 val = MADERA_GP1_DIR; 686 else 687 val = 0; 688 689 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_DIR_MASK, val); 690 if (ret) 691 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 692 693 return ret; 694} 695 696static int madera_gpio_request_enable(struct pinctrl_dev *pctldev, 697 struct pinctrl_gpio_range *range, 698 unsigned int offset) 699{ 700 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 701 struct madera *madera = priv->madera; 702 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset); 703 int ret; 704 705 /* put the pin into GPIO mode */ 706 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1); 707 if (ret) 708 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 709 710 return ret; 711} 712 713static void madera_gpio_disable_free(struct pinctrl_dev *pctldev, 714 struct pinctrl_gpio_range *range, 715 unsigned int offset) 716{ 717 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 718 struct madera *madera = priv->madera; 719 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset); 720 int ret; 721 722 /* disable GPIO by setting to GPIO IN */ 723 madera_gpio_set_direction(pctldev, range, offset, true); 724 725 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1); 726 if (ret) 727 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 728} 729 730static const struct pinmux_ops madera_pin_mux_ops = { 731 .get_functions_count = madera_mux_get_funcs_count, 732 .get_function_name = madera_mux_get_func_name, 733 .get_function_groups = madera_mux_get_groups, 734 .set_mux = madera_mux_set_mux, 735 .gpio_request_enable = madera_gpio_request_enable, 736 .gpio_disable_free = madera_gpio_disable_free, 737 .gpio_set_direction = madera_gpio_set_direction, 738 .strict = true, /* GPIO and other functions are exclusive */ 739}; 740 741static int madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin, 742 unsigned long *config) 743{ 744 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 745 unsigned int param = pinconf_to_config_param(*config); 746 unsigned int result = 0; 747 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); 748 unsigned int conf[2]; 749 int ret; 750 751 ret = regmap_read(priv->madera->regmap, reg, &conf[0]); 752 if (!ret) 753 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]); 754 755 if (ret) { 756 dev_err(priv->dev, "Failed to read GP%d conf (%d)\n", 757 pin + 1, ret); 758 return ret; 759 } 760 761 switch (param) { 762 case PIN_CONFIG_BIAS_BUS_HOLD: 763 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 764 if (conf[1] == (MADERA_GP1_PU | MADERA_GP1_PD)) 765 result = 1; 766 break; 767 case PIN_CONFIG_BIAS_DISABLE: 768 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 769 if (!conf[1]) 770 result = 1; 771 break; 772 case PIN_CONFIG_BIAS_PULL_DOWN: 773 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 774 if (conf[1] == MADERA_GP1_PD_MASK) 775 result = 1; 776 break; 777 case PIN_CONFIG_BIAS_PULL_UP: 778 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 779 if (conf[1] == MADERA_GP1_PU_MASK) 780 result = 1; 781 break; 782 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 783 if (conf[0] & MADERA_GP1_OP_CFG_MASK) 784 result = 1; 785 break; 786 case PIN_CONFIG_DRIVE_PUSH_PULL: 787 if (!(conf[0] & MADERA_GP1_OP_CFG_MASK)) 788 result = 1; 789 break; 790 case PIN_CONFIG_DRIVE_STRENGTH: 791 result = madera_pin_unmake_drv_str(priv, conf[1]); 792 break; 793 case PIN_CONFIG_INPUT_DEBOUNCE: 794 if (conf[0] & MADERA_GP1_DB_MASK) 795 result = 1; 796 break; 797 case PIN_CONFIG_INPUT_ENABLE: 798 if (conf[0] & MADERA_GP1_DIR_MASK) 799 result = 1; 800 break; 801 case PIN_CONFIG_INPUT_SCHMITT: 802 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 803 if (conf[0] & MADERA_GP1_IP_CFG_MASK) 804 result = 1; 805 break; 806 case PIN_CONFIG_OUTPUT: 807 if ((conf[1] & MADERA_GP1_DIR_MASK) && 808 (conf[0] & MADERA_GP1_LVL_MASK)) 809 result = 1; 810 break; 811 default: 812 return -ENOTSUPP; 813 } 814 815 *config = pinconf_to_config_packed(param, result); 816 817 return 0; 818} 819 820static int madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin, 821 unsigned long *configs, unsigned int num_configs) 822{ 823 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 824 u16 conf[2] = {0, 0}; 825 u16 mask[2] = {0, 0}; 826 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); 827 unsigned int val; 828 int ret; 829 830 while (num_configs) { 831 dev_dbg(priv->dev, "%s config 0x%lx\n", __func__, *configs); 832 833 switch (pinconf_to_config_param(*configs)) { 834 case PIN_CONFIG_BIAS_BUS_HOLD: 835 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 836 conf[1] |= MADERA_GP1_PU | MADERA_GP1_PD; 837 break; 838 case PIN_CONFIG_BIAS_DISABLE: 839 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 840 conf[1] &= ~(MADERA_GP1_PU | MADERA_GP1_PD); 841 break; 842 case PIN_CONFIG_BIAS_PULL_DOWN: 843 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 844 conf[1] |= MADERA_GP1_PD; 845 conf[1] &= ~MADERA_GP1_PU; 846 break; 847 case PIN_CONFIG_BIAS_PULL_UP: 848 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 849 conf[1] |= MADERA_GP1_PU; 850 conf[1] &= ~MADERA_GP1_PD; 851 break; 852 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 853 mask[0] |= MADERA_GP1_OP_CFG_MASK; 854 conf[0] |= MADERA_GP1_OP_CFG; 855 break; 856 case PIN_CONFIG_DRIVE_PUSH_PULL: 857 mask[0] |= MADERA_GP1_OP_CFG_MASK; 858 conf[0] &= ~MADERA_GP1_OP_CFG; 859 break; 860 case PIN_CONFIG_DRIVE_STRENGTH: 861 val = pinconf_to_config_argument(*configs); 862 mask[1] |= MADERA_GP1_DRV_STR_MASK; 863 conf[1] &= ~MADERA_GP1_DRV_STR_MASK; 864 conf[1] |= madera_pin_make_drv_str(priv, val); 865 break; 866 case PIN_CONFIG_INPUT_DEBOUNCE: 867 mask[0] |= MADERA_GP1_DB_MASK; 868 869 /* 870 * we can't configure debounce time per-pin so value 871 * is just a flag 872 */ 873 val = pinconf_to_config_argument(*configs); 874 if (val) 875 conf[0] |= MADERA_GP1_DB; 876 else 877 conf[0] &= ~MADERA_GP1_DB; 878 break; 879 case PIN_CONFIG_INPUT_ENABLE: 880 val = pinconf_to_config_argument(*configs); 881 mask[1] |= MADERA_GP1_DIR_MASK; 882 if (val) 883 conf[1] |= MADERA_GP1_DIR; 884 else 885 conf[1] &= ~MADERA_GP1_DIR; 886 break; 887 case PIN_CONFIG_INPUT_SCHMITT: 888 val = pinconf_to_config_argument(*configs); 889 mask[0] |= MADERA_GP1_IP_CFG; 890 if (val) 891 conf[0] |= MADERA_GP1_IP_CFG; 892 else 893 conf[0] &= ~MADERA_GP1_IP_CFG; 894 895 mask[1] |= MADERA_GP1_DIR_MASK; 896 conf[1] |= MADERA_GP1_DIR; 897 break; 898 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 899 mask[0] |= MADERA_GP1_IP_CFG; 900 conf[0] |= MADERA_GP1_IP_CFG; 901 mask[1] |= MADERA_GP1_DIR_MASK; 902 conf[1] |= MADERA_GP1_DIR; 903 break; 904 case PIN_CONFIG_OUTPUT: 905 val = pinconf_to_config_argument(*configs); 906 mask[0] |= MADERA_GP1_LVL_MASK; 907 if (val) 908 conf[0] |= MADERA_GP1_LVL; 909 else 910 conf[0] &= ~MADERA_GP1_LVL; 911 912 mask[1] |= MADERA_GP1_DIR_MASK; 913 conf[1] &= ~MADERA_GP1_DIR; 914 break; 915 default: 916 return -ENOTSUPP; 917 } 918 919 ++configs; 920 --num_configs; 921 } 922 923 dev_dbg(priv->dev, 924 "%s gpio%d 0x%x:0x%x 0x%x:0x%x\n", 925 __func__, pin + 1, reg, conf[0], reg + 1, conf[1]); 926 927 ret = regmap_update_bits(priv->madera->regmap, reg, mask[0], conf[0]); 928 if (ret) 929 goto err; 930 931 ++reg; 932 ret = regmap_update_bits(priv->madera->regmap, reg, mask[1], conf[1]); 933 if (ret) 934 goto err; 935 936 return 0; 937 938err: 939 dev_err(priv->dev, 940 "Failed to write GPIO%d conf (%d) reg 0x%x\n", 941 pin + 1, ret, reg); 942 943 return ret; 944} 945 946static int madera_pin_conf_group_set(struct pinctrl_dev *pctldev, 947 unsigned int selector, 948 unsigned long *configs, 949 unsigned int num_configs) 950{ 951 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 952 const struct madera_pin_groups *pin_group; 953 unsigned int n_groups = priv->chip->n_pin_groups; 954 int i, ret; 955 956 dev_dbg(priv->dev, "%s setting group %s\n", __func__, 957 madera_get_group_name(pctldev, selector)); 958 959 if (selector >= n_groups) { 960 /* group is a single pin, convert to pin number and set */ 961 return madera_pin_conf_set(pctldev, 962 selector - n_groups, 963 configs, 964 num_configs); 965 } else { 966 pin_group = &priv->chip->pin_groups[selector]; 967 968 for (i = 0; i < pin_group->n_pins; ++i) { 969 ret = madera_pin_conf_set(pctldev, 970 pin_group->pins[i], 971 configs, 972 num_configs); 973 if (ret) 974 return ret; 975 } 976 } 977 978 return 0; 979} 980 981static const struct pinconf_ops madera_pin_conf_ops = { 982 .is_generic = true, 983 .pin_config_get = madera_pin_conf_get, 984 .pin_config_set = madera_pin_conf_set, 985 .pin_config_group_set = madera_pin_conf_group_set, 986}; 987 988static struct pinctrl_desc madera_pin_desc = { 989 .name = "madera-pinctrl", 990 .pins = madera_pins, 991 .pctlops = &madera_pin_group_ops, 992 .pmxops = &madera_pin_mux_ops, 993 .confops = &madera_pin_conf_ops, 994 .owner = THIS_MODULE, 995}; 996 997static int madera_pin_probe(struct platform_device *pdev) 998{ 999 struct madera *madera = dev_get_drvdata(pdev->dev.parent); 1000 const struct madera_pdata *pdata = &madera->pdata; 1001 struct madera_pin_private *priv; 1002 int ret; 1003 1004 BUILD_BUG_ON(ARRAY_SIZE(madera_pin_single_group_names) != 1005 ARRAY_SIZE(madera_pin_single_group_pins)); 1006 1007 dev_dbg(&pdev->dev, "%s\n", __func__); 1008 1009 device_set_node(&pdev->dev, dev_fwnode(pdev->dev.parent)); 1010 1011 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 1012 if (!priv) 1013 return -ENOMEM; 1014 1015 priv->dev = &pdev->dev; 1016 priv->madera = madera; 1017 1018 switch (madera->type) { 1019 case CS47L15: 1020 if (IS_ENABLED(CONFIG_PINCTRL_CS47L15)) 1021 priv->chip = &cs47l15_pin_chip; 1022 break; 1023 case CS47L35: 1024 if (IS_ENABLED(CONFIG_PINCTRL_CS47L35)) 1025 priv->chip = &cs47l35_pin_chip; 1026 break; 1027 case CS47L85: 1028 case WM1840: 1029 if (IS_ENABLED(CONFIG_PINCTRL_CS47L85)) 1030 priv->chip = &cs47l85_pin_chip; 1031 break; 1032 case CS47L90: 1033 case CS47L91: 1034 if (IS_ENABLED(CONFIG_PINCTRL_CS47L90)) 1035 priv->chip = &cs47l90_pin_chip; 1036 break; 1037 case CS42L92: 1038 case CS47L92: 1039 case CS47L93: 1040 if (IS_ENABLED(CONFIG_PINCTRL_CS47L92)) 1041 priv->chip = &cs47l92_pin_chip; 1042 break; 1043 default: 1044 break; 1045 } 1046 1047 if (!priv->chip) 1048 return -ENODEV; 1049 1050 madera_pin_desc.npins = priv->chip->n_pins; 1051 1052 ret = devm_pinctrl_register_and_init(&pdev->dev, 1053 &madera_pin_desc, 1054 priv, 1055 &priv->pctl); 1056 if (ret) { 1057 dev_err(priv->dev, "Failed pinctrl register (%d)\n", ret); 1058 return ret; 1059 } 1060 1061 /* if the configuration is provided through pdata, apply it */ 1062 if (pdata->gpio_configs) { 1063 ret = pinctrl_register_mappings(pdata->gpio_configs, 1064 pdata->n_gpio_configs); 1065 if (ret) { 1066 dev_err(priv->dev, 1067 "Failed to register pdata mappings (%d)\n", 1068 ret); 1069 return ret; 1070 } 1071 } 1072 1073 ret = pinctrl_enable(priv->pctl); 1074 if (ret) { 1075 dev_err(priv->dev, "Failed to enable pinctrl (%d)\n", ret); 1076 return ret; 1077 } 1078 1079 platform_set_drvdata(pdev, priv); 1080 1081 dev_dbg(priv->dev, "pinctrl probed ok\n"); 1082 1083 return 0; 1084} 1085 1086static int madera_pin_remove(struct platform_device *pdev) 1087{ 1088 struct madera_pin_private *priv = platform_get_drvdata(pdev); 1089 1090 if (priv->madera->pdata.gpio_configs) 1091 pinctrl_unregister_mappings(priv->madera->pdata.gpio_configs); 1092 1093 return 0; 1094} 1095 1096static struct platform_driver madera_pin_driver = { 1097 .probe = madera_pin_probe, 1098 .remove = madera_pin_remove, 1099 .driver = { 1100 .name = "madera-pinctrl", 1101 }, 1102}; 1103 1104module_platform_driver(madera_pin_driver); 1105 1106MODULE_DESCRIPTION("Madera pinctrl driver"); 1107MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 1108MODULE_LICENSE("GPL v2");