pinctrl-imx28.c (10751B)
1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Freescale i.MX28 pinctrl driver 4// 5// Author: Shawn Guo <shawn.guo@linaro.org> 6// Copyright 2012 Freescale Semiconductor, Inc. 7 8#include <linux/init.h> 9#include <linux/of_device.h> 10#include <linux/pinctrl/pinctrl.h> 11#include "pinctrl-mxs.h" 12 13enum imx28_pin_enum { 14 GPMI_D00 = PINID(0, 0), 15 GPMI_D01 = PINID(0, 1), 16 GPMI_D02 = PINID(0, 2), 17 GPMI_D03 = PINID(0, 3), 18 GPMI_D04 = PINID(0, 4), 19 GPMI_D05 = PINID(0, 5), 20 GPMI_D06 = PINID(0, 6), 21 GPMI_D07 = PINID(0, 7), 22 GPMI_CE0N = PINID(0, 16), 23 GPMI_CE1N = PINID(0, 17), 24 GPMI_CE2N = PINID(0, 18), 25 GPMI_CE3N = PINID(0, 19), 26 GPMI_RDY0 = PINID(0, 20), 27 GPMI_RDY1 = PINID(0, 21), 28 GPMI_RDY2 = PINID(0, 22), 29 GPMI_RDY3 = PINID(0, 23), 30 GPMI_RDN = PINID(0, 24), 31 GPMI_WRN = PINID(0, 25), 32 GPMI_ALE = PINID(0, 26), 33 GPMI_CLE = PINID(0, 27), 34 GPMI_RESETN = PINID(0, 28), 35 LCD_D00 = PINID(1, 0), 36 LCD_D01 = PINID(1, 1), 37 LCD_D02 = PINID(1, 2), 38 LCD_D03 = PINID(1, 3), 39 LCD_D04 = PINID(1, 4), 40 LCD_D05 = PINID(1, 5), 41 LCD_D06 = PINID(1, 6), 42 LCD_D07 = PINID(1, 7), 43 LCD_D08 = PINID(1, 8), 44 LCD_D09 = PINID(1, 9), 45 LCD_D10 = PINID(1, 10), 46 LCD_D11 = PINID(1, 11), 47 LCD_D12 = PINID(1, 12), 48 LCD_D13 = PINID(1, 13), 49 LCD_D14 = PINID(1, 14), 50 LCD_D15 = PINID(1, 15), 51 LCD_D16 = PINID(1, 16), 52 LCD_D17 = PINID(1, 17), 53 LCD_D18 = PINID(1, 18), 54 LCD_D19 = PINID(1, 19), 55 LCD_D20 = PINID(1, 20), 56 LCD_D21 = PINID(1, 21), 57 LCD_D22 = PINID(1, 22), 58 LCD_D23 = PINID(1, 23), 59 LCD_RD_E = PINID(1, 24), 60 LCD_WR_RWN = PINID(1, 25), 61 LCD_RS = PINID(1, 26), 62 LCD_CS = PINID(1, 27), 63 LCD_VSYNC = PINID(1, 28), 64 LCD_HSYNC = PINID(1, 29), 65 LCD_DOTCLK = PINID(1, 30), 66 LCD_ENABLE = PINID(1, 31), 67 SSP0_DATA0 = PINID(2, 0), 68 SSP0_DATA1 = PINID(2, 1), 69 SSP0_DATA2 = PINID(2, 2), 70 SSP0_DATA3 = PINID(2, 3), 71 SSP0_DATA4 = PINID(2, 4), 72 SSP0_DATA5 = PINID(2, 5), 73 SSP0_DATA6 = PINID(2, 6), 74 SSP0_DATA7 = PINID(2, 7), 75 SSP0_CMD = PINID(2, 8), 76 SSP0_DETECT = PINID(2, 9), 77 SSP0_SCK = PINID(2, 10), 78 SSP1_SCK = PINID(2, 12), 79 SSP1_CMD = PINID(2, 13), 80 SSP1_DATA0 = PINID(2, 14), 81 SSP1_DATA3 = PINID(2, 15), 82 SSP2_SCK = PINID(2, 16), 83 SSP2_MOSI = PINID(2, 17), 84 SSP2_MISO = PINID(2, 18), 85 SSP2_SS0 = PINID(2, 19), 86 SSP2_SS1 = PINID(2, 20), 87 SSP2_SS2 = PINID(2, 21), 88 SSP3_SCK = PINID(2, 24), 89 SSP3_MOSI = PINID(2, 25), 90 SSP3_MISO = PINID(2, 26), 91 SSP3_SS0 = PINID(2, 27), 92 AUART0_RX = PINID(3, 0), 93 AUART0_TX = PINID(3, 1), 94 AUART0_CTS = PINID(3, 2), 95 AUART0_RTS = PINID(3, 3), 96 AUART1_RX = PINID(3, 4), 97 AUART1_TX = PINID(3, 5), 98 AUART1_CTS = PINID(3, 6), 99 AUART1_RTS = PINID(3, 7), 100 AUART2_RX = PINID(3, 8), 101 AUART2_TX = PINID(3, 9), 102 AUART2_CTS = PINID(3, 10), 103 AUART2_RTS = PINID(3, 11), 104 AUART3_RX = PINID(3, 12), 105 AUART3_TX = PINID(3, 13), 106 AUART3_CTS = PINID(3, 14), 107 AUART3_RTS = PINID(3, 15), 108 PWM0 = PINID(3, 16), 109 PWM1 = PINID(3, 17), 110 PWM2 = PINID(3, 18), 111 SAIF0_MCLK = PINID(3, 20), 112 SAIF0_LRCLK = PINID(3, 21), 113 SAIF0_BITCLK = PINID(3, 22), 114 SAIF0_SDATA0 = PINID(3, 23), 115 I2C0_SCL = PINID(3, 24), 116 I2C0_SDA = PINID(3, 25), 117 SAIF1_SDATA0 = PINID(3, 26), 118 SPDIF = PINID(3, 27), 119 PWM3 = PINID(3, 28), 120 PWM4 = PINID(3, 29), 121 LCD_RESET = PINID(3, 30), 122 ENET0_MDC = PINID(4, 0), 123 ENET0_MDIO = PINID(4, 1), 124 ENET0_RX_EN = PINID(4, 2), 125 ENET0_RXD0 = PINID(4, 3), 126 ENET0_RXD1 = PINID(4, 4), 127 ENET0_TX_CLK = PINID(4, 5), 128 ENET0_TX_EN = PINID(4, 6), 129 ENET0_TXD0 = PINID(4, 7), 130 ENET0_TXD1 = PINID(4, 8), 131 ENET0_RXD2 = PINID(4, 9), 132 ENET0_RXD3 = PINID(4, 10), 133 ENET0_TXD2 = PINID(4, 11), 134 ENET0_TXD3 = PINID(4, 12), 135 ENET0_RX_CLK = PINID(4, 13), 136 ENET0_COL = PINID(4, 14), 137 ENET0_CRS = PINID(4, 15), 138 ENET_CLK = PINID(4, 16), 139 JTAG_RTCK = PINID(4, 20), 140 EMI_D00 = PINID(5, 0), 141 EMI_D01 = PINID(5, 1), 142 EMI_D02 = PINID(5, 2), 143 EMI_D03 = PINID(5, 3), 144 EMI_D04 = PINID(5, 4), 145 EMI_D05 = PINID(5, 5), 146 EMI_D06 = PINID(5, 6), 147 EMI_D07 = PINID(5, 7), 148 EMI_D08 = PINID(5, 8), 149 EMI_D09 = PINID(5, 9), 150 EMI_D10 = PINID(5, 10), 151 EMI_D11 = PINID(5, 11), 152 EMI_D12 = PINID(5, 12), 153 EMI_D13 = PINID(5, 13), 154 EMI_D14 = PINID(5, 14), 155 EMI_D15 = PINID(5, 15), 156 EMI_ODT0 = PINID(5, 16), 157 EMI_DQM0 = PINID(5, 17), 158 EMI_ODT1 = PINID(5, 18), 159 EMI_DQM1 = PINID(5, 19), 160 EMI_DDR_OPEN_FB = PINID(5, 20), 161 EMI_CLK = PINID(5, 21), 162 EMI_DQS0 = PINID(5, 22), 163 EMI_DQS1 = PINID(5, 23), 164 EMI_DDR_OPEN = PINID(5, 26), 165 EMI_A00 = PINID(6, 0), 166 EMI_A01 = PINID(6, 1), 167 EMI_A02 = PINID(6, 2), 168 EMI_A03 = PINID(6, 3), 169 EMI_A04 = PINID(6, 4), 170 EMI_A05 = PINID(6, 5), 171 EMI_A06 = PINID(6, 6), 172 EMI_A07 = PINID(6, 7), 173 EMI_A08 = PINID(6, 8), 174 EMI_A09 = PINID(6, 9), 175 EMI_A10 = PINID(6, 10), 176 EMI_A11 = PINID(6, 11), 177 EMI_A12 = PINID(6, 12), 178 EMI_A13 = PINID(6, 13), 179 EMI_A14 = PINID(6, 14), 180 EMI_BA0 = PINID(6, 16), 181 EMI_BA1 = PINID(6, 17), 182 EMI_BA2 = PINID(6, 18), 183 EMI_CASN = PINID(6, 19), 184 EMI_RASN = PINID(6, 20), 185 EMI_WEN = PINID(6, 21), 186 EMI_CE0N = PINID(6, 22), 187 EMI_CE1N = PINID(6, 23), 188 EMI_CKE = PINID(6, 24), 189}; 190 191static const struct pinctrl_pin_desc imx28_pins[] = { 192 MXS_PINCTRL_PIN(GPMI_D00), 193 MXS_PINCTRL_PIN(GPMI_D01), 194 MXS_PINCTRL_PIN(GPMI_D02), 195 MXS_PINCTRL_PIN(GPMI_D03), 196 MXS_PINCTRL_PIN(GPMI_D04), 197 MXS_PINCTRL_PIN(GPMI_D05), 198 MXS_PINCTRL_PIN(GPMI_D06), 199 MXS_PINCTRL_PIN(GPMI_D07), 200 MXS_PINCTRL_PIN(GPMI_CE0N), 201 MXS_PINCTRL_PIN(GPMI_CE1N), 202 MXS_PINCTRL_PIN(GPMI_CE2N), 203 MXS_PINCTRL_PIN(GPMI_CE3N), 204 MXS_PINCTRL_PIN(GPMI_RDY0), 205 MXS_PINCTRL_PIN(GPMI_RDY1), 206 MXS_PINCTRL_PIN(GPMI_RDY2), 207 MXS_PINCTRL_PIN(GPMI_RDY3), 208 MXS_PINCTRL_PIN(GPMI_RDN), 209 MXS_PINCTRL_PIN(GPMI_WRN), 210 MXS_PINCTRL_PIN(GPMI_ALE), 211 MXS_PINCTRL_PIN(GPMI_CLE), 212 MXS_PINCTRL_PIN(GPMI_RESETN), 213 MXS_PINCTRL_PIN(LCD_D00), 214 MXS_PINCTRL_PIN(LCD_D01), 215 MXS_PINCTRL_PIN(LCD_D02), 216 MXS_PINCTRL_PIN(LCD_D03), 217 MXS_PINCTRL_PIN(LCD_D04), 218 MXS_PINCTRL_PIN(LCD_D05), 219 MXS_PINCTRL_PIN(LCD_D06), 220 MXS_PINCTRL_PIN(LCD_D07), 221 MXS_PINCTRL_PIN(LCD_D08), 222 MXS_PINCTRL_PIN(LCD_D09), 223 MXS_PINCTRL_PIN(LCD_D10), 224 MXS_PINCTRL_PIN(LCD_D11), 225 MXS_PINCTRL_PIN(LCD_D12), 226 MXS_PINCTRL_PIN(LCD_D13), 227 MXS_PINCTRL_PIN(LCD_D14), 228 MXS_PINCTRL_PIN(LCD_D15), 229 MXS_PINCTRL_PIN(LCD_D16), 230 MXS_PINCTRL_PIN(LCD_D17), 231 MXS_PINCTRL_PIN(LCD_D18), 232 MXS_PINCTRL_PIN(LCD_D19), 233 MXS_PINCTRL_PIN(LCD_D20), 234 MXS_PINCTRL_PIN(LCD_D21), 235 MXS_PINCTRL_PIN(LCD_D22), 236 MXS_PINCTRL_PIN(LCD_D23), 237 MXS_PINCTRL_PIN(LCD_RD_E), 238 MXS_PINCTRL_PIN(LCD_WR_RWN), 239 MXS_PINCTRL_PIN(LCD_RS), 240 MXS_PINCTRL_PIN(LCD_CS), 241 MXS_PINCTRL_PIN(LCD_VSYNC), 242 MXS_PINCTRL_PIN(LCD_HSYNC), 243 MXS_PINCTRL_PIN(LCD_DOTCLK), 244 MXS_PINCTRL_PIN(LCD_ENABLE), 245 MXS_PINCTRL_PIN(SSP0_DATA0), 246 MXS_PINCTRL_PIN(SSP0_DATA1), 247 MXS_PINCTRL_PIN(SSP0_DATA2), 248 MXS_PINCTRL_PIN(SSP0_DATA3), 249 MXS_PINCTRL_PIN(SSP0_DATA4), 250 MXS_PINCTRL_PIN(SSP0_DATA5), 251 MXS_PINCTRL_PIN(SSP0_DATA6), 252 MXS_PINCTRL_PIN(SSP0_DATA7), 253 MXS_PINCTRL_PIN(SSP0_CMD), 254 MXS_PINCTRL_PIN(SSP0_DETECT), 255 MXS_PINCTRL_PIN(SSP0_SCK), 256 MXS_PINCTRL_PIN(SSP1_SCK), 257 MXS_PINCTRL_PIN(SSP1_CMD), 258 MXS_PINCTRL_PIN(SSP1_DATA0), 259 MXS_PINCTRL_PIN(SSP1_DATA3), 260 MXS_PINCTRL_PIN(SSP2_SCK), 261 MXS_PINCTRL_PIN(SSP2_MOSI), 262 MXS_PINCTRL_PIN(SSP2_MISO), 263 MXS_PINCTRL_PIN(SSP2_SS0), 264 MXS_PINCTRL_PIN(SSP2_SS1), 265 MXS_PINCTRL_PIN(SSP2_SS2), 266 MXS_PINCTRL_PIN(SSP3_SCK), 267 MXS_PINCTRL_PIN(SSP3_MOSI), 268 MXS_PINCTRL_PIN(SSP3_MISO), 269 MXS_PINCTRL_PIN(SSP3_SS0), 270 MXS_PINCTRL_PIN(AUART0_RX), 271 MXS_PINCTRL_PIN(AUART0_TX), 272 MXS_PINCTRL_PIN(AUART0_CTS), 273 MXS_PINCTRL_PIN(AUART0_RTS), 274 MXS_PINCTRL_PIN(AUART1_RX), 275 MXS_PINCTRL_PIN(AUART1_TX), 276 MXS_PINCTRL_PIN(AUART1_CTS), 277 MXS_PINCTRL_PIN(AUART1_RTS), 278 MXS_PINCTRL_PIN(AUART2_RX), 279 MXS_PINCTRL_PIN(AUART2_TX), 280 MXS_PINCTRL_PIN(AUART2_CTS), 281 MXS_PINCTRL_PIN(AUART2_RTS), 282 MXS_PINCTRL_PIN(AUART3_RX), 283 MXS_PINCTRL_PIN(AUART3_TX), 284 MXS_PINCTRL_PIN(AUART3_CTS), 285 MXS_PINCTRL_PIN(AUART3_RTS), 286 MXS_PINCTRL_PIN(PWM0), 287 MXS_PINCTRL_PIN(PWM1), 288 MXS_PINCTRL_PIN(PWM2), 289 MXS_PINCTRL_PIN(SAIF0_MCLK), 290 MXS_PINCTRL_PIN(SAIF0_LRCLK), 291 MXS_PINCTRL_PIN(SAIF0_BITCLK), 292 MXS_PINCTRL_PIN(SAIF0_SDATA0), 293 MXS_PINCTRL_PIN(I2C0_SCL), 294 MXS_PINCTRL_PIN(I2C0_SDA), 295 MXS_PINCTRL_PIN(SAIF1_SDATA0), 296 MXS_PINCTRL_PIN(SPDIF), 297 MXS_PINCTRL_PIN(PWM3), 298 MXS_PINCTRL_PIN(PWM4), 299 MXS_PINCTRL_PIN(LCD_RESET), 300 MXS_PINCTRL_PIN(ENET0_MDC), 301 MXS_PINCTRL_PIN(ENET0_MDIO), 302 MXS_PINCTRL_PIN(ENET0_RX_EN), 303 MXS_PINCTRL_PIN(ENET0_RXD0), 304 MXS_PINCTRL_PIN(ENET0_RXD1), 305 MXS_PINCTRL_PIN(ENET0_TX_CLK), 306 MXS_PINCTRL_PIN(ENET0_TX_EN), 307 MXS_PINCTRL_PIN(ENET0_TXD0), 308 MXS_PINCTRL_PIN(ENET0_TXD1), 309 MXS_PINCTRL_PIN(ENET0_RXD2), 310 MXS_PINCTRL_PIN(ENET0_RXD3), 311 MXS_PINCTRL_PIN(ENET0_TXD2), 312 MXS_PINCTRL_PIN(ENET0_TXD3), 313 MXS_PINCTRL_PIN(ENET0_RX_CLK), 314 MXS_PINCTRL_PIN(ENET0_COL), 315 MXS_PINCTRL_PIN(ENET0_CRS), 316 MXS_PINCTRL_PIN(ENET_CLK), 317 MXS_PINCTRL_PIN(JTAG_RTCK), 318 MXS_PINCTRL_PIN(EMI_D00), 319 MXS_PINCTRL_PIN(EMI_D01), 320 MXS_PINCTRL_PIN(EMI_D02), 321 MXS_PINCTRL_PIN(EMI_D03), 322 MXS_PINCTRL_PIN(EMI_D04), 323 MXS_PINCTRL_PIN(EMI_D05), 324 MXS_PINCTRL_PIN(EMI_D06), 325 MXS_PINCTRL_PIN(EMI_D07), 326 MXS_PINCTRL_PIN(EMI_D08), 327 MXS_PINCTRL_PIN(EMI_D09), 328 MXS_PINCTRL_PIN(EMI_D10), 329 MXS_PINCTRL_PIN(EMI_D11), 330 MXS_PINCTRL_PIN(EMI_D12), 331 MXS_PINCTRL_PIN(EMI_D13), 332 MXS_PINCTRL_PIN(EMI_D14), 333 MXS_PINCTRL_PIN(EMI_D15), 334 MXS_PINCTRL_PIN(EMI_ODT0), 335 MXS_PINCTRL_PIN(EMI_DQM0), 336 MXS_PINCTRL_PIN(EMI_ODT1), 337 MXS_PINCTRL_PIN(EMI_DQM1), 338 MXS_PINCTRL_PIN(EMI_DDR_OPEN_FB), 339 MXS_PINCTRL_PIN(EMI_CLK), 340 MXS_PINCTRL_PIN(EMI_DQS0), 341 MXS_PINCTRL_PIN(EMI_DQS1), 342 MXS_PINCTRL_PIN(EMI_DDR_OPEN), 343 MXS_PINCTRL_PIN(EMI_A00), 344 MXS_PINCTRL_PIN(EMI_A01), 345 MXS_PINCTRL_PIN(EMI_A02), 346 MXS_PINCTRL_PIN(EMI_A03), 347 MXS_PINCTRL_PIN(EMI_A04), 348 MXS_PINCTRL_PIN(EMI_A05), 349 MXS_PINCTRL_PIN(EMI_A06), 350 MXS_PINCTRL_PIN(EMI_A07), 351 MXS_PINCTRL_PIN(EMI_A08), 352 MXS_PINCTRL_PIN(EMI_A09), 353 MXS_PINCTRL_PIN(EMI_A10), 354 MXS_PINCTRL_PIN(EMI_A11), 355 MXS_PINCTRL_PIN(EMI_A12), 356 MXS_PINCTRL_PIN(EMI_A13), 357 MXS_PINCTRL_PIN(EMI_A14), 358 MXS_PINCTRL_PIN(EMI_BA0), 359 MXS_PINCTRL_PIN(EMI_BA1), 360 MXS_PINCTRL_PIN(EMI_BA2), 361 MXS_PINCTRL_PIN(EMI_CASN), 362 MXS_PINCTRL_PIN(EMI_RASN), 363 MXS_PINCTRL_PIN(EMI_WEN), 364 MXS_PINCTRL_PIN(EMI_CE0N), 365 MXS_PINCTRL_PIN(EMI_CE1N), 366 MXS_PINCTRL_PIN(EMI_CKE), 367}; 368 369static const struct mxs_regs imx28_regs = { 370 .muxsel = 0x100, 371 .drive = 0x300, 372 .pull = 0x600, 373}; 374 375static struct mxs_pinctrl_soc_data imx28_pinctrl_data = { 376 .regs = &imx28_regs, 377 .pins = imx28_pins, 378 .npins = ARRAY_SIZE(imx28_pins), 379}; 380 381static int imx28_pinctrl_probe(struct platform_device *pdev) 382{ 383 return mxs_pinctrl_probe(pdev, &imx28_pinctrl_data); 384} 385 386static const struct of_device_id imx28_pinctrl_of_match[] = { 387 { .compatible = "fsl,imx28-pinctrl", }, 388 { /* sentinel */ } 389}; 390 391static struct platform_driver imx28_pinctrl_driver = { 392 .driver = { 393 .name = "imx28-pinctrl", 394 .suppress_bind_attrs = true, 395 .of_match_table = imx28_pinctrl_of_match, 396 }, 397 .probe = imx28_pinctrl_probe, 398}; 399 400static int __init imx28_pinctrl_init(void) 401{ 402 return platform_driver_register(&imx28_pinctrl_driver); 403} 404postcore_initcall(imx28_pinctrl_init);