cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-imx6dl.c (15357B)


      1// SPDX-License-Identifier: GPL-2.0
      2//
      3// Freescale imx6dl pinctrl driver
      4//
      5// Author: Shawn Guo <shawn.guo@linaro.org>
      6// Copyright (C) 2013 Freescale Semiconductor, Inc.
      7
      8#include <linux/err.h>
      9#include <linux/init.h>
     10#include <linux/io.h>
     11#include <linux/of.h>
     12#include <linux/of_device.h>
     13#include <linux/pinctrl/pinctrl.h>
     14
     15#include "pinctrl-imx.h"
     16
     17enum imx6dl_pads {
     18	MX6DL_PAD_RESERVE0 = 0,
     19	MX6DL_PAD_RESERVE1 = 1,
     20	MX6DL_PAD_RESERVE2 = 2,
     21	MX6DL_PAD_RESERVE3 = 3,
     22	MX6DL_PAD_RESERVE4 = 4,
     23	MX6DL_PAD_RESERVE5 = 5,
     24	MX6DL_PAD_RESERVE6 = 6,
     25	MX6DL_PAD_RESERVE7 = 7,
     26	MX6DL_PAD_RESERVE8 = 8,
     27	MX6DL_PAD_RESERVE9 = 9,
     28	MX6DL_PAD_RESERVE10 = 10,
     29	MX6DL_PAD_RESERVE11 = 11,
     30	MX6DL_PAD_RESERVE12 = 12,
     31	MX6DL_PAD_RESERVE13 = 13,
     32	MX6DL_PAD_RESERVE14 = 14,
     33	MX6DL_PAD_RESERVE15 = 15,
     34	MX6DL_PAD_RESERVE16 = 16,
     35	MX6DL_PAD_RESERVE17 = 17,
     36	MX6DL_PAD_RESERVE18 = 18,
     37	MX6DL_PAD_CSI0_DAT10 = 19,
     38	MX6DL_PAD_CSI0_DAT11 = 20,
     39	MX6DL_PAD_CSI0_DAT12 = 21,
     40	MX6DL_PAD_CSI0_DAT13 = 22,
     41	MX6DL_PAD_CSI0_DAT14 = 23,
     42	MX6DL_PAD_CSI0_DAT15 = 24,
     43	MX6DL_PAD_CSI0_DAT16 = 25,
     44	MX6DL_PAD_CSI0_DAT17 = 26,
     45	MX6DL_PAD_CSI0_DAT18 = 27,
     46	MX6DL_PAD_CSI0_DAT19 = 28,
     47	MX6DL_PAD_CSI0_DAT4 = 29,
     48	MX6DL_PAD_CSI0_DAT5 = 30,
     49	MX6DL_PAD_CSI0_DAT6 = 31,
     50	MX6DL_PAD_CSI0_DAT7 = 32,
     51	MX6DL_PAD_CSI0_DAT8 = 33,
     52	MX6DL_PAD_CSI0_DAT9 = 34,
     53	MX6DL_PAD_CSI0_DATA_EN = 35,
     54	MX6DL_PAD_CSI0_MCLK = 36,
     55	MX6DL_PAD_CSI0_PIXCLK = 37,
     56	MX6DL_PAD_CSI0_VSYNC = 38,
     57	MX6DL_PAD_DI0_DISP_CLK = 39,
     58	MX6DL_PAD_DI0_PIN15 = 40,
     59	MX6DL_PAD_DI0_PIN2 = 41,
     60	MX6DL_PAD_DI0_PIN3 = 42,
     61	MX6DL_PAD_DI0_PIN4 = 43,
     62	MX6DL_PAD_DISP0_DAT0 = 44,
     63	MX6DL_PAD_DISP0_DAT1 = 45,
     64	MX6DL_PAD_DISP0_DAT10 = 46,
     65	MX6DL_PAD_DISP0_DAT11 = 47,
     66	MX6DL_PAD_DISP0_DAT12 = 48,
     67	MX6DL_PAD_DISP0_DAT13 = 49,
     68	MX6DL_PAD_DISP0_DAT14 = 50,
     69	MX6DL_PAD_DISP0_DAT15 = 51,
     70	MX6DL_PAD_DISP0_DAT16 = 52,
     71	MX6DL_PAD_DISP0_DAT17 = 53,
     72	MX6DL_PAD_DISP0_DAT18 = 54,
     73	MX6DL_PAD_DISP0_DAT19 = 55,
     74	MX6DL_PAD_DISP0_DAT2 = 56,
     75	MX6DL_PAD_DISP0_DAT20 = 57,
     76	MX6DL_PAD_DISP0_DAT21 = 58,
     77	MX6DL_PAD_DISP0_DAT22 = 59,
     78	MX6DL_PAD_DISP0_DAT23 = 60,
     79	MX6DL_PAD_DISP0_DAT3 = 61,
     80	MX6DL_PAD_DISP0_DAT4 = 62,
     81	MX6DL_PAD_DISP0_DAT5 = 63,
     82	MX6DL_PAD_DISP0_DAT6 = 64,
     83	MX6DL_PAD_DISP0_DAT7 = 65,
     84	MX6DL_PAD_DISP0_DAT8 = 66,
     85	MX6DL_PAD_DISP0_DAT9 = 67,
     86	MX6DL_PAD_EIM_A16 = 68,
     87	MX6DL_PAD_EIM_A17 = 69,
     88	MX6DL_PAD_EIM_A18 = 70,
     89	MX6DL_PAD_EIM_A19 = 71,
     90	MX6DL_PAD_EIM_A20 = 72,
     91	MX6DL_PAD_EIM_A21 = 73,
     92	MX6DL_PAD_EIM_A22 = 74,
     93	MX6DL_PAD_EIM_A23 = 75,
     94	MX6DL_PAD_EIM_A24 = 76,
     95	MX6DL_PAD_EIM_A25 = 77,
     96	MX6DL_PAD_EIM_BCLK = 78,
     97	MX6DL_PAD_EIM_CS0 = 79,
     98	MX6DL_PAD_EIM_CS1 = 80,
     99	MX6DL_PAD_EIM_D16 = 81,
    100	MX6DL_PAD_EIM_D17 = 82,
    101	MX6DL_PAD_EIM_D18 = 83,
    102	MX6DL_PAD_EIM_D19 = 84,
    103	MX6DL_PAD_EIM_D20 = 85,
    104	MX6DL_PAD_EIM_D21 = 86,
    105	MX6DL_PAD_EIM_D22 = 87,
    106	MX6DL_PAD_EIM_D23 = 88,
    107	MX6DL_PAD_EIM_D24 = 89,
    108	MX6DL_PAD_EIM_D25 = 90,
    109	MX6DL_PAD_EIM_D26 = 91,
    110	MX6DL_PAD_EIM_D27 = 92,
    111	MX6DL_PAD_EIM_D28 = 93,
    112	MX6DL_PAD_EIM_D29 = 94,
    113	MX6DL_PAD_EIM_D30 = 95,
    114	MX6DL_PAD_EIM_D31 = 96,
    115	MX6DL_PAD_EIM_DA0 = 97,
    116	MX6DL_PAD_EIM_DA1 = 98,
    117	MX6DL_PAD_EIM_DA10 = 99,
    118	MX6DL_PAD_EIM_DA11 = 100,
    119	MX6DL_PAD_EIM_DA12 = 101,
    120	MX6DL_PAD_EIM_DA13 = 102,
    121	MX6DL_PAD_EIM_DA14 = 103,
    122	MX6DL_PAD_EIM_DA15 = 104,
    123	MX6DL_PAD_EIM_DA2 = 105,
    124	MX6DL_PAD_EIM_DA3 = 106,
    125	MX6DL_PAD_EIM_DA4 = 107,
    126	MX6DL_PAD_EIM_DA5 = 108,
    127	MX6DL_PAD_EIM_DA6 = 109,
    128	MX6DL_PAD_EIM_DA7 = 110,
    129	MX6DL_PAD_EIM_DA8 = 111,
    130	MX6DL_PAD_EIM_DA9 = 112,
    131	MX6DL_PAD_EIM_EB0 = 113,
    132	MX6DL_PAD_EIM_EB1 = 114,
    133	MX6DL_PAD_EIM_EB2 = 115,
    134	MX6DL_PAD_EIM_EB3 = 116,
    135	MX6DL_PAD_EIM_LBA = 117,
    136	MX6DL_PAD_EIM_OE = 118,
    137	MX6DL_PAD_EIM_RW = 119,
    138	MX6DL_PAD_EIM_WAIT = 120,
    139	MX6DL_PAD_ENET_CRS_DV = 121,
    140	MX6DL_PAD_ENET_MDC = 122,
    141	MX6DL_PAD_ENET_MDIO = 123,
    142	MX6DL_PAD_ENET_REF_CLK = 124,
    143	MX6DL_PAD_ENET_RX_ER = 125,
    144	MX6DL_PAD_ENET_RXD0 = 126,
    145	MX6DL_PAD_ENET_RXD1 = 127,
    146	MX6DL_PAD_ENET_TX_EN = 128,
    147	MX6DL_PAD_ENET_TXD0 = 129,
    148	MX6DL_PAD_ENET_TXD1 = 130,
    149	MX6DL_PAD_GPIO_0 = 131,
    150	MX6DL_PAD_GPIO_1 = 132,
    151	MX6DL_PAD_GPIO_16 = 133,
    152	MX6DL_PAD_GPIO_17 = 134,
    153	MX6DL_PAD_GPIO_18 = 135,
    154	MX6DL_PAD_GPIO_19 = 136,
    155	MX6DL_PAD_GPIO_2 = 137,
    156	MX6DL_PAD_GPIO_3 = 138,
    157	MX6DL_PAD_GPIO_4 = 139,
    158	MX6DL_PAD_GPIO_5 = 140,
    159	MX6DL_PAD_GPIO_6 = 141,
    160	MX6DL_PAD_GPIO_7 = 142,
    161	MX6DL_PAD_GPIO_8 = 143,
    162	MX6DL_PAD_GPIO_9 = 144,
    163	MX6DL_PAD_KEY_COL0 = 145,
    164	MX6DL_PAD_KEY_COL1 = 146,
    165	MX6DL_PAD_KEY_COL2 = 147,
    166	MX6DL_PAD_KEY_COL3 = 148,
    167	MX6DL_PAD_KEY_COL4 = 149,
    168	MX6DL_PAD_KEY_ROW0 = 150,
    169	MX6DL_PAD_KEY_ROW1 = 151,
    170	MX6DL_PAD_KEY_ROW2 = 152,
    171	MX6DL_PAD_KEY_ROW3 = 153,
    172	MX6DL_PAD_KEY_ROW4 = 154,
    173	MX6DL_PAD_NANDF_ALE = 155,
    174	MX6DL_PAD_NANDF_CLE = 156,
    175	MX6DL_PAD_NANDF_CS0 = 157,
    176	MX6DL_PAD_NANDF_CS1 = 158,
    177	MX6DL_PAD_NANDF_CS2 = 159,
    178	MX6DL_PAD_NANDF_CS3 = 160,
    179	MX6DL_PAD_NANDF_D0 = 161,
    180	MX6DL_PAD_NANDF_D1 = 162,
    181	MX6DL_PAD_NANDF_D2 = 163,
    182	MX6DL_PAD_NANDF_D3 = 164,
    183	MX6DL_PAD_NANDF_D4 = 165,
    184	MX6DL_PAD_NANDF_D5 = 166,
    185	MX6DL_PAD_NANDF_D6 = 167,
    186	MX6DL_PAD_NANDF_D7 = 168,
    187	MX6DL_PAD_NANDF_RB0 = 169,
    188	MX6DL_PAD_NANDF_WP_B = 170,
    189	MX6DL_PAD_RGMII_RD0 = 171,
    190	MX6DL_PAD_RGMII_RD1 = 172,
    191	MX6DL_PAD_RGMII_RD2 = 173,
    192	MX6DL_PAD_RGMII_RD3 = 174,
    193	MX6DL_PAD_RGMII_RX_CTL = 175,
    194	MX6DL_PAD_RGMII_RXC = 176,
    195	MX6DL_PAD_RGMII_TD0 = 177,
    196	MX6DL_PAD_RGMII_TD1 = 178,
    197	MX6DL_PAD_RGMII_TD2 = 179,
    198	MX6DL_PAD_RGMII_TD3 = 180,
    199	MX6DL_PAD_RGMII_TX_CTL = 181,
    200	MX6DL_PAD_RGMII_TXC = 182,
    201	MX6DL_PAD_SD1_CLK = 183,
    202	MX6DL_PAD_SD1_CMD = 184,
    203	MX6DL_PAD_SD1_DAT0 = 185,
    204	MX6DL_PAD_SD1_DAT1 = 186,
    205	MX6DL_PAD_SD1_DAT2 = 187,
    206	MX6DL_PAD_SD1_DAT3 = 188,
    207	MX6DL_PAD_SD2_CLK = 189,
    208	MX6DL_PAD_SD2_CMD = 190,
    209	MX6DL_PAD_SD2_DAT0 = 191,
    210	MX6DL_PAD_SD2_DAT1 = 192,
    211	MX6DL_PAD_SD2_DAT2 = 193,
    212	MX6DL_PAD_SD2_DAT3 = 194,
    213	MX6DL_PAD_SD3_CLK = 195,
    214	MX6DL_PAD_SD3_CMD = 196,
    215	MX6DL_PAD_SD3_DAT0 = 197,
    216	MX6DL_PAD_SD3_DAT1 = 198,
    217	MX6DL_PAD_SD3_DAT2 = 199,
    218	MX6DL_PAD_SD3_DAT3 = 200,
    219	MX6DL_PAD_SD3_DAT4 = 201,
    220	MX6DL_PAD_SD3_DAT5 = 202,
    221	MX6DL_PAD_SD3_DAT6 = 203,
    222	MX6DL_PAD_SD3_DAT7 = 204,
    223	MX6DL_PAD_SD3_RST = 205,
    224	MX6DL_PAD_SD4_CLK = 206,
    225	MX6DL_PAD_SD4_CMD = 207,
    226	MX6DL_PAD_SD4_DAT0 = 208,
    227	MX6DL_PAD_SD4_DAT1 = 209,
    228	MX6DL_PAD_SD4_DAT2 = 210,
    229	MX6DL_PAD_SD4_DAT3 = 211,
    230	MX6DL_PAD_SD4_DAT4 = 212,
    231	MX6DL_PAD_SD4_DAT5 = 213,
    232	MX6DL_PAD_SD4_DAT6 = 214,
    233	MX6DL_PAD_SD4_DAT7 = 215,
    234};
    235
    236/* Pad names for the pinmux subsystem */
    237static const struct pinctrl_pin_desc imx6dl_pinctrl_pads[] = {
    238	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE0),
    239	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE1),
    240	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE2),
    241	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE3),
    242	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE4),
    243	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE5),
    244	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE6),
    245	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE7),
    246	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE8),
    247	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE9),
    248	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE10),
    249	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE11),
    250	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE12),
    251	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE13),
    252	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE14),
    253	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE15),
    254	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE16),
    255	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE17),
    256	IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE18),
    257	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT10),
    258	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT11),
    259	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT12),
    260	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT13),
    261	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT14),
    262	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT15),
    263	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT16),
    264	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT17),
    265	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT18),
    266	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT19),
    267	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT4),
    268	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT5),
    269	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT6),
    270	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT7),
    271	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT8),
    272	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT9),
    273	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DATA_EN),
    274	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_MCLK),
    275	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_PIXCLK),
    276	IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_VSYNC),
    277	IMX_PINCTRL_PIN(MX6DL_PAD_DI0_DISP_CLK),
    278	IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN15),
    279	IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN2),
    280	IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN3),
    281	IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN4),
    282	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT0),
    283	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT1),
    284	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT10),
    285	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT11),
    286	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT12),
    287	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT13),
    288	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT14),
    289	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT15),
    290	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT16),
    291	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT17),
    292	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT18),
    293	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT19),
    294	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT2),
    295	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT20),
    296	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT21),
    297	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT22),
    298	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT23),
    299	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT3),
    300	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT4),
    301	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT5),
    302	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT6),
    303	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT7),
    304	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT8),
    305	IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT9),
    306	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A16),
    307	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A17),
    308	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A18),
    309	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A19),
    310	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A20),
    311	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A21),
    312	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A22),
    313	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A23),
    314	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A24),
    315	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A25),
    316	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_BCLK),
    317	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS0),
    318	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS1),
    319	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D16),
    320	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D17),
    321	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D18),
    322	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D19),
    323	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D20),
    324	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D21),
    325	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D22),
    326	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D23),
    327	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D24),
    328	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D25),
    329	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D26),
    330	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D27),
    331	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D28),
    332	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D29),
    333	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D30),
    334	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D31),
    335	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA0),
    336	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA1),
    337	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA10),
    338	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA11),
    339	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA12),
    340	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA13),
    341	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA14),
    342	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA15),
    343	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA2),
    344	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA3),
    345	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA4),
    346	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA5),
    347	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA6),
    348	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA7),
    349	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA8),
    350	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA9),
    351	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB0),
    352	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB1),
    353	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB2),
    354	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB3),
    355	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_LBA),
    356	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_OE),
    357	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_RW),
    358	IMX_PINCTRL_PIN(MX6DL_PAD_EIM_WAIT),
    359	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_CRS_DV),
    360	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDC),
    361	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDIO),
    362	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_REF_CLK),
    363	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RX_ER),
    364	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD0),
    365	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD1),
    366	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TX_EN),
    367	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD0),
    368	IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD1),
    369	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_0),
    370	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_1),
    371	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_16),
    372	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_17),
    373	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_18),
    374	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_19),
    375	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_2),
    376	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_3),
    377	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_4),
    378	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_5),
    379	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_6),
    380	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_7),
    381	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_8),
    382	IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_9),
    383	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL0),
    384	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL1),
    385	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL2),
    386	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL3),
    387	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL4),
    388	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW0),
    389	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW1),
    390	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW2),
    391	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW3),
    392	IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW4),
    393	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_ALE),
    394	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CLE),
    395	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS0),
    396	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS1),
    397	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS2),
    398	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS3),
    399	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D0),
    400	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D1),
    401	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D2),
    402	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D3),
    403	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D4),
    404	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D5),
    405	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D6),
    406	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D7),
    407	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_RB0),
    408	IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_WP_B),
    409	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD0),
    410	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD1),
    411	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD2),
    412	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD3),
    413	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RX_CTL),
    414	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RXC),
    415	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD0),
    416	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD1),
    417	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD2),
    418	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD3),
    419	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TX_CTL),
    420	IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TXC),
    421	IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CLK),
    422	IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CMD),
    423	IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT0),
    424	IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT1),
    425	IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT2),
    426	IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT3),
    427	IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CLK),
    428	IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CMD),
    429	IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT0),
    430	IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT1),
    431	IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT2),
    432	IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT3),
    433	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CLK),
    434	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CMD),
    435	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT0),
    436	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT1),
    437	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT2),
    438	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT3),
    439	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT4),
    440	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT5),
    441	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT6),
    442	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT7),
    443	IMX_PINCTRL_PIN(MX6DL_PAD_SD3_RST),
    444	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CLK),
    445	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CMD),
    446	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT0),
    447	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT1),
    448	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT2),
    449	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT3),
    450	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT4),
    451	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT5),
    452	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT6),
    453	IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT7),
    454};
    455
    456static const struct imx_pinctrl_soc_info imx6dl_pinctrl_info = {
    457	.pins = imx6dl_pinctrl_pads,
    458	.npins = ARRAY_SIZE(imx6dl_pinctrl_pads),
    459	.gpr_compatible = "fsl,imx6q-iomuxc-gpr",
    460};
    461
    462static const struct of_device_id imx6dl_pinctrl_of_match[] = {
    463	{ .compatible = "fsl,imx6dl-iomuxc", },
    464	{ /* sentinel */ }
    465};
    466
    467static int imx6dl_pinctrl_probe(struct platform_device *pdev)
    468{
    469	return imx_pinctrl_probe(pdev, &imx6dl_pinctrl_info);
    470}
    471
    472static struct platform_driver imx6dl_pinctrl_driver = {
    473	.driver = {
    474		.name = "imx6dl-pinctrl",
    475		.of_match_table = imx6dl_pinctrl_of_match,
    476		.suppress_bind_attrs = true,
    477	},
    478	.probe = imx6dl_pinctrl_probe,
    479};
    480
    481static int __init imx6dl_pinctrl_init(void)
    482{
    483	return platform_driver_register(&imx6dl_pinctrl_driver);
    484}
    485arch_initcall(imx6dl_pinctrl_init);