cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-imx6q.c (14968B)


      1// SPDX-License-Identifier: GPL-2.0+
      2//
      3// imx6q pinctrl driver based on imx pinmux core
      4//
      5// Copyright (C) 2012 Freescale Semiconductor, Inc.
      6// Copyright (C) 2012 Linaro, Inc.
      7//
      8// Author: Dong Aisheng <dong.aisheng@linaro.org>
      9
     10#include <linux/err.h>
     11#include <linux/init.h>
     12#include <linux/io.h>
     13#include <linux/of.h>
     14#include <linux/of_device.h>
     15#include <linux/pinctrl/pinctrl.h>
     16
     17#include "pinctrl-imx.h"
     18
     19enum imx6q_pads {
     20	MX6Q_PAD_RESERVE0 = 0,
     21	MX6Q_PAD_RESERVE1 = 1,
     22	MX6Q_PAD_RESERVE2 = 2,
     23	MX6Q_PAD_RESERVE3 = 3,
     24	MX6Q_PAD_RESERVE4 = 4,
     25	MX6Q_PAD_RESERVE5 = 5,
     26	MX6Q_PAD_RESERVE6 = 6,
     27	MX6Q_PAD_RESERVE7 = 7,
     28	MX6Q_PAD_RESERVE8 = 8,
     29	MX6Q_PAD_RESERVE9 = 9,
     30	MX6Q_PAD_RESERVE10 = 10,
     31	MX6Q_PAD_RESERVE11 = 11,
     32	MX6Q_PAD_RESERVE12 = 12,
     33	MX6Q_PAD_RESERVE13 = 13,
     34	MX6Q_PAD_RESERVE14 = 14,
     35	MX6Q_PAD_RESERVE15 = 15,
     36	MX6Q_PAD_RESERVE16 = 16,
     37	MX6Q_PAD_RESERVE17 = 17,
     38	MX6Q_PAD_RESERVE18 = 18,
     39	MX6Q_PAD_SD2_DAT1 = 19,
     40	MX6Q_PAD_SD2_DAT2 = 20,
     41	MX6Q_PAD_SD2_DAT0 = 21,
     42	MX6Q_PAD_RGMII_TXC = 22,
     43	MX6Q_PAD_RGMII_TD0 = 23,
     44	MX6Q_PAD_RGMII_TD1 = 24,
     45	MX6Q_PAD_RGMII_TD2 = 25,
     46	MX6Q_PAD_RGMII_TD3 = 26,
     47	MX6Q_PAD_RGMII_RX_CTL = 27,
     48	MX6Q_PAD_RGMII_RD0 = 28,
     49	MX6Q_PAD_RGMII_TX_CTL = 29,
     50	MX6Q_PAD_RGMII_RD1 = 30,
     51	MX6Q_PAD_RGMII_RD2 = 31,
     52	MX6Q_PAD_RGMII_RD3 = 32,
     53	MX6Q_PAD_RGMII_RXC = 33,
     54	MX6Q_PAD_EIM_A25 = 34,
     55	MX6Q_PAD_EIM_EB2 = 35,
     56	MX6Q_PAD_EIM_D16 = 36,
     57	MX6Q_PAD_EIM_D17 = 37,
     58	MX6Q_PAD_EIM_D18 = 38,
     59	MX6Q_PAD_EIM_D19 = 39,
     60	MX6Q_PAD_EIM_D20 = 40,
     61	MX6Q_PAD_EIM_D21 = 41,
     62	MX6Q_PAD_EIM_D22 = 42,
     63	MX6Q_PAD_EIM_D23 = 43,
     64	MX6Q_PAD_EIM_EB3 = 44,
     65	MX6Q_PAD_EIM_D24 = 45,
     66	MX6Q_PAD_EIM_D25 = 46,
     67	MX6Q_PAD_EIM_D26 = 47,
     68	MX6Q_PAD_EIM_D27 = 48,
     69	MX6Q_PAD_EIM_D28 = 49,
     70	MX6Q_PAD_EIM_D29 = 50,
     71	MX6Q_PAD_EIM_D30 = 51,
     72	MX6Q_PAD_EIM_D31 = 52,
     73	MX6Q_PAD_EIM_A24 = 53,
     74	MX6Q_PAD_EIM_A23 = 54,
     75	MX6Q_PAD_EIM_A22 = 55,
     76	MX6Q_PAD_EIM_A21 = 56,
     77	MX6Q_PAD_EIM_A20 = 57,
     78	MX6Q_PAD_EIM_A19 = 58,
     79	MX6Q_PAD_EIM_A18 = 59,
     80	MX6Q_PAD_EIM_A17 = 60,
     81	MX6Q_PAD_EIM_A16 = 61,
     82	MX6Q_PAD_EIM_CS0 = 62,
     83	MX6Q_PAD_EIM_CS1 = 63,
     84	MX6Q_PAD_EIM_OE = 64,
     85	MX6Q_PAD_EIM_RW = 65,
     86	MX6Q_PAD_EIM_LBA = 66,
     87	MX6Q_PAD_EIM_EB0 = 67,
     88	MX6Q_PAD_EIM_EB1 = 68,
     89	MX6Q_PAD_EIM_DA0 = 69,
     90	MX6Q_PAD_EIM_DA1 = 70,
     91	MX6Q_PAD_EIM_DA2 = 71,
     92	MX6Q_PAD_EIM_DA3 = 72,
     93	MX6Q_PAD_EIM_DA4 = 73,
     94	MX6Q_PAD_EIM_DA5 = 74,
     95	MX6Q_PAD_EIM_DA6 = 75,
     96	MX6Q_PAD_EIM_DA7 = 76,
     97	MX6Q_PAD_EIM_DA8 = 77,
     98	MX6Q_PAD_EIM_DA9 = 78,
     99	MX6Q_PAD_EIM_DA10 = 79,
    100	MX6Q_PAD_EIM_DA11 = 80,
    101	MX6Q_PAD_EIM_DA12 = 81,
    102	MX6Q_PAD_EIM_DA13 = 82,
    103	MX6Q_PAD_EIM_DA14 = 83,
    104	MX6Q_PAD_EIM_DA15 = 84,
    105	MX6Q_PAD_EIM_WAIT = 85,
    106	MX6Q_PAD_EIM_BCLK = 86,
    107	MX6Q_PAD_DI0_DISP_CLK = 87,
    108	MX6Q_PAD_DI0_PIN15 = 88,
    109	MX6Q_PAD_DI0_PIN2 = 89,
    110	MX6Q_PAD_DI0_PIN3 = 90,
    111	MX6Q_PAD_DI0_PIN4 = 91,
    112	MX6Q_PAD_DISP0_DAT0 = 92,
    113	MX6Q_PAD_DISP0_DAT1 = 93,
    114	MX6Q_PAD_DISP0_DAT2 = 94,
    115	MX6Q_PAD_DISP0_DAT3 = 95,
    116	MX6Q_PAD_DISP0_DAT4 = 96,
    117	MX6Q_PAD_DISP0_DAT5 = 97,
    118	MX6Q_PAD_DISP0_DAT6 = 98,
    119	MX6Q_PAD_DISP0_DAT7 = 99,
    120	MX6Q_PAD_DISP0_DAT8 = 100,
    121	MX6Q_PAD_DISP0_DAT9 = 101,
    122	MX6Q_PAD_DISP0_DAT10 = 102,
    123	MX6Q_PAD_DISP0_DAT11 = 103,
    124	MX6Q_PAD_DISP0_DAT12 = 104,
    125	MX6Q_PAD_DISP0_DAT13 = 105,
    126	MX6Q_PAD_DISP0_DAT14 = 106,
    127	MX6Q_PAD_DISP0_DAT15 = 107,
    128	MX6Q_PAD_DISP0_DAT16 = 108,
    129	MX6Q_PAD_DISP0_DAT17 = 109,
    130	MX6Q_PAD_DISP0_DAT18 = 110,
    131	MX6Q_PAD_DISP0_DAT19 = 111,
    132	MX6Q_PAD_DISP0_DAT20 = 112,
    133	MX6Q_PAD_DISP0_DAT21 = 113,
    134	MX6Q_PAD_DISP0_DAT22 = 114,
    135	MX6Q_PAD_DISP0_DAT23 = 115,
    136	MX6Q_PAD_ENET_MDIO = 116,
    137	MX6Q_PAD_ENET_REF_CLK = 117,
    138	MX6Q_PAD_ENET_RX_ER = 118,
    139	MX6Q_PAD_ENET_CRS_DV = 119,
    140	MX6Q_PAD_ENET_RXD1 = 120,
    141	MX6Q_PAD_ENET_RXD0 = 121,
    142	MX6Q_PAD_ENET_TX_EN = 122,
    143	MX6Q_PAD_ENET_TXD1 = 123,
    144	MX6Q_PAD_ENET_TXD0 = 124,
    145	MX6Q_PAD_ENET_MDC = 125,
    146	MX6Q_PAD_KEY_COL0 = 126,
    147	MX6Q_PAD_KEY_ROW0 = 127,
    148	MX6Q_PAD_KEY_COL1 = 128,
    149	MX6Q_PAD_KEY_ROW1 = 129,
    150	MX6Q_PAD_KEY_COL2 = 130,
    151	MX6Q_PAD_KEY_ROW2 = 131,
    152	MX6Q_PAD_KEY_COL3 = 132,
    153	MX6Q_PAD_KEY_ROW3 = 133,
    154	MX6Q_PAD_KEY_COL4 = 134,
    155	MX6Q_PAD_KEY_ROW4 = 135,
    156	MX6Q_PAD_GPIO_0 = 136,
    157	MX6Q_PAD_GPIO_1 = 137,
    158	MX6Q_PAD_GPIO_9 = 138,
    159	MX6Q_PAD_GPIO_3 = 139,
    160	MX6Q_PAD_GPIO_6 = 140,
    161	MX6Q_PAD_GPIO_2 = 141,
    162	MX6Q_PAD_GPIO_4 = 142,
    163	MX6Q_PAD_GPIO_5 = 143,
    164	MX6Q_PAD_GPIO_7 = 144,
    165	MX6Q_PAD_GPIO_8 = 145,
    166	MX6Q_PAD_GPIO_16 = 146,
    167	MX6Q_PAD_GPIO_17 = 147,
    168	MX6Q_PAD_GPIO_18 = 148,
    169	MX6Q_PAD_GPIO_19 = 149,
    170	MX6Q_PAD_CSI0_PIXCLK = 150,
    171	MX6Q_PAD_CSI0_MCLK = 151,
    172	MX6Q_PAD_CSI0_DATA_EN = 152,
    173	MX6Q_PAD_CSI0_VSYNC = 153,
    174	MX6Q_PAD_CSI0_DAT4 = 154,
    175	MX6Q_PAD_CSI0_DAT5 = 155,
    176	MX6Q_PAD_CSI0_DAT6 = 156,
    177	MX6Q_PAD_CSI0_DAT7 = 157,
    178	MX6Q_PAD_CSI0_DAT8 = 158,
    179	MX6Q_PAD_CSI0_DAT9 = 159,
    180	MX6Q_PAD_CSI0_DAT10 = 160,
    181	MX6Q_PAD_CSI0_DAT11 = 161,
    182	MX6Q_PAD_CSI0_DAT12 = 162,
    183	MX6Q_PAD_CSI0_DAT13 = 163,
    184	MX6Q_PAD_CSI0_DAT14 = 164,
    185	MX6Q_PAD_CSI0_DAT15 = 165,
    186	MX6Q_PAD_CSI0_DAT16 = 166,
    187	MX6Q_PAD_CSI0_DAT17 = 167,
    188	MX6Q_PAD_CSI0_DAT18 = 168,
    189	MX6Q_PAD_CSI0_DAT19 = 169,
    190	MX6Q_PAD_SD3_DAT7 = 170,
    191	MX6Q_PAD_SD3_DAT6 = 171,
    192	MX6Q_PAD_SD3_DAT5 = 172,
    193	MX6Q_PAD_SD3_DAT4 = 173,
    194	MX6Q_PAD_SD3_CMD = 174,
    195	MX6Q_PAD_SD3_CLK = 175,
    196	MX6Q_PAD_SD3_DAT0 = 176,
    197	MX6Q_PAD_SD3_DAT1 = 177,
    198	MX6Q_PAD_SD3_DAT2 = 178,
    199	MX6Q_PAD_SD3_DAT3 = 179,
    200	MX6Q_PAD_SD3_RST = 180,
    201	MX6Q_PAD_NANDF_CLE = 181,
    202	MX6Q_PAD_NANDF_ALE = 182,
    203	MX6Q_PAD_NANDF_WP_B = 183,
    204	MX6Q_PAD_NANDF_RB0 = 184,
    205	MX6Q_PAD_NANDF_CS0 = 185,
    206	MX6Q_PAD_NANDF_CS1 = 186,
    207	MX6Q_PAD_NANDF_CS2 = 187,
    208	MX6Q_PAD_NANDF_CS3 = 188,
    209	MX6Q_PAD_SD4_CMD = 189,
    210	MX6Q_PAD_SD4_CLK = 190,
    211	MX6Q_PAD_NANDF_D0 = 191,
    212	MX6Q_PAD_NANDF_D1 = 192,
    213	MX6Q_PAD_NANDF_D2 = 193,
    214	MX6Q_PAD_NANDF_D3 = 194,
    215	MX6Q_PAD_NANDF_D4 = 195,
    216	MX6Q_PAD_NANDF_D5 = 196,
    217	MX6Q_PAD_NANDF_D6 = 197,
    218	MX6Q_PAD_NANDF_D7 = 198,
    219	MX6Q_PAD_SD4_DAT0 = 199,
    220	MX6Q_PAD_SD4_DAT1 = 200,
    221	MX6Q_PAD_SD4_DAT2 = 201,
    222	MX6Q_PAD_SD4_DAT3 = 202,
    223	MX6Q_PAD_SD4_DAT4 = 203,
    224	MX6Q_PAD_SD4_DAT5 = 204,
    225	MX6Q_PAD_SD4_DAT6 = 205,
    226	MX6Q_PAD_SD4_DAT7 = 206,
    227	MX6Q_PAD_SD1_DAT1 = 207,
    228	MX6Q_PAD_SD1_DAT0 = 208,
    229	MX6Q_PAD_SD1_DAT3 = 209,
    230	MX6Q_PAD_SD1_CMD = 210,
    231	MX6Q_PAD_SD1_DAT2 = 211,
    232	MX6Q_PAD_SD1_CLK = 212,
    233	MX6Q_PAD_SD2_CLK = 213,
    234	MX6Q_PAD_SD2_CMD = 214,
    235	MX6Q_PAD_SD2_DAT3 = 215,
    236};
    237
    238/* Pad names for the pinmux subsystem */
    239static const struct pinctrl_pin_desc imx6q_pinctrl_pads[] = {
    240	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE0),
    241	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE1),
    242	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE2),
    243	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE3),
    244	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE4),
    245	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE5),
    246	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE6),
    247	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE7),
    248	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE8),
    249	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE9),
    250	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE10),
    251	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE11),
    252	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE12),
    253	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE13),
    254	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE14),
    255	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE15),
    256	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE16),
    257	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE17),
    258	IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE18),
    259	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT1),
    260	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT2),
    261	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT0),
    262	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TXC),
    263	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD0),
    264	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD1),
    265	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD2),
    266	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD3),
    267	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RX_CTL),
    268	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD0),
    269	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TX_CTL),
    270	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD1),
    271	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD2),
    272	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD3),
    273	IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RXC),
    274	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A25),
    275	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB2),
    276	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D16),
    277	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D17),
    278	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D18),
    279	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D19),
    280	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D20),
    281	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D21),
    282	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D22),
    283	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D23),
    284	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB3),
    285	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D24),
    286	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D25),
    287	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D26),
    288	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D27),
    289	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D28),
    290	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D29),
    291	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D30),
    292	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D31),
    293	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A24),
    294	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A23),
    295	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A22),
    296	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A21),
    297	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A20),
    298	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A19),
    299	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A18),
    300	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A17),
    301	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A16),
    302	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS0),
    303	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS1),
    304	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_OE),
    305	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_RW),
    306	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_LBA),
    307	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB0),
    308	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB1),
    309	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA0),
    310	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA1),
    311	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA2),
    312	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA3),
    313	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA4),
    314	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA5),
    315	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA6),
    316	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA7),
    317	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA8),
    318	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA9),
    319	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA10),
    320	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA11),
    321	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA12),
    322	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA13),
    323	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA14),
    324	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA15),
    325	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_WAIT),
    326	IMX_PINCTRL_PIN(MX6Q_PAD_EIM_BCLK),
    327	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_DISP_CLK),
    328	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN15),
    329	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN2),
    330	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN3),
    331	IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN4),
    332	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT0),
    333	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT1),
    334	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT2),
    335	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT3),
    336	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT4),
    337	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT5),
    338	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT6),
    339	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT7),
    340	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT8),
    341	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT9),
    342	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT10),
    343	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT11),
    344	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT12),
    345	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT13),
    346	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT14),
    347	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT15),
    348	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT16),
    349	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT17),
    350	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT18),
    351	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT19),
    352	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT20),
    353	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT21),
    354	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT22),
    355	IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT23),
    356	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDIO),
    357	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_REF_CLK),
    358	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RX_ER),
    359	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_CRS_DV),
    360	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD1),
    361	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD0),
    362	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TX_EN),
    363	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD1),
    364	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD0),
    365	IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDC),
    366	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL0),
    367	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW0),
    368	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL1),
    369	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW1),
    370	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL2),
    371	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW2),
    372	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL3),
    373	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW3),
    374	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL4),
    375	IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW4),
    376	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_0),
    377	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_1),
    378	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_9),
    379	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_3),
    380	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_6),
    381	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_2),
    382	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_4),
    383	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_5),
    384	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_7),
    385	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_8),
    386	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_16),
    387	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_17),
    388	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_18),
    389	IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_19),
    390	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_PIXCLK),
    391	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_MCLK),
    392	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DATA_EN),
    393	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_VSYNC),
    394	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT4),
    395	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT5),
    396	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT6),
    397	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT7),
    398	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT8),
    399	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT9),
    400	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT10),
    401	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT11),
    402	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT12),
    403	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT13),
    404	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT14),
    405	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT15),
    406	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT16),
    407	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT17),
    408	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT18),
    409	IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT19),
    410	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT7),
    411	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT6),
    412	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT5),
    413	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT4),
    414	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CMD),
    415	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CLK),
    416	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT0),
    417	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT1),
    418	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT2),
    419	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT3),
    420	IMX_PINCTRL_PIN(MX6Q_PAD_SD3_RST),
    421	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CLE),
    422	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_ALE),
    423	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_WP_B),
    424	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_RB0),
    425	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS0),
    426	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS1),
    427	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS2),
    428	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS3),
    429	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CMD),
    430	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CLK),
    431	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D0),
    432	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D1),
    433	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D2),
    434	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D3),
    435	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D4),
    436	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D5),
    437	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D6),
    438	IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D7),
    439	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT0),
    440	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT1),
    441	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT2),
    442	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT3),
    443	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT4),
    444	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT5),
    445	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT6),
    446	IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT7),
    447	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT1),
    448	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT0),
    449	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT3),
    450	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CMD),
    451	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT2),
    452	IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CLK),
    453	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CLK),
    454	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CMD),
    455	IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT3),
    456};
    457
    458static const struct imx_pinctrl_soc_info imx6q_pinctrl_info = {
    459	.pins = imx6q_pinctrl_pads,
    460	.npins = ARRAY_SIZE(imx6q_pinctrl_pads),
    461	.gpr_compatible = "fsl,imx6q-iomuxc-gpr",
    462};
    463
    464static const struct of_device_id imx6q_pinctrl_of_match[] = {
    465	{ .compatible = "fsl,imx6q-iomuxc", },
    466	{ /* sentinel */ }
    467};
    468
    469static int imx6q_pinctrl_probe(struct platform_device *pdev)
    470{
    471	return imx_pinctrl_probe(pdev, &imx6q_pinctrl_info);
    472}
    473
    474static struct platform_driver imx6q_pinctrl_driver = {
    475	.driver = {
    476		.name = "imx6q-pinctrl",
    477		.of_match_table = imx6q_pinctrl_of_match,
    478		.suppress_bind_attrs = true,
    479	},
    480	.probe = imx6q_pinctrl_probe,
    481};
    482
    483static int __init imx6q_pinctrl_init(void)
    484{
    485	return platform_driver_register(&imx6q_pinctrl_driver);
    486}
    487arch_initcall(imx6q_pinctrl_init);