cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-imx6sl.c (12357B)


      1// SPDX-License-Identifier: GPL-2.0
      2//
      3// Freescale imx6sl pinctrl driver
      4//
      5// Author: Shawn Guo <shawn.guo@linaro.org>
      6// Copyright (C) 2013 Freescale Semiconductor, Inc.
      7
      8#include <linux/err.h>
      9#include <linux/init.h>
     10#include <linux/io.h>
     11#include <linux/of.h>
     12#include <linux/of_device.h>
     13#include <linux/pinctrl/pinctrl.h>
     14
     15#include "pinctrl-imx.h"
     16
     17enum imx6sl_pads {
     18	MX6SL_PAD_RESERVE0 = 0,
     19	MX6SL_PAD_RESERVE1 = 1,
     20	MX6SL_PAD_RESERVE2 = 2,
     21	MX6SL_PAD_RESERVE3 = 3,
     22	MX6SL_PAD_RESERVE4 = 4,
     23	MX6SL_PAD_RESERVE5 = 5,
     24	MX6SL_PAD_RESERVE6 = 6,
     25	MX6SL_PAD_RESERVE7 = 7,
     26	MX6SL_PAD_RESERVE8 = 8,
     27	MX6SL_PAD_RESERVE9 = 9,
     28	MX6SL_PAD_RESERVE10 = 10,
     29	MX6SL_PAD_RESERVE11 = 11,
     30	MX6SL_PAD_RESERVE12 = 12,
     31	MX6SL_PAD_RESERVE13 = 13,
     32	MX6SL_PAD_RESERVE14 = 14,
     33	MX6SL_PAD_RESERVE15 = 15,
     34	MX6SL_PAD_RESERVE16 = 16,
     35	MX6SL_PAD_RESERVE17 = 17,
     36	MX6SL_PAD_RESERVE18 = 18,
     37	MX6SL_PAD_AUD_MCLK = 19,
     38	MX6SL_PAD_AUD_RXC = 20,
     39	MX6SL_PAD_AUD_RXD = 21,
     40	MX6SL_PAD_AUD_RXFS = 22,
     41	MX6SL_PAD_AUD_TXC = 23,
     42	MX6SL_PAD_AUD_TXD = 24,
     43	MX6SL_PAD_AUD_TXFS = 25,
     44	MX6SL_PAD_ECSPI1_MISO = 26,
     45	MX6SL_PAD_ECSPI1_MOSI = 27,
     46	MX6SL_PAD_ECSPI1_SCLK = 28,
     47	MX6SL_PAD_ECSPI1_SS0 = 29,
     48	MX6SL_PAD_ECSPI2_MISO = 30,
     49	MX6SL_PAD_ECSPI2_MOSI = 31,
     50	MX6SL_PAD_ECSPI2_SCLK = 32,
     51	MX6SL_PAD_ECSPI2_SS0 = 33,
     52	MX6SL_PAD_EPDC_BDR0 = 34,
     53	MX6SL_PAD_EPDC_BDR1 = 35,
     54	MX6SL_PAD_EPDC_D0 = 36,
     55	MX6SL_PAD_EPDC_D1 = 37,
     56	MX6SL_PAD_EPDC_D10 = 38,
     57	MX6SL_PAD_EPDC_D11 = 39,
     58	MX6SL_PAD_EPDC_D12 = 40,
     59	MX6SL_PAD_EPDC_D13 = 41,
     60	MX6SL_PAD_EPDC_D14 = 42,
     61	MX6SL_PAD_EPDC_D15 = 43,
     62	MX6SL_PAD_EPDC_D2 = 44,
     63	MX6SL_PAD_EPDC_D3 = 45,
     64	MX6SL_PAD_EPDC_D4 = 46,
     65	MX6SL_PAD_EPDC_D5 = 47,
     66	MX6SL_PAD_EPDC_D6 = 48,
     67	MX6SL_PAD_EPDC_D7 = 49,
     68	MX6SL_PAD_EPDC_D8 = 50,
     69	MX6SL_PAD_EPDC_D9 = 51,
     70	MX6SL_PAD_EPDC_GDCLK = 52,
     71	MX6SL_PAD_EPDC_GDOE = 53,
     72	MX6SL_PAD_EPDC_GDRL = 54,
     73	MX6SL_PAD_EPDC_GDSP = 55,
     74	MX6SL_PAD_EPDC_PWRCOM = 56,
     75	MX6SL_PAD_EPDC_PWRCTRL0 = 57,
     76	MX6SL_PAD_EPDC_PWRCTRL1 = 58,
     77	MX6SL_PAD_EPDC_PWRCTRL2 = 59,
     78	MX6SL_PAD_EPDC_PWRCTRL3 = 60,
     79	MX6SL_PAD_EPDC_PWRINT = 61,
     80	MX6SL_PAD_EPDC_PWRSTAT = 62,
     81	MX6SL_PAD_EPDC_PWRWAKEUP = 63,
     82	MX6SL_PAD_EPDC_SDCE0 = 64,
     83	MX6SL_PAD_EPDC_SDCE1 = 65,
     84	MX6SL_PAD_EPDC_SDCE2 = 66,
     85	MX6SL_PAD_EPDC_SDCE3 = 67,
     86	MX6SL_PAD_EPDC_SDCLK = 68,
     87	MX6SL_PAD_EPDC_SDLE = 69,
     88	MX6SL_PAD_EPDC_SDOE = 70,
     89	MX6SL_PAD_EPDC_SDSHR = 71,
     90	MX6SL_PAD_EPDC_VCOM0 = 72,
     91	MX6SL_PAD_EPDC_VCOM1 = 73,
     92	MX6SL_PAD_FEC_CRS_DV = 74,
     93	MX6SL_PAD_FEC_MDC = 75,
     94	MX6SL_PAD_FEC_MDIO = 76,
     95	MX6SL_PAD_FEC_REF_CLK = 77,
     96	MX6SL_PAD_FEC_RX_ER = 78,
     97	MX6SL_PAD_FEC_RXD0 = 79,
     98	MX6SL_PAD_FEC_RXD1 = 80,
     99	MX6SL_PAD_FEC_TX_CLK = 81,
    100	MX6SL_PAD_FEC_TX_EN = 82,
    101	MX6SL_PAD_FEC_TXD0 = 83,
    102	MX6SL_PAD_FEC_TXD1 = 84,
    103	MX6SL_PAD_HSIC_DAT = 85,
    104	MX6SL_PAD_HSIC_STROBE = 86,
    105	MX6SL_PAD_I2C1_SCL = 87,
    106	MX6SL_PAD_I2C1_SDA = 88,
    107	MX6SL_PAD_I2C2_SCL = 89,
    108	MX6SL_PAD_I2C2_SDA = 90,
    109	MX6SL_PAD_KEY_COL0 = 91,
    110	MX6SL_PAD_KEY_COL1 = 92,
    111	MX6SL_PAD_KEY_COL2 = 93,
    112	MX6SL_PAD_KEY_COL3 = 94,
    113	MX6SL_PAD_KEY_COL4 = 95,
    114	MX6SL_PAD_KEY_COL5 = 96,
    115	MX6SL_PAD_KEY_COL6 = 97,
    116	MX6SL_PAD_KEY_COL7 = 98,
    117	MX6SL_PAD_KEY_ROW0 = 99,
    118	MX6SL_PAD_KEY_ROW1 = 100,
    119	MX6SL_PAD_KEY_ROW2 = 101,
    120	MX6SL_PAD_KEY_ROW3 = 102,
    121	MX6SL_PAD_KEY_ROW4 = 103,
    122	MX6SL_PAD_KEY_ROW5 = 104,
    123	MX6SL_PAD_KEY_ROW6 = 105,
    124	MX6SL_PAD_KEY_ROW7 = 106,
    125	MX6SL_PAD_LCD_CLK = 107,
    126	MX6SL_PAD_LCD_DAT0 = 108,
    127	MX6SL_PAD_LCD_DAT1 = 109,
    128	MX6SL_PAD_LCD_DAT10 = 110,
    129	MX6SL_PAD_LCD_DAT11 = 111,
    130	MX6SL_PAD_LCD_DAT12 = 112,
    131	MX6SL_PAD_LCD_DAT13 = 113,
    132	MX6SL_PAD_LCD_DAT14 = 114,
    133	MX6SL_PAD_LCD_DAT15 = 115,
    134	MX6SL_PAD_LCD_DAT16 = 116,
    135	MX6SL_PAD_LCD_DAT17 = 117,
    136	MX6SL_PAD_LCD_DAT18 = 118,
    137	MX6SL_PAD_LCD_DAT19 = 119,
    138	MX6SL_PAD_LCD_DAT2 = 120,
    139	MX6SL_PAD_LCD_DAT20 = 121,
    140	MX6SL_PAD_LCD_DAT21 = 122,
    141	MX6SL_PAD_LCD_DAT22 = 123,
    142	MX6SL_PAD_LCD_DAT23 = 124,
    143	MX6SL_PAD_LCD_DAT3 = 125,
    144	MX6SL_PAD_LCD_DAT4 = 126,
    145	MX6SL_PAD_LCD_DAT5 = 127,
    146	MX6SL_PAD_LCD_DAT6 = 128,
    147	MX6SL_PAD_LCD_DAT7 = 129,
    148	MX6SL_PAD_LCD_DAT8 = 130,
    149	MX6SL_PAD_LCD_DAT9 = 131,
    150	MX6SL_PAD_LCD_ENABLE = 132,
    151	MX6SL_PAD_LCD_HSYNC = 133,
    152	MX6SL_PAD_LCD_RESET = 134,
    153	MX6SL_PAD_LCD_VSYNC = 135,
    154	MX6SL_PAD_PWM1 = 136,
    155	MX6SL_PAD_REF_CLK_24M = 137,
    156	MX6SL_PAD_REF_CLK_32K = 138,
    157	MX6SL_PAD_SD1_CLK = 139,
    158	MX6SL_PAD_SD1_CMD = 140,
    159	MX6SL_PAD_SD1_DAT0 = 141,
    160	MX6SL_PAD_SD1_DAT1 = 142,
    161	MX6SL_PAD_SD1_DAT2 = 143,
    162	MX6SL_PAD_SD1_DAT3 = 144,
    163	MX6SL_PAD_SD1_DAT4 = 145,
    164	MX6SL_PAD_SD1_DAT5 = 146,
    165	MX6SL_PAD_SD1_DAT6 = 147,
    166	MX6SL_PAD_SD1_DAT7 = 148,
    167	MX6SL_PAD_SD2_CLK = 149,
    168	MX6SL_PAD_SD2_CMD = 150,
    169	MX6SL_PAD_SD2_DAT0 = 151,
    170	MX6SL_PAD_SD2_DAT1 = 152,
    171	MX6SL_PAD_SD2_DAT2 = 153,
    172	MX6SL_PAD_SD2_DAT3 = 154,
    173	MX6SL_PAD_SD2_DAT4 = 155,
    174	MX6SL_PAD_SD2_DAT5 = 156,
    175	MX6SL_PAD_SD2_DAT6 = 157,
    176	MX6SL_PAD_SD2_DAT7 = 158,
    177	MX6SL_PAD_SD2_RST = 159,
    178	MX6SL_PAD_SD3_CLK = 160,
    179	MX6SL_PAD_SD3_CMD = 161,
    180	MX6SL_PAD_SD3_DAT0 = 162,
    181	MX6SL_PAD_SD3_DAT1 = 163,
    182	MX6SL_PAD_SD3_DAT2 = 164,
    183	MX6SL_PAD_SD3_DAT3 = 165,
    184	MX6SL_PAD_UART1_RXD = 166,
    185	MX6SL_PAD_UART1_TXD = 167,
    186	MX6SL_PAD_WDOG_B = 168,
    187};
    188
    189/* Pad names for the pinmux subsystem */
    190static const struct pinctrl_pin_desc imx6sl_pinctrl_pads[] = {
    191	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE0),
    192	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE1),
    193	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE2),
    194	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE3),
    195	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE4),
    196	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE5),
    197	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE6),
    198	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE7),
    199	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE8),
    200	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE9),
    201	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE10),
    202	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE11),
    203	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE12),
    204	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE13),
    205	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE14),
    206	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE15),
    207	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE16),
    208	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE17),
    209	IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE18),
    210	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_MCLK),
    211	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXC),
    212	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXD),
    213	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXFS),
    214	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXC),
    215	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXD),
    216	IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXFS),
    217	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MISO),
    218	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MOSI),
    219	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SCLK),
    220	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SS0),
    221	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MISO),
    222	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MOSI),
    223	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SCLK),
    224	IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SS0),
    225	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR0),
    226	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR1),
    227	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D0),
    228	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D1),
    229	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D10),
    230	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D11),
    231	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D12),
    232	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D13),
    233	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D14),
    234	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D15),
    235	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D2),
    236	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D3),
    237	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D4),
    238	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D5),
    239	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D6),
    240	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D7),
    241	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D8),
    242	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D9),
    243	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDCLK),
    244	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDOE),
    245	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDRL),
    246	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDSP),
    247	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCOM),
    248	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL0),
    249	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL1),
    250	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL2),
    251	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL3),
    252	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRINT),
    253	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRSTAT),
    254	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRWAKEUP),
    255	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE0),
    256	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE1),
    257	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE2),
    258	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE3),
    259	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCLK),
    260	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDLE),
    261	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDOE),
    262	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDSHR),
    263	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM0),
    264	IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM1),
    265	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_CRS_DV),
    266	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDC),
    267	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDIO),
    268	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_REF_CLK),
    269	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RX_ER),
    270	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD0),
    271	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD1),
    272	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_CLK),
    273	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_EN),
    274	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD0),
    275	IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD1),
    276	IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_DAT),
    277	IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_STROBE),
    278	IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SCL),
    279	IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SDA),
    280	IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SCL),
    281	IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SDA),
    282	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL0),
    283	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL1),
    284	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL2),
    285	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL3),
    286	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL4),
    287	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL5),
    288	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL6),
    289	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL7),
    290	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW0),
    291	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW1),
    292	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW2),
    293	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW3),
    294	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW4),
    295	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW5),
    296	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW6),
    297	IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW7),
    298	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_CLK),
    299	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT0),
    300	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT1),
    301	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT10),
    302	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT11),
    303	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT12),
    304	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT13),
    305	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT14),
    306	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT15),
    307	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT16),
    308	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT17),
    309	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT18),
    310	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT19),
    311	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT2),
    312	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT20),
    313	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT21),
    314	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT22),
    315	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT23),
    316	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT3),
    317	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT4),
    318	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT5),
    319	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT6),
    320	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT7),
    321	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT8),
    322	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT9),
    323	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_ENABLE),
    324	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_HSYNC),
    325	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_RESET),
    326	IMX_PINCTRL_PIN(MX6SL_PAD_LCD_VSYNC),
    327	IMX_PINCTRL_PIN(MX6SL_PAD_PWM1),
    328	IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_24M),
    329	IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_32K),
    330	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CLK),
    331	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CMD),
    332	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT0),
    333	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT1),
    334	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT2),
    335	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT3),
    336	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT4),
    337	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT5),
    338	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT6),
    339	IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT7),
    340	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CLK),
    341	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CMD),
    342	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT0),
    343	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT1),
    344	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT2),
    345	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT3),
    346	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT4),
    347	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT5),
    348	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT6),
    349	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT7),
    350	IMX_PINCTRL_PIN(MX6SL_PAD_SD2_RST),
    351	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CLK),
    352	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CMD),
    353	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT0),
    354	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT1),
    355	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT2),
    356	IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT3),
    357	IMX_PINCTRL_PIN(MX6SL_PAD_UART1_RXD),
    358	IMX_PINCTRL_PIN(MX6SL_PAD_UART1_TXD),
    359	IMX_PINCTRL_PIN(MX6SL_PAD_WDOG_B),
    360};
    361
    362static const struct imx_pinctrl_soc_info imx6sl_pinctrl_info = {
    363	.pins = imx6sl_pinctrl_pads,
    364	.npins = ARRAY_SIZE(imx6sl_pinctrl_pads),
    365	.gpr_compatible = "fsl,imx6sl-iomuxc-gpr",
    366};
    367
    368static const struct of_device_id imx6sl_pinctrl_of_match[] = {
    369	{ .compatible = "fsl,imx6sl-iomuxc", },
    370	{ /* sentinel */ }
    371};
    372
    373static int imx6sl_pinctrl_probe(struct platform_device *pdev)
    374{
    375	return imx_pinctrl_probe(pdev, &imx6sl_pinctrl_info);
    376}
    377
    378static struct platform_driver imx6sl_pinctrl_driver = {
    379	.driver = {
    380		.name = "imx6sl-pinctrl",
    381		.of_match_table = imx6sl_pinctrl_of_match,
    382		.suppress_bind_attrs = true,
    383	},
    384	.probe = imx6sl_pinctrl_probe,
    385};
    386
    387static int __init imx6sl_pinctrl_init(void)
    388{
    389	return platform_driver_register(&imx6sl_pinctrl_driver);
    390}
    391arch_initcall(imx6sl_pinctrl_init);