cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (5131B)


      1# SPDX-License-Identifier: GPL-2.0
      2# Intel pin control drivers
      3menu "Intel pinctrl drivers"
      4	depends on X86 || COMPILE_TEST
      5
      6config PINCTRL_BAYTRAIL
      7	bool "Intel Baytrail GPIO pin control"
      8	depends on ACPI
      9	select PINCTRL_INTEL
     10	help
     11	  driver for memory mapped GPIO functionality on Intel Baytrail
     12	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
     13	  Most pins are usually muxed to some other functionality by firmware,
     14	  so only a small amount is available for gpio use.
     15
     16	  Requires ACPI device enumeration code to set up a platform device.
     17
     18config PINCTRL_CHERRYVIEW
     19	tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
     20	depends on ACPI
     21	select PINCTRL_INTEL
     22	help
     23	  Cherryview/Braswell pinctrl driver provides an interface that
     24	  allows configuring of SoC pins and using them as GPIOs.
     25
     26config PINCTRL_LYNXPOINT
     27	tristate "Intel Lynxpoint pinctrl and GPIO driver"
     28	depends on ACPI
     29	select PINMUX
     30	select PINCONF
     31	select GENERIC_PINCONF
     32	select GPIOLIB
     33	select GPIOLIB_IRQCHIP
     34	help
     35	  Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
     36	  provides an interface that allows configuring of PCH pins and
     37	  using them as GPIOs.
     38
     39config PINCTRL_MERRIFIELD
     40	tristate "Intel Merrifield pinctrl driver"
     41	depends on X86_INTEL_MID
     42	select PINMUX
     43	select PINCONF
     44	select GENERIC_PINCONF
     45	help
     46	  Merrifield Family-Level Interface Shim (FLIS) driver provides an
     47	  interface that allows configuring of SoC pins and using them as
     48	  GPIOs.
     49
     50config PINCTRL_INTEL
     51	tristate
     52	select PINMUX
     53	select PINCONF
     54	select GENERIC_PINCONF
     55	select GPIOLIB
     56	select GPIOLIB_IRQCHIP
     57
     58config PINCTRL_ALDERLAKE
     59	tristate "Intel Alder Lake pinctrl and GPIO driver"
     60	depends on ACPI
     61	select PINCTRL_INTEL
     62	help
     63	  This pinctrl driver provides an interface that allows configuring
     64	  of Intel Alder Lake PCH pins and using them as GPIOs.
     65
     66config PINCTRL_BROXTON
     67	tristate "Intel Broxton pinctrl and GPIO driver"
     68	depends on ACPI
     69	select PINCTRL_INTEL
     70	help
     71	  Broxton pinctrl driver provides an interface that allows
     72	  configuring of SoC pins and using them as GPIOs.
     73
     74config PINCTRL_CANNONLAKE
     75	tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
     76	depends on ACPI
     77	select PINCTRL_INTEL
     78	help
     79	  This pinctrl driver provides an interface that allows configuring
     80	  of Intel Cannon Lake PCH pins and using them as GPIOs.
     81
     82config PINCTRL_CEDARFORK
     83	tristate "Intel Cedar Fork pinctrl and GPIO driver"
     84	depends on ACPI
     85	select PINCTRL_INTEL
     86	help
     87	  This pinctrl driver provides an interface that allows configuring
     88	  of Intel Cedar Fork PCH pins and using them as GPIOs.
     89
     90config PINCTRL_DENVERTON
     91	tristate "Intel Denverton pinctrl and GPIO driver"
     92	depends on ACPI
     93	select PINCTRL_INTEL
     94	help
     95	  This pinctrl driver provides an interface that allows configuring
     96	  of Intel Denverton SoC pins and using them as GPIOs.
     97
     98config PINCTRL_ELKHARTLAKE
     99	tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
    100	depends on ACPI
    101	select PINCTRL_INTEL
    102	help
    103	  This pinctrl driver provides an interface that allows configuring
    104	  of Intel Elkhart Lake SoC pins and using them as GPIOs.
    105
    106config PINCTRL_EMMITSBURG
    107	tristate "Intel Emmitsburg pinctrl and GPIO driver"
    108	depends on ACPI
    109	select PINCTRL_INTEL
    110	help
    111	  This pinctrl driver provides an interface that allows configuring
    112	  of Intel Emmitsburg pins and using them as GPIOs.
    113
    114config PINCTRL_GEMINILAKE
    115	tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
    116	depends on ACPI
    117	select PINCTRL_INTEL
    118	help
    119	  This pinctrl driver provides an interface that allows configuring
    120	  of Intel Gemini Lake SoC pins and using them as GPIOs.
    121
    122config PINCTRL_ICELAKE
    123	tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
    124	depends on ACPI
    125	select PINCTRL_INTEL
    126	help
    127	  This pinctrl driver provides an interface that allows configuring
    128	  of Intel Ice Lake PCH pins and using them as GPIOs.
    129
    130config PINCTRL_JASPERLAKE
    131	tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
    132	depends on ACPI
    133	select PINCTRL_INTEL
    134	help
    135	  This pinctrl driver provides an interface that allows configuring
    136	  of Intel Jasper Lake PCH pins and using them as GPIOs.
    137
    138config PINCTRL_LAKEFIELD
    139	tristate "Intel Lakefield SoC pinctrl and GPIO driver"
    140	depends on ACPI
    141	select PINCTRL_INTEL
    142	help
    143	  This pinctrl driver provides an interface that allows configuring
    144	  of Intel Lakefield SoC pins and using them as GPIOs.
    145
    146config PINCTRL_LEWISBURG
    147	tristate "Intel Lewisburg pinctrl and GPIO driver"
    148	depends on ACPI
    149	select PINCTRL_INTEL
    150	help
    151	  This pinctrl driver provides an interface that allows configuring
    152	  of Intel Lewisburg pins and using them as GPIOs.
    153
    154config PINCTRL_SUNRISEPOINT
    155	tristate "Intel Sunrisepoint pinctrl and GPIO driver"
    156	depends on ACPI
    157	select PINCTRL_INTEL
    158	help
    159	  Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
    160	  provides an interface that allows configuring of PCH pins and
    161	  using them as GPIOs.
    162
    163config PINCTRL_TIGERLAKE
    164	tristate "Intel Tiger Lake pinctrl and GPIO driver"
    165	depends on ACPI
    166	select PINCTRL_INTEL
    167	help
    168	  This pinctrl driver provides an interface that allows configuring
    169	  of Intel Tiger Lake PCH pins and using them as GPIOs.
    170
    171endmenu