cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

pinctrl-meson-axg.c (32081B)


      1/*
      2 * Pin controller and GPIO driver for Amlogic Meson AXG SoC.
      3 *
      4 * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
      5 * Author: Xingyu Chen <xingyu.chen@amlogic.com>
      6 *
      7 * SPDX-License-Identifier: (GPL-2.0+ or MIT)
      8 */
      9
     10#include <dt-bindings/gpio/meson-axg-gpio.h>
     11#include "pinctrl-meson.h"
     12#include "pinctrl-meson-axg-pmx.h"
     13
     14static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = {
     15	MESON_PIN(GPIOZ_0),
     16	MESON_PIN(GPIOZ_1),
     17	MESON_PIN(GPIOZ_2),
     18	MESON_PIN(GPIOZ_3),
     19	MESON_PIN(GPIOZ_4),
     20	MESON_PIN(GPIOZ_5),
     21	MESON_PIN(GPIOZ_6),
     22	MESON_PIN(GPIOZ_7),
     23	MESON_PIN(GPIOZ_8),
     24	MESON_PIN(GPIOZ_9),
     25	MESON_PIN(GPIOZ_10),
     26	MESON_PIN(BOOT_0),
     27	MESON_PIN(BOOT_1),
     28	MESON_PIN(BOOT_2),
     29	MESON_PIN(BOOT_3),
     30	MESON_PIN(BOOT_4),
     31	MESON_PIN(BOOT_5),
     32	MESON_PIN(BOOT_6),
     33	MESON_PIN(BOOT_7),
     34	MESON_PIN(BOOT_8),
     35	MESON_PIN(BOOT_9),
     36	MESON_PIN(BOOT_10),
     37	MESON_PIN(BOOT_11),
     38	MESON_PIN(BOOT_12),
     39	MESON_PIN(BOOT_13),
     40	MESON_PIN(BOOT_14),
     41	MESON_PIN(GPIOA_0),
     42	MESON_PIN(GPIOA_1),
     43	MESON_PIN(GPIOA_2),
     44	MESON_PIN(GPIOA_3),
     45	MESON_PIN(GPIOA_4),
     46	MESON_PIN(GPIOA_5),
     47	MESON_PIN(GPIOA_6),
     48	MESON_PIN(GPIOA_7),
     49	MESON_PIN(GPIOA_8),
     50	MESON_PIN(GPIOA_9),
     51	MESON_PIN(GPIOA_10),
     52	MESON_PIN(GPIOA_11),
     53	MESON_PIN(GPIOA_12),
     54	MESON_PIN(GPIOA_13),
     55	MESON_PIN(GPIOA_14),
     56	MESON_PIN(GPIOA_15),
     57	MESON_PIN(GPIOA_16),
     58	MESON_PIN(GPIOA_17),
     59	MESON_PIN(GPIOA_18),
     60	MESON_PIN(GPIOA_19),
     61	MESON_PIN(GPIOA_20),
     62	MESON_PIN(GPIOX_0),
     63	MESON_PIN(GPIOX_1),
     64	MESON_PIN(GPIOX_2),
     65	MESON_PIN(GPIOX_3),
     66	MESON_PIN(GPIOX_4),
     67	MESON_PIN(GPIOX_5),
     68	MESON_PIN(GPIOX_6),
     69	MESON_PIN(GPIOX_7),
     70	MESON_PIN(GPIOX_8),
     71	MESON_PIN(GPIOX_9),
     72	MESON_PIN(GPIOX_10),
     73	MESON_PIN(GPIOX_11),
     74	MESON_PIN(GPIOX_12),
     75	MESON_PIN(GPIOX_13),
     76	MESON_PIN(GPIOX_14),
     77	MESON_PIN(GPIOX_15),
     78	MESON_PIN(GPIOX_16),
     79	MESON_PIN(GPIOX_17),
     80	MESON_PIN(GPIOX_18),
     81	MESON_PIN(GPIOX_19),
     82	MESON_PIN(GPIOX_20),
     83	MESON_PIN(GPIOX_21),
     84	MESON_PIN(GPIOX_22),
     85	MESON_PIN(GPIOY_0),
     86	MESON_PIN(GPIOY_1),
     87	MESON_PIN(GPIOY_2),
     88	MESON_PIN(GPIOY_3),
     89	MESON_PIN(GPIOY_4),
     90	MESON_PIN(GPIOY_5),
     91	MESON_PIN(GPIOY_6),
     92	MESON_PIN(GPIOY_7),
     93	MESON_PIN(GPIOY_8),
     94	MESON_PIN(GPIOY_9),
     95	MESON_PIN(GPIOY_10),
     96	MESON_PIN(GPIOY_11),
     97	MESON_PIN(GPIOY_12),
     98	MESON_PIN(GPIOY_13),
     99	MESON_PIN(GPIOY_14),
    100	MESON_PIN(GPIOY_15),
    101};
    102
    103static const struct pinctrl_pin_desc meson_axg_aobus_pins[] = {
    104	MESON_PIN(GPIOAO_0),
    105	MESON_PIN(GPIOAO_1),
    106	MESON_PIN(GPIOAO_2),
    107	MESON_PIN(GPIOAO_3),
    108	MESON_PIN(GPIOAO_4),
    109	MESON_PIN(GPIOAO_5),
    110	MESON_PIN(GPIOAO_6),
    111	MESON_PIN(GPIOAO_7),
    112	MESON_PIN(GPIOAO_8),
    113	MESON_PIN(GPIOAO_9),
    114	MESON_PIN(GPIOAO_10),
    115	MESON_PIN(GPIOAO_11),
    116	MESON_PIN(GPIOAO_12),
    117	MESON_PIN(GPIOAO_13),
    118	MESON_PIN(GPIO_TEST_N),
    119};
    120
    121/* emmc */
    122static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
    123static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
    124static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
    125static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
    126static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
    127static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
    128static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
    129static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
    130
    131static const unsigned int emmc_clk_pins[] = {BOOT_8};
    132static const unsigned int emmc_cmd_pins[] = {BOOT_10};
    133static const unsigned int emmc_ds_pins[]  = {BOOT_13};
    134
    135/* nand */
    136static const unsigned int nand_ce0_pins[] = {BOOT_8};
    137static const unsigned int nand_ale_pins[] = {BOOT_9};
    138static const unsigned int nand_cle_pins[] = {BOOT_10};
    139static const unsigned int nand_wen_clk_pins[] = {BOOT_11};
    140static const unsigned int nand_ren_wr_pins[] = {BOOT_12};
    141static const unsigned int nand_rb0_pins[] = {BOOT_13};
    142
    143/* nor */
    144static const unsigned int nor_hold_pins[] = {BOOT_3};
    145static const unsigned int nor_d_pins[] = {BOOT_4};
    146static const unsigned int nor_q_pins[] = {BOOT_5};
    147static const unsigned int nor_c_pins[] = {BOOT_6};
    148static const unsigned int nor_wp_pins[] = {BOOT_9};
    149static const unsigned int nor_cs_pins[] = {BOOT_14};
    150
    151/* sdio */
    152static const unsigned int sdio_d0_pins[] = {GPIOX_0};
    153static const unsigned int sdio_d1_pins[] = {GPIOX_1};
    154static const unsigned int sdio_d2_pins[] = {GPIOX_2};
    155static const unsigned int sdio_d3_pins[] = {GPIOX_3};
    156static const unsigned int sdio_clk_pins[] = {GPIOX_4};
    157static const unsigned int sdio_cmd_pins[] = {GPIOX_5};
    158
    159/* spi0 */
    160static const unsigned int spi0_clk_pins[] = {GPIOZ_0};
    161static const unsigned int spi0_mosi_pins[] = {GPIOZ_1};
    162static const unsigned int spi0_miso_pins[] = {GPIOZ_2};
    163static const unsigned int spi0_ss0_pins[] = {GPIOZ_3};
    164static const unsigned int spi0_ss1_pins[] = {GPIOZ_4};
    165static const unsigned int spi0_ss2_pins[] = {GPIOZ_5};
    166
    167/* spi1 */
    168static const unsigned int spi1_clk_x_pins[] = {GPIOX_19};
    169static const unsigned int spi1_mosi_x_pins[] = {GPIOX_17};
    170static const unsigned int spi1_miso_x_pins[] = {GPIOX_18};
    171static const unsigned int spi1_ss0_x_pins[] = {GPIOX_16};
    172
    173static const unsigned int spi1_clk_a_pins[] = {GPIOA_4};
    174static const unsigned int spi1_mosi_a_pins[] = {GPIOA_2};
    175static const unsigned int spi1_miso_a_pins[] = {GPIOA_3};
    176static const unsigned int spi1_ss0_a_pins[] = {GPIOA_5};
    177static const unsigned int spi1_ss1_pins[] = {GPIOA_6};
    178
    179/* i2c0 */
    180static const unsigned int i2c0_sck_pins[] = {GPIOZ_6};
    181static const unsigned int i2c0_sda_pins[] = {GPIOZ_7};
    182
    183/* i2c1 */
    184static const unsigned int i2c1_sck_z_pins[] = {GPIOZ_8};
    185static const unsigned int i2c1_sda_z_pins[] = {GPIOZ_9};
    186
    187static const unsigned int i2c1_sck_x_pins[] = {GPIOX_16};
    188static const unsigned int i2c1_sda_x_pins[] = {GPIOX_17};
    189
    190/* i2c2 */
    191static const unsigned int i2c2_sck_x_pins[] = {GPIOX_18};
    192static const unsigned int i2c2_sda_x_pins[] = {GPIOX_19};
    193
    194static const unsigned int i2c2_sda_a_pins[] = {GPIOA_17};
    195static const unsigned int i2c2_sck_a_pins[] = {GPIOA_18};
    196
    197/* i2c3 */
    198static const unsigned int i2c3_sda_a6_pins[] = {GPIOA_6};
    199static const unsigned int i2c3_sck_a7_pins[] = {GPIOA_7};
    200
    201static const unsigned int i2c3_sda_a12_pins[] = {GPIOA_12};
    202static const unsigned int i2c3_sck_a13_pins[] = {GPIOA_13};
    203
    204static const unsigned int i2c3_sda_a19_pins[] = {GPIOA_19};
    205static const unsigned int i2c3_sck_a20_pins[] = {GPIOA_20};
    206
    207/* uart_a */
    208static const unsigned int uart_rts_a_pins[] = {GPIOX_11};
    209static const unsigned int uart_cts_a_pins[] = {GPIOX_10};
    210static const unsigned int uart_tx_a_pins[] = {GPIOX_8};
    211static const unsigned int uart_rx_a_pins[] = {GPIOX_9};
    212
    213/* uart_b */
    214static const unsigned int uart_rts_b_z_pins[] = {GPIOZ_0};
    215static const unsigned int uart_cts_b_z_pins[] = {GPIOZ_1};
    216static const unsigned int uart_tx_b_z_pins[] = {GPIOZ_2};
    217static const unsigned int uart_rx_b_z_pins[] = {GPIOZ_3};
    218
    219static const unsigned int uart_rts_b_x_pins[] = {GPIOX_18};
    220static const unsigned int uart_cts_b_x_pins[] = {GPIOX_19};
    221static const unsigned int uart_tx_b_x_pins[] = {GPIOX_16};
    222static const unsigned int uart_rx_b_x_pins[] = {GPIOX_17};
    223
    224/* uart_ao_b */
    225static const unsigned int uart_ao_tx_b_z_pins[] = {GPIOZ_8};
    226static const unsigned int uart_ao_rx_b_z_pins[] = {GPIOZ_9};
    227static const unsigned int uart_ao_cts_b_z_pins[] = {GPIOZ_6};
    228static const unsigned int uart_ao_rts_b_z_pins[] = {GPIOZ_7};
    229
    230/* pwm_a */
    231static const unsigned int pwm_a_z_pins[] = {GPIOZ_5};
    232
    233static const unsigned int pwm_a_x18_pins[] = {GPIOX_18};
    234static const unsigned int pwm_a_x20_pins[] = {GPIOX_20};
    235
    236static const unsigned int pwm_a_a_pins[] = {GPIOA_14};
    237
    238/* pwm_b */
    239static const unsigned int pwm_b_z_pins[] = {GPIOZ_4};
    240
    241static const unsigned int pwm_b_x_pins[] = {GPIOX_19};
    242
    243static const unsigned int pwm_b_a_pins[] = {GPIOA_15};
    244
    245/* pwm_c */
    246static const unsigned int pwm_c_x10_pins[] = {GPIOX_10};
    247static const unsigned int pwm_c_x17_pins[] = {GPIOX_17};
    248
    249static const unsigned int pwm_c_a_pins[] = {GPIOA_16};
    250
    251/* pwm_d */
    252static const unsigned int pwm_d_x11_pins[] = {GPIOX_11};
    253static const unsigned int pwm_d_x16_pins[] = {GPIOX_16};
    254
    255/* pwm_vs */
    256static const unsigned int pwm_vs_pins[] = {GPIOA_0};
    257
    258/* spdif_in */
    259static const unsigned int spdif_in_z_pins[] = {GPIOZ_4};
    260
    261static const unsigned int spdif_in_a1_pins[] = {GPIOA_1};
    262static const unsigned int spdif_in_a7_pins[] = {GPIOA_7};
    263static const unsigned int spdif_in_a19_pins[] = {GPIOA_19};
    264static const unsigned int spdif_in_a20_pins[] = {GPIOA_20};
    265
    266/* spdif_out */
    267static const unsigned int spdif_out_z_pins[] = {GPIOZ_5};
    268
    269static const unsigned int spdif_out_a1_pins[] = {GPIOA_1};
    270static const unsigned int spdif_out_a11_pins[] = {GPIOA_11};
    271static const unsigned int spdif_out_a19_pins[] = {GPIOA_19};
    272static const unsigned int spdif_out_a20_pins[] = {GPIOA_20};
    273
    274/* jtag_ee */
    275static const unsigned int jtag_tdo_x_pins[] = {GPIOX_0};
    276static const unsigned int jtag_tdi_x_pins[] = {GPIOX_1};
    277static const unsigned int jtag_clk_x_pins[] = {GPIOX_4};
    278static const unsigned int jtag_tms_x_pins[] = {GPIOX_5};
    279
    280/* eth */
    281static const unsigned int eth_txd0_x_pins[] = {GPIOX_8};
    282static const unsigned int eth_txd1_x_pins[] = {GPIOX_9};
    283static const unsigned int eth_txen_x_pins[] = {GPIOX_10};
    284static const unsigned int eth_rgmii_rx_clk_x_pins[] = {GPIOX_12};
    285static const unsigned int eth_rxd0_x_pins[] = {GPIOX_13};
    286static const unsigned int eth_rxd1_x_pins[] = {GPIOX_14};
    287static const unsigned int eth_rx_dv_x_pins[] = {GPIOX_15};
    288static const unsigned int eth_mdio_x_pins[] = {GPIOX_21};
    289static const unsigned int eth_mdc_x_pins[] = {GPIOX_22};
    290
    291static const unsigned int eth_txd0_y_pins[] = {GPIOY_10};
    292static const unsigned int eth_txd1_y_pins[] = {GPIOY_11};
    293static const unsigned int eth_txen_y_pins[] = {GPIOY_9};
    294static const unsigned int eth_rgmii_rx_clk_y_pins[] = {GPIOY_2};
    295static const unsigned int eth_rxd0_y_pins[] = {GPIOY_4};
    296static const unsigned int eth_rxd1_y_pins[] = {GPIOY_5};
    297static const unsigned int eth_rx_dv_y_pins[] = {GPIOY_3};
    298static const unsigned int eth_mdio_y_pins[] = {GPIOY_0};
    299static const unsigned int eth_mdc_y_pins[] = {GPIOY_1};
    300
    301static const unsigned int eth_rxd2_rgmii_pins[] = {GPIOY_6};
    302static const unsigned int eth_rxd3_rgmii_pins[] = {GPIOY_7};
    303static const unsigned int eth_rgmii_tx_clk_pins[] = {GPIOY_8};
    304static const unsigned int eth_txd2_rgmii_pins[] = {GPIOY_12};
    305static const unsigned int eth_txd3_rgmii_pins[] = {GPIOY_13};
    306
    307/* pdm */
    308static const unsigned int pdm_dclk_a14_pins[] = {GPIOA_14};
    309static const unsigned int pdm_dclk_a19_pins[] = {GPIOA_19};
    310static const unsigned int pdm_din0_pins[] = {GPIOA_15};
    311static const unsigned int pdm_din1_pins[] = {GPIOA_16};
    312static const unsigned int pdm_din2_pins[] = {GPIOA_17};
    313static const unsigned int pdm_din3_pins[] = {GPIOA_18};
    314
    315/* mclk */
    316static const unsigned int mclk_c_pins[] = {GPIOA_0};
    317static const unsigned int mclk_b_pins[] = {GPIOA_1};
    318
    319/* tdm */
    320static const unsigned int tdma_sclk_pins[] = {GPIOX_12};
    321static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12};
    322static const unsigned int tdma_fs_pins[] = {GPIOX_13};
    323static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13};
    324static const unsigned int tdma_din0_pins[] = {GPIOX_14};
    325static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14};
    326static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15};
    327static const unsigned int tdma_dout1_pins[] = {GPIOX_15};
    328static const unsigned int tdma_din1_pins[] = {GPIOX_15};
    329
    330static const unsigned int tdmc_sclk_pins[] = {GPIOA_2};
    331static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2};
    332static const unsigned int tdmc_fs_pins[] = {GPIOA_3};
    333static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3};
    334static const unsigned int tdmc_din0_pins[] = {GPIOA_4};
    335static const unsigned int tdmc_dout0_pins[] = {GPIOA_4};
    336static const unsigned int tdmc_din1_pins[] = {GPIOA_5};
    337static const unsigned int tdmc_dout1_pins[] = {GPIOA_5};
    338static const unsigned int tdmc_din2_pins[] = {GPIOA_6};
    339static const unsigned int tdmc_dout2_pins[] = {GPIOA_6};
    340static const unsigned int tdmc_din3_pins[] = {GPIOA_7};
    341static const unsigned int tdmc_dout3_pins[] = {GPIOA_7};
    342
    343static const unsigned int tdmb_sclk_pins[] = {GPIOA_8};
    344static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8};
    345static const unsigned int tdmb_fs_pins[] = {GPIOA_9};
    346static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9};
    347static const unsigned int tdmb_din0_pins[] = {GPIOA_10};
    348static const unsigned int tdmb_dout0_pins[] = {GPIOA_10};
    349static const unsigned int tdmb_din1_pins[] = {GPIOA_11};
    350static const unsigned int tdmb_dout1_pins[] = {GPIOA_11};
    351static const unsigned int tdmb_din2_pins[] = {GPIOA_12};
    352static const unsigned int tdmb_dout2_pins[] = {GPIOA_12};
    353static const unsigned int tdmb_din3_pins[] = {GPIOA_13};
    354static const unsigned int tdmb_dout3_pins[] = {GPIOA_13};
    355
    356static struct meson_pmx_group meson_axg_periphs_groups[] = {
    357	GPIO_GROUP(GPIOZ_0),
    358	GPIO_GROUP(GPIOZ_1),
    359	GPIO_GROUP(GPIOZ_2),
    360	GPIO_GROUP(GPIOZ_3),
    361	GPIO_GROUP(GPIOZ_4),
    362	GPIO_GROUP(GPIOZ_5),
    363	GPIO_GROUP(GPIOZ_6),
    364	GPIO_GROUP(GPIOZ_7),
    365	GPIO_GROUP(GPIOZ_8),
    366	GPIO_GROUP(GPIOZ_9),
    367	GPIO_GROUP(GPIOZ_10),
    368
    369	GPIO_GROUP(BOOT_0),
    370	GPIO_GROUP(BOOT_1),
    371	GPIO_GROUP(BOOT_2),
    372	GPIO_GROUP(BOOT_3),
    373	GPIO_GROUP(BOOT_4),
    374	GPIO_GROUP(BOOT_5),
    375	GPIO_GROUP(BOOT_6),
    376	GPIO_GROUP(BOOT_7),
    377	GPIO_GROUP(BOOT_8),
    378	GPIO_GROUP(BOOT_9),
    379	GPIO_GROUP(BOOT_10),
    380	GPIO_GROUP(BOOT_11),
    381	GPIO_GROUP(BOOT_12),
    382	GPIO_GROUP(BOOT_13),
    383	GPIO_GROUP(BOOT_14),
    384
    385	GPIO_GROUP(GPIOA_0),
    386	GPIO_GROUP(GPIOA_1),
    387	GPIO_GROUP(GPIOA_2),
    388	GPIO_GROUP(GPIOA_3),
    389	GPIO_GROUP(GPIOA_4),
    390	GPIO_GROUP(GPIOA_5),
    391	GPIO_GROUP(GPIOA_6),
    392	GPIO_GROUP(GPIOA_7),
    393	GPIO_GROUP(GPIOA_8),
    394	GPIO_GROUP(GPIOA_9),
    395	GPIO_GROUP(GPIOA_10),
    396	GPIO_GROUP(GPIOA_11),
    397	GPIO_GROUP(GPIOA_12),
    398	GPIO_GROUP(GPIOA_13),
    399	GPIO_GROUP(GPIOA_14),
    400	GPIO_GROUP(GPIOA_15),
    401	GPIO_GROUP(GPIOA_16),
    402	GPIO_GROUP(GPIOA_17),
    403	GPIO_GROUP(GPIOA_19),
    404	GPIO_GROUP(GPIOA_20),
    405
    406	GPIO_GROUP(GPIOX_0),
    407	GPIO_GROUP(GPIOX_1),
    408	GPIO_GROUP(GPIOX_2),
    409	GPIO_GROUP(GPIOX_3),
    410	GPIO_GROUP(GPIOX_4),
    411	GPIO_GROUP(GPIOX_5),
    412	GPIO_GROUP(GPIOX_6),
    413	GPIO_GROUP(GPIOX_7),
    414	GPIO_GROUP(GPIOX_8),
    415	GPIO_GROUP(GPIOX_9),
    416	GPIO_GROUP(GPIOX_10),
    417	GPIO_GROUP(GPIOX_11),
    418	GPIO_GROUP(GPIOX_12),
    419	GPIO_GROUP(GPIOX_13),
    420	GPIO_GROUP(GPIOX_14),
    421	GPIO_GROUP(GPIOX_15),
    422	GPIO_GROUP(GPIOX_16),
    423	GPIO_GROUP(GPIOX_17),
    424	GPIO_GROUP(GPIOX_18),
    425	GPIO_GROUP(GPIOX_19),
    426	GPIO_GROUP(GPIOX_20),
    427	GPIO_GROUP(GPIOX_21),
    428	GPIO_GROUP(GPIOX_22),
    429
    430	GPIO_GROUP(GPIOY_0),
    431	GPIO_GROUP(GPIOY_1),
    432	GPIO_GROUP(GPIOY_2),
    433	GPIO_GROUP(GPIOY_3),
    434	GPIO_GROUP(GPIOY_4),
    435	GPIO_GROUP(GPIOY_5),
    436	GPIO_GROUP(GPIOY_6),
    437	GPIO_GROUP(GPIOY_7),
    438	GPIO_GROUP(GPIOY_8),
    439	GPIO_GROUP(GPIOY_9),
    440	GPIO_GROUP(GPIOY_10),
    441	GPIO_GROUP(GPIOY_11),
    442	GPIO_GROUP(GPIOY_12),
    443	GPIO_GROUP(GPIOY_13),
    444	GPIO_GROUP(GPIOY_14),
    445	GPIO_GROUP(GPIOY_15),
    446
    447	/* bank BOOT */
    448	GROUP(emmc_nand_d0, 1),
    449	GROUP(emmc_nand_d1, 1),
    450	GROUP(emmc_nand_d2, 1),
    451	GROUP(emmc_nand_d3, 1),
    452	GROUP(emmc_nand_d4, 1),
    453	GROUP(emmc_nand_d5, 1),
    454	GROUP(emmc_nand_d6, 1),
    455	GROUP(emmc_nand_d7, 1),
    456	GROUP(emmc_clk, 1),
    457	GROUP(emmc_cmd, 1),
    458	GROUP(emmc_ds, 1),
    459	GROUP(nand_ce0, 2),
    460	GROUP(nand_ale, 2),
    461	GROUP(nand_cle, 2),
    462	GROUP(nand_wen_clk, 2),
    463	GROUP(nand_ren_wr, 2),
    464	GROUP(nand_rb0, 2),
    465	GROUP(nor_hold, 3),
    466	GROUP(nor_d, 3),
    467	GROUP(nor_q, 3),
    468	GROUP(nor_c, 3),
    469	GROUP(nor_wp, 3),
    470	GROUP(nor_cs, 3),
    471
    472	/* bank GPIOZ */
    473	GROUP(spi0_clk, 1),
    474	GROUP(spi0_mosi, 1),
    475	GROUP(spi0_miso, 1),
    476	GROUP(spi0_ss0, 1),
    477	GROUP(spi0_ss1, 1),
    478	GROUP(spi0_ss2, 1),
    479	GROUP(i2c0_sck, 1),
    480	GROUP(i2c0_sda, 1),
    481	GROUP(i2c1_sck_z, 1),
    482	GROUP(i2c1_sda_z, 1),
    483	GROUP(uart_rts_b_z, 2),
    484	GROUP(uart_cts_b_z, 2),
    485	GROUP(uart_tx_b_z, 2),
    486	GROUP(uart_rx_b_z, 2),
    487	GROUP(pwm_a_z, 2),
    488	GROUP(pwm_b_z, 2),
    489	GROUP(spdif_in_z, 3),
    490	GROUP(spdif_out_z, 3),
    491	GROUP(uart_ao_tx_b_z, 2),
    492	GROUP(uart_ao_rx_b_z, 2),
    493	GROUP(uart_ao_cts_b_z, 2),
    494	GROUP(uart_ao_rts_b_z, 2),
    495
    496	/* bank GPIOX */
    497	GROUP(sdio_d0, 1),
    498	GROUP(sdio_d1, 1),
    499	GROUP(sdio_d2, 1),
    500	GROUP(sdio_d3, 1),
    501	GROUP(sdio_clk, 1),
    502	GROUP(sdio_cmd, 1),
    503	GROUP(i2c1_sck_x, 1),
    504	GROUP(i2c1_sda_x, 1),
    505	GROUP(i2c2_sck_x, 1),
    506	GROUP(i2c2_sda_x, 1),
    507	GROUP(uart_rts_a, 1),
    508	GROUP(uart_cts_a, 1),
    509	GROUP(uart_tx_a, 1),
    510	GROUP(uart_rx_a, 1),
    511	GROUP(uart_rts_b_x, 2),
    512	GROUP(uart_cts_b_x, 2),
    513	GROUP(uart_tx_b_x, 2),
    514	GROUP(uart_rx_b_x, 2),
    515	GROUP(jtag_tdo_x, 2),
    516	GROUP(jtag_tdi_x, 2),
    517	GROUP(jtag_clk_x, 2),
    518	GROUP(jtag_tms_x, 2),
    519	GROUP(spi1_clk_x, 4),
    520	GROUP(spi1_mosi_x, 4),
    521	GROUP(spi1_miso_x, 4),
    522	GROUP(spi1_ss0_x, 4),
    523	GROUP(pwm_a_x18, 3),
    524	GROUP(pwm_a_x20, 1),
    525	GROUP(pwm_b_x, 3),
    526	GROUP(pwm_c_x10, 3),
    527	GROUP(pwm_c_x17, 3),
    528	GROUP(pwm_d_x11, 3),
    529	GROUP(pwm_d_x16, 3),
    530	GROUP(eth_txd0_x, 4),
    531	GROUP(eth_txd1_x, 4),
    532	GROUP(eth_txen_x, 4),
    533	GROUP(eth_rgmii_rx_clk_x, 4),
    534	GROUP(eth_rxd0_x, 4),
    535	GROUP(eth_rxd1_x, 4),
    536	GROUP(eth_rx_dv_x, 4),
    537	GROUP(eth_mdio_x, 4),
    538	GROUP(eth_mdc_x, 4),
    539	GROUP(tdma_sclk, 1),
    540	GROUP(tdma_sclk_slv, 2),
    541	GROUP(tdma_fs, 1),
    542	GROUP(tdma_fs_slv, 2),
    543	GROUP(tdma_din0, 1),
    544	GROUP(tdma_dout0_x14, 2),
    545	GROUP(tdma_dout0_x15, 1),
    546	GROUP(tdma_dout1, 2),
    547	GROUP(tdma_din1, 3),
    548
    549	/* bank GPIOY */
    550	GROUP(eth_txd0_y, 1),
    551	GROUP(eth_txd1_y, 1),
    552	GROUP(eth_txen_y, 1),
    553	GROUP(eth_rgmii_rx_clk_y, 1),
    554	GROUP(eth_rxd0_y, 1),
    555	GROUP(eth_rxd1_y, 1),
    556	GROUP(eth_rx_dv_y, 1),
    557	GROUP(eth_mdio_y, 1),
    558	GROUP(eth_mdc_y, 1),
    559	GROUP(eth_rxd2_rgmii, 1),
    560	GROUP(eth_rxd3_rgmii, 1),
    561	GROUP(eth_rgmii_tx_clk, 1),
    562	GROUP(eth_txd2_rgmii, 1),
    563	GROUP(eth_txd3_rgmii, 1),
    564
    565	/* bank GPIOA */
    566	GROUP(spdif_out_a1, 4),
    567	GROUP(spdif_out_a11, 3),
    568	GROUP(spdif_out_a19, 2),
    569	GROUP(spdif_out_a20, 1),
    570	GROUP(spdif_in_a1, 3),
    571	GROUP(spdif_in_a7, 3),
    572	GROUP(spdif_in_a19, 1),
    573	GROUP(spdif_in_a20, 2),
    574	GROUP(spi1_clk_a, 3),
    575	GROUP(spi1_mosi_a, 3),
    576	GROUP(spi1_miso_a, 3),
    577	GROUP(spi1_ss0_a, 3),
    578	GROUP(spi1_ss1, 3),
    579	GROUP(pwm_a_a, 3),
    580	GROUP(pwm_b_a, 3),
    581	GROUP(pwm_c_a, 3),
    582	GROUP(pwm_vs, 2),
    583	GROUP(i2c2_sda_a, 3),
    584	GROUP(i2c2_sck_a, 3),
    585	GROUP(i2c3_sda_a6, 4),
    586	GROUP(i2c3_sck_a7, 4),
    587	GROUP(i2c3_sda_a12, 4),
    588	GROUP(i2c3_sck_a13, 4),
    589	GROUP(i2c3_sda_a19, 4),
    590	GROUP(i2c3_sck_a20, 4),
    591	GROUP(pdm_dclk_a14, 1),
    592	GROUP(pdm_dclk_a19, 3),
    593	GROUP(pdm_din0, 1),
    594	GROUP(pdm_din1, 1),
    595	GROUP(pdm_din2, 1),
    596	GROUP(pdm_din3, 1),
    597	GROUP(mclk_c, 1),
    598	GROUP(mclk_b, 1),
    599	GROUP(tdmc_sclk, 1),
    600	GROUP(tdmc_sclk_slv, 2),
    601	GROUP(tdmc_fs, 1),
    602	GROUP(tdmc_fs_slv, 2),
    603	GROUP(tdmc_din0, 2),
    604	GROUP(tdmc_dout0, 1),
    605	GROUP(tdmc_din1, 2),
    606	GROUP(tdmc_dout1, 1),
    607	GROUP(tdmc_din2, 2),
    608	GROUP(tdmc_dout2, 1),
    609	GROUP(tdmc_din3, 2),
    610	GROUP(tdmc_dout3, 1),
    611	GROUP(tdmb_sclk, 1),
    612	GROUP(tdmb_sclk_slv, 2),
    613	GROUP(tdmb_fs, 1),
    614	GROUP(tdmb_fs_slv, 2),
    615	GROUP(tdmb_din0, 2),
    616	GROUP(tdmb_dout0, 1),
    617	GROUP(tdmb_din1, 2),
    618	GROUP(tdmb_dout1, 1),
    619	GROUP(tdmb_din2, 2),
    620	GROUP(tdmb_dout2, 1),
    621	GROUP(tdmb_din3, 2),
    622	GROUP(tdmb_dout3, 1),
    623};
    624
    625/* uart_ao_a */
    626static const unsigned int uart_ao_tx_a_pins[] = {GPIOAO_0};
    627static const unsigned int uart_ao_rx_a_pins[] = {GPIOAO_1};
    628static const unsigned int uart_ao_cts_a_pins[] = {GPIOAO_2};
    629static const unsigned int uart_ao_rts_a_pins[] = {GPIOAO_3};
    630
    631/* uart_ao_b */
    632static const unsigned int uart_ao_tx_b_pins[] = {GPIOAO_4};
    633static const unsigned int uart_ao_rx_b_pins[] = {GPIOAO_5};
    634static const unsigned int uart_ao_cts_b_pins[] = {GPIOAO_2};
    635static const unsigned int uart_ao_rts_b_pins[] = {GPIOAO_3};
    636
    637/* i2c_ao */
    638static const unsigned int i2c_ao_sck_4_pins[] = {GPIOAO_4};
    639static const unsigned int i2c_ao_sda_5_pins[] = {GPIOAO_5};
    640static const unsigned int i2c_ao_sck_8_pins[] = {GPIOAO_8};
    641static const unsigned int i2c_ao_sda_9_pins[] = {GPIOAO_9};
    642static const unsigned int i2c_ao_sck_10_pins[] = {GPIOAO_10};
    643static const unsigned int i2c_ao_sda_11_pins[] = {GPIOAO_11};
    644
    645/* i2c_ao_slave */
    646static const unsigned int i2c_ao_slave_sck_pins[] = {GPIOAO_10};
    647static const unsigned int i2c_ao_slave_sda_pins[] = {GPIOAO_11};
    648
    649/* ir_in */
    650static const unsigned int remote_input_ao_pins[] = {GPIOAO_6};
    651
    652/* ir_out */
    653static const unsigned int remote_out_ao_pins[] = {GPIOAO_7};
    654
    655/* pwm_ao_a */
    656static const unsigned int pwm_ao_a_pins[] = {GPIOAO_3};
    657
    658/* pwm_ao_b */
    659static const unsigned int pwm_ao_b_ao2_pins[] = {GPIOAO_2};
    660static const unsigned int pwm_ao_b_ao12_pins[] = {GPIOAO_12};
    661
    662/* pwm_ao_c */
    663static const unsigned int pwm_ao_c_ao8_pins[] = {GPIOAO_8};
    664static const unsigned int pwm_ao_c_ao13_pins[] = {GPIOAO_13};
    665
    666/* pwm_ao_d */
    667static const unsigned int pwm_ao_d_pins[] = {GPIOAO_9};
    668
    669/* jtag_ao */
    670static const unsigned int jtag_ao_tdi_pins[] = {GPIOAO_3};
    671static const unsigned int jtag_ao_tdo_pins[] = {GPIOAO_4};
    672static const unsigned int jtag_ao_clk_pins[] = {GPIOAO_5};
    673static const unsigned int jtag_ao_tms_pins[] = {GPIOAO_7};
    674
    675/* gen_clk */
    676static const unsigned int gen_clk_ee_pins[] = {GPIOAO_13};
    677
    678static struct meson_pmx_group meson_axg_aobus_groups[] = {
    679	GPIO_GROUP(GPIOAO_0),
    680	GPIO_GROUP(GPIOAO_1),
    681	GPIO_GROUP(GPIOAO_2),
    682	GPIO_GROUP(GPIOAO_3),
    683	GPIO_GROUP(GPIOAO_4),
    684	GPIO_GROUP(GPIOAO_5),
    685	GPIO_GROUP(GPIOAO_6),
    686	GPIO_GROUP(GPIOAO_7),
    687	GPIO_GROUP(GPIOAO_8),
    688	GPIO_GROUP(GPIOAO_9),
    689	GPIO_GROUP(GPIOAO_10),
    690	GPIO_GROUP(GPIOAO_11),
    691	GPIO_GROUP(GPIOAO_12),
    692	GPIO_GROUP(GPIOAO_13),
    693	GPIO_GROUP(GPIO_TEST_N),
    694
    695	/* bank AO */
    696	GROUP(uart_ao_tx_a, 1),
    697	GROUP(uart_ao_rx_a, 1),
    698	GROUP(uart_ao_cts_a, 2),
    699	GROUP(uart_ao_rts_a, 2),
    700	GROUP(uart_ao_tx_b, 1),
    701	GROUP(uart_ao_rx_b, 1),
    702	GROUP(uart_ao_cts_b, 1),
    703	GROUP(uart_ao_rts_b, 1),
    704	GROUP(i2c_ao_sck_4, 2),
    705	GROUP(i2c_ao_sda_5, 2),
    706	GROUP(i2c_ao_sck_8, 2),
    707	GROUP(i2c_ao_sda_9, 2),
    708	GROUP(i2c_ao_sck_10, 2),
    709	GROUP(i2c_ao_sda_11, 2),
    710	GROUP(i2c_ao_slave_sck, 1),
    711	GROUP(i2c_ao_slave_sda, 1),
    712	GROUP(remote_input_ao, 1),
    713	GROUP(remote_out_ao, 1),
    714	GROUP(pwm_ao_a, 3),
    715	GROUP(pwm_ao_b_ao2, 3),
    716	GROUP(pwm_ao_b_ao12, 3),
    717	GROUP(pwm_ao_c_ao8, 3),
    718	GROUP(pwm_ao_c_ao13, 3),
    719	GROUP(pwm_ao_d, 3),
    720	GROUP(jtag_ao_tdi, 4),
    721	GROUP(jtag_ao_tdo, 4),
    722	GROUP(jtag_ao_clk, 4),
    723	GROUP(jtag_ao_tms, 4),
    724	GROUP(gen_clk_ee, 4),
    725};
    726
    727static const char * const gpio_periphs_groups[] = {
    728	"GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
    729	"GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
    730	"GPIOZ_10",
    731
    732	"BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
    733	"BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
    734	"BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
    735
    736	"GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
    737	"GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
    738	"GPIOA_10", "GPIOA_11", "GPIOA_12", "GPIOA_13", "GPIOA_14",
    739	"GPIOA_15", "GPIOA_16", "GPIOA_17", "GPIOA_18", "GPIOA_19",
    740	"GPIOA_20",
    741
    742	"GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
    743	"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
    744	"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
    745	"GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
    746	"GPIOX_20", "GPIOX_21", "GPIOX_22",
    747
    748	"GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
    749	"GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
    750	"GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
    751	"GPIOY_15",
    752};
    753
    754static const char * const emmc_groups[] = {
    755	"emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
    756	"emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
    757	"emmc_nand_d6", "emmc_nand_d7",
    758	"emmc_clk", "emmc_cmd", "emmc_ds",
    759};
    760
    761static const char * const nand_groups[] = {
    762	"emmc_nand_d0", "emmc_nand_d1", "emmc_nand_d2",
    763	"emmc_nand_d3", "emmc_nand_d4", "emmc_nand_d5",
    764	"emmc_nand_d6", "emmc_nand_d7",
    765	"nand_ce0", "nand_ale", "nand_cle",
    766	"nand_wen_clk", "nand_ren_wr", "nand_rb0",
    767};
    768
    769static const char * const nor_groups[] = {
    770	"nor_d", "nor_q", "nor_c", "nor_cs",
    771	"nor_hold", "nor_wp",
    772};
    773
    774static const char * const sdio_groups[] = {
    775	"sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
    776	"sdio_cmd", "sdio_clk",
    777};
    778
    779static const char * const spi0_groups[] = {
    780	"spi0_clk", "spi0_mosi", "spi0_miso", "spi0_ss0",
    781	"spi0_ss1", "spi0_ss2"
    782};
    783
    784static const char * const spi1_groups[] = {
    785	"spi1_clk_x", "spi1_mosi_x", "spi1_miso_x", "spi1_ss0_x",
    786	"spi1_clk_a", "spi1_mosi_a", "spi1_miso_a", "spi1_ss0_a",
    787	"spi1_ss1"
    788};
    789
    790static const char * const uart_a_groups[] = {
    791	"uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
    792};
    793
    794static const char * const uart_b_groups[] = {
    795	"uart_tx_b_z", "uart_rx_b_z", "uart_cts_b_z", "uart_rts_b_z",
    796	"uart_tx_b_x", "uart_rx_b_x", "uart_cts_b_x", "uart_rts_b_x",
    797};
    798
    799static const char * const uart_ao_b_z_groups[] = {
    800	"uart_ao_tx_b_z", "uart_ao_rx_b_z",
    801	"uart_ao_cts_b_z", "uart_ao_rts_b_z",
    802};
    803
    804static const char * const i2c0_groups[] = {
    805	"i2c0_sck", "i2c0_sda",
    806};
    807
    808static const char * const i2c1_groups[] = {
    809	"i2c1_sck_z", "i2c1_sda_z",
    810	"i2c1_sck_x", "i2c1_sda_x",
    811};
    812
    813static const char * const i2c2_groups[] = {
    814	"i2c2_sck_x", "i2c2_sda_x",
    815	"i2c2_sda_a", "i2c2_sck_a",
    816};
    817
    818static const char * const i2c3_groups[] = {
    819	"i2c3_sda_a6", "i2c3_sck_a7",
    820	"i2c3_sda_a12", "i2c3_sck_a13",
    821	"i2c3_sda_a19", "i2c3_sck_a20",
    822};
    823
    824static const char * const eth_groups[] = {
    825	"eth_rxd2_rgmii", "eth_rxd3_rgmii", "eth_rgmii_tx_clk",
    826	"eth_txd2_rgmii", "eth_txd3_rgmii",
    827	"eth_txd0_x", "eth_txd1_x", "eth_txen_x", "eth_rgmii_rx_clk_x",
    828	"eth_rxd0_x", "eth_rxd1_x", "eth_rx_dv_x", "eth_mdio_x",
    829	"eth_mdc_x",
    830	"eth_txd0_y", "eth_txd1_y", "eth_txen_y", "eth_rgmii_rx_clk_y",
    831	"eth_rxd0_y", "eth_rxd1_y", "eth_rx_dv_y", "eth_mdio_y",
    832	"eth_mdc_y",
    833};
    834
    835static const char * const pwm_a_groups[] = {
    836	"pwm_a_z", "pwm_a_x18", "pwm_a_x20", "pwm_a_a",
    837};
    838
    839static const char * const pwm_b_groups[] = {
    840	"pwm_b_z", "pwm_b_x", "pwm_b_a",
    841};
    842
    843static const char * const pwm_c_groups[] = {
    844	"pwm_c_x10", "pwm_c_x17", "pwm_c_a",
    845};
    846
    847static const char * const pwm_d_groups[] = {
    848	"pwm_d_x11", "pwm_d_x16",
    849};
    850
    851static const char * const pwm_vs_groups[] = {
    852	"pwm_vs",
    853};
    854
    855static const char * const spdif_out_groups[] = {
    856	"spdif_out_z", "spdif_out_a1", "spdif_out_a11",
    857	"spdif_out_a19", "spdif_out_a20",
    858};
    859
    860static const char * const spdif_in_groups[] = {
    861	"spdif_in_z", "spdif_in_a1", "spdif_in_a7",
    862	"spdif_in_a19", "spdif_in_a20",
    863};
    864
    865static const char * const jtag_ee_groups[] = {
    866	"jtag_tdo_x", "jtag_tdi_x", "jtag_clk_x",
    867	"jtag_tms_x",
    868};
    869
    870static const char * const pdm_groups[] = {
    871	"pdm_din0", "pdm_din1", "pdm_din2", "pdm_din3",
    872	"pdm_dclk_a14", "pdm_dclk_a19",
    873};
    874
    875static const char * const gpio_aobus_groups[] = {
    876	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
    877	"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
    878	"GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
    879	"GPIO_TEST_N",
    880};
    881
    882static const char * const uart_ao_a_groups[] = {
    883	"uart_ao_tx_a", "uart_ao_rx_a", "uart_ao_cts_a", "uart_ao_rts_a",
    884};
    885
    886static const char * const uart_ao_b_groups[] = {
    887	"uart_ao_tx_b", "uart_ao_rx_b", "uart_ao_cts_b", "uart_ao_rts_b",
    888};
    889
    890static const char * const i2c_ao_groups[] = {
    891	"i2c_ao_sck_4", "i2c_ao_sda_5",
    892	"i2c_ao_sck_8", "i2c_ao_sda_9",
    893	"i2c_ao_sck_10", "i2c_ao_sda_11",
    894};
    895
    896static const char * const i2c_ao_slave_groups[] = {
    897	"i2c_ao_slave_sck", "i2c_ao_slave_sda",
    898};
    899
    900static const char * const remote_input_ao_groups[] = {
    901	"remote_input_ao",
    902};
    903
    904static const char * const remote_out_ao_groups[] = {
    905	"remote_out_ao",
    906};
    907
    908static const char * const pwm_ao_a_groups[] = {
    909	"pwm_ao_a",
    910};
    911
    912static const char * const pwm_ao_b_groups[] = {
    913	"pwm_ao_b_ao2", "pwm_ao_b_ao12",
    914};
    915
    916static const char * const pwm_ao_c_groups[] = {
    917	"pwm_ao_c_ao8", "pwm_ao_c_ao13",
    918};
    919
    920static const char * const pwm_ao_d_groups[] = {
    921	"pwm_ao_d",
    922};
    923
    924static const char * const jtag_ao_groups[] = {
    925	"jtag_ao_tdi", "jtag_ao_tdo", "jtag_ao_clk", "jtag_ao_tms",
    926};
    927
    928static const char * const mclk_c_groups[] = {
    929	"mclk_c",
    930};
    931
    932static const char * const mclk_b_groups[] = {
    933	"mclk_b",
    934};
    935
    936static const char * const tdma_groups[] = {
    937	"tdma_sclk", "tdma_sclk_slv", "tdma_fs", "tdma_fs_slv",
    938	"tdma_din0", "tdma_dout0_x14", "tdma_dout0_x15", "tdma_dout1",
    939	"tdma_din1",
    940};
    941
    942static const char * const tdmc_groups[] = {
    943	"tdmc_sclk", "tdmc_sclk_slv", "tdmc_fs", "tdmc_fs_slv",
    944	"tdmc_din0", "tdmc_dout0", "tdmc_din1",	"tdmc_dout1",
    945	"tdmc_din2", "tdmc_dout2", "tdmc_din3",	"tdmc_dout3",
    946};
    947
    948static const char * const tdmb_groups[] = {
    949	"tdmb_sclk", "tdmb_sclk_slv", "tdmb_fs", "tdmb_fs_slv",
    950	"tdmb_din0", "tdmb_dout0", "tdmb_din1",	"tdmb_dout1",
    951	"tdmb_din2", "tdmb_dout2", "tdmb_din3",	"tdmb_dout3",
    952};
    953
    954static const char * const gen_clk_ee_groups[] = {
    955	"gen_clk_ee",
    956};
    957
    958static struct meson_pmx_func meson_axg_periphs_functions[] = {
    959	FUNCTION(gpio_periphs),
    960	FUNCTION(emmc),
    961	FUNCTION(nor),
    962	FUNCTION(spi0),
    963	FUNCTION(spi1),
    964	FUNCTION(sdio),
    965	FUNCTION(nand),
    966	FUNCTION(uart_a),
    967	FUNCTION(uart_b),
    968	FUNCTION(uart_ao_b_z),
    969	FUNCTION(i2c0),
    970	FUNCTION(i2c1),
    971	FUNCTION(i2c2),
    972	FUNCTION(i2c3),
    973	FUNCTION(eth),
    974	FUNCTION(pwm_a),
    975	FUNCTION(pwm_b),
    976	FUNCTION(pwm_c),
    977	FUNCTION(pwm_d),
    978	FUNCTION(pwm_vs),
    979	FUNCTION(spdif_out),
    980	FUNCTION(spdif_in),
    981	FUNCTION(jtag_ee),
    982	FUNCTION(pdm),
    983	FUNCTION(mclk_b),
    984	FUNCTION(mclk_c),
    985	FUNCTION(tdma),
    986	FUNCTION(tdmb),
    987	FUNCTION(tdmc),
    988};
    989
    990static struct meson_pmx_func meson_axg_aobus_functions[] = {
    991	FUNCTION(gpio_aobus),
    992	FUNCTION(uart_ao_a),
    993	FUNCTION(uart_ao_b),
    994	FUNCTION(i2c_ao),
    995	FUNCTION(i2c_ao_slave),
    996	FUNCTION(remote_input_ao),
    997	FUNCTION(remote_out_ao),
    998	FUNCTION(pwm_ao_a),
    999	FUNCTION(pwm_ao_b),
   1000	FUNCTION(pwm_ao_c),
   1001	FUNCTION(pwm_ao_d),
   1002	FUNCTION(jtag_ao),
   1003	FUNCTION(gen_clk_ee),
   1004};
   1005
   1006static struct meson_bank meson_axg_periphs_banks[] = {
   1007	/*   name    first      last       irq	     pullen  pull    dir     out     in  */
   1008	BANK("Z",    GPIOZ_0,	GPIOZ_10, 14,  24, 3,  0,  3,  0,  9,  0,  10, 0,  11, 0),
   1009	BANK("BOOT", BOOT_0,	BOOT_14,  25,  39, 4,  0,  4,  0,  12, 0,  13, 0,  14, 0),
   1010	BANK("A",    GPIOA_0,	GPIOA_20, 40,  60, 0,  0,  0,  0,  0,  0,  1,  0,  2,  0),
   1011	BANK("X",    GPIOX_0,	GPIOX_22, 61,  83, 2,  0,  2,  0,  6,  0,  7,  0,  8,  0),
   1012	BANK("Y", 	 GPIOY_0,	GPIOY_15, 84,  99, 1,  0,  1,  0,  3,  0,  4,  0,  5,  0),
   1013};
   1014
   1015static struct meson_bank meson_axg_aobus_banks[] = {
   1016	/*   name    first      last      irq	pullen  pull    dir     out     in  */
   1017	BANK("AO",   GPIOAO_0,  GPIOAO_13, 0, 13, 0,  16,  0, 0,  0,  0,  0, 16,  1,  0),
   1018};
   1019
   1020static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
   1021	/*	 name	 first		lask	   reg	offset  */
   1022	BANK_PMX("Z",	 GPIOZ_0, GPIOZ_10, 0x2, 0),
   1023	BANK_PMX("BOOT", BOOT_0,  BOOT_14,  0x0, 0),
   1024	BANK_PMX("A",	 GPIOA_0, GPIOA_20, 0xb, 0),
   1025	BANK_PMX("X",	 GPIOX_0, GPIOX_22, 0x4, 0),
   1026	BANK_PMX("Y",	 GPIOY_0, GPIOY_15, 0x8, 0),
   1027};
   1028
   1029static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
   1030	.pmx_banks	= meson_axg_periphs_pmx_banks,
   1031	.num_pmx_banks = ARRAY_SIZE(meson_axg_periphs_pmx_banks),
   1032};
   1033
   1034static struct meson_pmx_bank meson_axg_aobus_pmx_banks[] = {
   1035	BANK_PMX("AO", GPIOAO_0, GPIOAO_13, 0x0, 0),
   1036};
   1037
   1038static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
   1039	.pmx_banks	= meson_axg_aobus_pmx_banks,
   1040	.num_pmx_banks = ARRAY_SIZE(meson_axg_aobus_pmx_banks),
   1041};
   1042
   1043static struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
   1044	.name		= "periphs-banks",
   1045	.pins		= meson_axg_periphs_pins,
   1046	.groups		= meson_axg_periphs_groups,
   1047	.funcs		= meson_axg_periphs_functions,
   1048	.banks		= meson_axg_periphs_banks,
   1049	.num_pins	= ARRAY_SIZE(meson_axg_periphs_pins),
   1050	.num_groups	= ARRAY_SIZE(meson_axg_periphs_groups),
   1051	.num_funcs	= ARRAY_SIZE(meson_axg_periphs_functions),
   1052	.num_banks	= ARRAY_SIZE(meson_axg_periphs_banks),
   1053	.pmx_ops	= &meson_axg_pmx_ops,
   1054	.pmx_data	= &meson_axg_periphs_pmx_banks_data,
   1055};
   1056
   1057static struct meson_pinctrl_data meson_axg_aobus_pinctrl_data = {
   1058	.name		= "aobus-banks",
   1059	.pins		= meson_axg_aobus_pins,
   1060	.groups		= meson_axg_aobus_groups,
   1061	.funcs		= meson_axg_aobus_functions,
   1062	.banks		= meson_axg_aobus_banks,
   1063	.num_pins	= ARRAY_SIZE(meson_axg_aobus_pins),
   1064	.num_groups	= ARRAY_SIZE(meson_axg_aobus_groups),
   1065	.num_funcs	= ARRAY_SIZE(meson_axg_aobus_functions),
   1066	.num_banks	= ARRAY_SIZE(meson_axg_aobus_banks),
   1067	.pmx_ops	= &meson_axg_pmx_ops,
   1068	.pmx_data	= &meson_axg_aobus_pmx_banks_data,
   1069	.parse_dt	= meson8_aobus_parse_dt_extra,
   1070};
   1071
   1072static const struct of_device_id meson_axg_pinctrl_dt_match[] = {
   1073	{
   1074		.compatible = "amlogic,meson-axg-periphs-pinctrl",
   1075		.data = &meson_axg_periphs_pinctrl_data,
   1076	},
   1077	{
   1078		.compatible = "amlogic,meson-axg-aobus-pinctrl",
   1079		.data = &meson_axg_aobus_pinctrl_data,
   1080	},
   1081	{ },
   1082};
   1083MODULE_DEVICE_TABLE(of, meson_axg_pinctrl_dt_match);
   1084
   1085static struct platform_driver meson_axg_pinctrl_driver = {
   1086	.probe		= meson_pinctrl_probe,
   1087	.driver = {
   1088		.name	= "meson-axg-pinctrl",
   1089		.of_match_table = meson_axg_pinctrl_dt_match,
   1090	},
   1091};
   1092
   1093module_platform_driver(meson_axg_pinctrl_driver);
   1094MODULE_LICENSE("Dual BSD/GPL");