pinctrl-armada-375.c (13481B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Marvell Armada 375 pinctrl driver based on mvebu pinctrl core 4 * 5 * Copyright (C) 2012 Marvell 6 * 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 8 */ 9 10#include <linux/err.h> 11#include <linux/init.h> 12#include <linux/io.h> 13#include <linux/platform_device.h> 14#include <linux/clk.h> 15#include <linux/of.h> 16#include <linux/of_device.h> 17#include <linux/pinctrl/pinctrl.h> 18 19#include "pinctrl-mvebu.h" 20 21static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = { 22 MPP_MODE(0, 23 MPP_FUNCTION(0x0, "gpio", NULL), 24 MPP_FUNCTION(0x1, "dev", "ad2"), 25 MPP_FUNCTION(0x2, "spi0", "cs1"), 26 MPP_FUNCTION(0x3, "spi1", "cs1"), 27 MPP_FUNCTION(0x5, "nand", "io2")), 28 MPP_MODE(1, 29 MPP_FUNCTION(0x0, "gpio", NULL), 30 MPP_FUNCTION(0x1, "dev", "ad3"), 31 MPP_FUNCTION(0x2, "spi0", "mosi"), 32 MPP_FUNCTION(0x3, "spi1", "mosi"), 33 MPP_FUNCTION(0x5, "nand", "io3")), 34 MPP_MODE(2, 35 MPP_FUNCTION(0x0, "gpio", NULL), 36 MPP_FUNCTION(0x1, "dev", "ad4"), 37 MPP_FUNCTION(0x2, "ptp", "evreq"), 38 MPP_FUNCTION(0x3, "led", "c0"), 39 MPP_FUNCTION(0x4, "audio", "sdi"), 40 MPP_FUNCTION(0x5, "nand", "io4"), 41 MPP_FUNCTION(0x6, "spi1", "mosi")), 42 MPP_MODE(3, 43 MPP_FUNCTION(0x0, "gpio", NULL), 44 MPP_FUNCTION(0x1, "dev", "ad5"), 45 MPP_FUNCTION(0x2, "ptp", "trig"), 46 MPP_FUNCTION(0x3, "led", "p3"), 47 MPP_FUNCTION(0x4, "audio", "mclk"), 48 MPP_FUNCTION(0x5, "nand", "io5"), 49 MPP_FUNCTION(0x6, "spi1", "miso")), 50 MPP_MODE(4, 51 MPP_FUNCTION(0x0, "gpio", NULL), 52 MPP_FUNCTION(0x1, "dev", "ad6"), 53 MPP_FUNCTION(0x2, "spi0", "miso"), 54 MPP_FUNCTION(0x3, "spi1", "miso"), 55 MPP_FUNCTION(0x5, "nand", "io6")), 56 MPP_MODE(5, 57 MPP_FUNCTION(0x0, "gpio", NULL), 58 MPP_FUNCTION(0x1, "dev", "ad7"), 59 MPP_FUNCTION(0x2, "spi0", "cs2"), 60 MPP_FUNCTION(0x3, "spi1", "cs2"), 61 MPP_FUNCTION(0x5, "nand", "io7"), 62 MPP_FUNCTION(0x6, "spi1", "miso")), 63 MPP_MODE(6, 64 MPP_FUNCTION(0x0, "gpio", NULL), 65 MPP_FUNCTION(0x1, "dev", "ad0"), 66 MPP_FUNCTION(0x3, "led", "p1"), 67 MPP_FUNCTION(0x4, "audio", "lrclk"), 68 MPP_FUNCTION(0x5, "nand", "io0")), 69 MPP_MODE(7, 70 MPP_FUNCTION(0x0, "gpio", NULL), 71 MPP_FUNCTION(0x1, "dev", "ad1"), 72 MPP_FUNCTION(0x2, "ptp", "clk"), 73 MPP_FUNCTION(0x3, "led", "p2"), 74 MPP_FUNCTION(0x4, "audio", "extclk"), 75 MPP_FUNCTION(0x5, "nand", "io1")), 76 MPP_MODE(8, 77 MPP_FUNCTION(0x0, "gpio", NULL), 78 MPP_FUNCTION(0x1, "dev", "bootcs"), 79 MPP_FUNCTION(0x2, "spi0", "cs0"), 80 MPP_FUNCTION(0x3, "spi1", "cs0"), 81 MPP_FUNCTION(0x5, "nand", "ce")), 82 MPP_MODE(9, 83 MPP_FUNCTION(0x0, "gpio", NULL), 84 MPP_FUNCTION(0x2, "spi0", "sck"), 85 MPP_FUNCTION(0x3, "spi1", "sck"), 86 MPP_FUNCTION(0x5, "nand", "we")), 87 MPP_MODE(10, 88 MPP_FUNCTION(0x0, "gpio", NULL), 89 MPP_FUNCTION(0x2, "dram", "vttctrl"), 90 MPP_FUNCTION(0x3, "led", "c1"), 91 MPP_FUNCTION(0x5, "nand", "re"), 92 MPP_FUNCTION(0x6, "spi1", "sck")), 93 MPP_MODE(11, 94 MPP_FUNCTION(0x0, "gpio", NULL), 95 MPP_FUNCTION(0x1, "dev", "a0"), 96 MPP_FUNCTION(0x3, "led", "c2"), 97 MPP_FUNCTION(0x4, "audio", "sdo"), 98 MPP_FUNCTION(0x5, "nand", "cle")), 99 MPP_MODE(12, 100 MPP_FUNCTION(0x0, "gpio", NULL), 101 MPP_FUNCTION(0x1, "dev", "a1"), 102 MPP_FUNCTION(0x4, "audio", "bclk"), 103 MPP_FUNCTION(0x5, "nand", "ale")), 104 MPP_MODE(13, 105 MPP_FUNCTION(0x0, "gpio", NULL), 106 MPP_FUNCTION(0x1, "dev", "ready"), 107 MPP_FUNCTION(0x2, "pcie0", "rstout"), 108 MPP_FUNCTION(0x3, "pcie1", "rstout"), 109 MPP_FUNCTION(0x5, "nand", "rb"), 110 MPP_FUNCTION(0x6, "spi1", "mosi")), 111 MPP_MODE(14, 112 MPP_FUNCTION(0x0, "gpio", NULL), 113 MPP_FUNCTION(0x2, "i2c0", "sda"), 114 MPP_FUNCTION(0x3, "uart1", "txd")), 115 MPP_MODE(15, 116 MPP_FUNCTION(0x0, "gpio", NULL), 117 MPP_FUNCTION(0x2, "i2c0", "sck"), 118 MPP_FUNCTION(0x3, "uart1", "rxd")), 119 MPP_MODE(16, 120 MPP_FUNCTION(0x0, "gpio", NULL), 121 MPP_FUNCTION(0x2, "uart0", "txd")), 122 MPP_MODE(17, 123 MPP_FUNCTION(0x0, "gpio", NULL), 124 MPP_FUNCTION(0x2, "uart0", "rxd")), 125 MPP_MODE(18, 126 MPP_FUNCTION(0x0, "gpio", NULL), 127 MPP_FUNCTION(0x2, "tdm", "int")), 128 MPP_MODE(19, 129 MPP_FUNCTION(0x0, "gpio", NULL), 130 MPP_FUNCTION(0x2, "tdm", "rst")), 131 MPP_MODE(20, 132 MPP_FUNCTION(0x0, "gpio", NULL), 133 MPP_FUNCTION(0x2, "tdm", "pclk")), 134 MPP_MODE(21, 135 MPP_FUNCTION(0x0, "gpio", NULL), 136 MPP_FUNCTION(0x2, "tdm", "fsync")), 137 MPP_MODE(22, 138 MPP_FUNCTION(0x0, "gpio", NULL), 139 MPP_FUNCTION(0x2, "tdm", "drx")), 140 MPP_MODE(23, 141 MPP_FUNCTION(0x0, "gpio", NULL), 142 MPP_FUNCTION(0x2, "tdm", "dtx")), 143 MPP_MODE(24, 144 MPP_FUNCTION(0x0, "gpio", NULL), 145 MPP_FUNCTION(0x1, "led", "p0"), 146 MPP_FUNCTION(0x2, "ge1", "rxd0"), 147 MPP_FUNCTION(0x3, "sd", "cmd"), 148 MPP_FUNCTION(0x4, "uart0", "rts"), 149 MPP_FUNCTION(0x5, "spi0", "cs0"), 150 MPP_FUNCTION(0x6, "dev", "cs1")), 151 MPP_MODE(25, 152 MPP_FUNCTION(0x0, "gpio", NULL), 153 MPP_FUNCTION(0x1, "led", "p2"), 154 MPP_FUNCTION(0x2, "ge1", "rxd1"), 155 MPP_FUNCTION(0x3, "sd", "d0"), 156 MPP_FUNCTION(0x4, "uart0", "cts"), 157 MPP_FUNCTION(0x5, "spi0", "mosi"), 158 MPP_FUNCTION(0x6, "dev", "cs2")), 159 MPP_MODE(26, 160 MPP_FUNCTION(0x0, "gpio", NULL), 161 MPP_FUNCTION(0x1, "pcie0", "clkreq"), 162 MPP_FUNCTION(0x2, "ge1", "rxd2"), 163 MPP_FUNCTION(0x3, "sd", "d2"), 164 MPP_FUNCTION(0x4, "uart1", "rts"), 165 MPP_FUNCTION(0x5, "spi0", "cs1"), 166 MPP_FUNCTION(0x6, "led", "c1")), 167 MPP_MODE(27, 168 MPP_FUNCTION(0x0, "gpio", NULL), 169 MPP_FUNCTION(0x1, "pcie1", "clkreq"), 170 MPP_FUNCTION(0x2, "ge1", "rxd3"), 171 MPP_FUNCTION(0x3, "sd", "d1"), 172 MPP_FUNCTION(0x4, "uart1", "cts"), 173 MPP_FUNCTION(0x5, "spi0", "miso"), 174 MPP_FUNCTION(0x6, "led", "c2")), 175 MPP_MODE(28, 176 MPP_FUNCTION(0x0, "gpio", NULL), 177 MPP_FUNCTION(0x1, "led", "p3"), 178 MPP_FUNCTION(0x2, "ge1", "txctl"), 179 MPP_FUNCTION(0x3, "sd", "clk"), 180 MPP_FUNCTION(0x5, "dram", "vttctrl")), 181 MPP_MODE(29, 182 MPP_FUNCTION(0x0, "gpio", NULL), 183 MPP_FUNCTION(0x1, "pcie1", "clkreq"), 184 MPP_FUNCTION(0x2, "ge1", "rxclk"), 185 MPP_FUNCTION(0x3, "sd", "d3"), 186 MPP_FUNCTION(0x5, "spi0", "sck"), 187 MPP_FUNCTION(0x6, "pcie0", "rstout")), 188 MPP_MODE(30, 189 MPP_FUNCTION(0x0, "gpio", NULL), 190 MPP_FUNCTION(0x2, "ge1", "txd0"), 191 MPP_FUNCTION(0x3, "spi1", "cs0"), 192 MPP_FUNCTION(0x5, "led", "p3"), 193 MPP_FUNCTION(0x6, "ptp", "evreq")), 194 MPP_MODE(31, 195 MPP_FUNCTION(0x0, "gpio", NULL), 196 MPP_FUNCTION(0x2, "ge1", "txd1"), 197 MPP_FUNCTION(0x3, "spi1", "mosi"), 198 MPP_FUNCTION(0x5, "led", "p0")), 199 MPP_MODE(32, 200 MPP_FUNCTION(0x0, "gpio", NULL), 201 MPP_FUNCTION(0x2, "ge1", "txd2"), 202 MPP_FUNCTION(0x3, "spi1", "sck"), 203 MPP_FUNCTION(0x4, "ptp", "trig"), 204 MPP_FUNCTION(0x5, "led", "c0")), 205 MPP_MODE(33, 206 MPP_FUNCTION(0x0, "gpio", NULL), 207 MPP_FUNCTION(0x2, "ge1", "txd3"), 208 MPP_FUNCTION(0x3, "spi1", "miso"), 209 MPP_FUNCTION(0x5, "led", "p2")), 210 MPP_MODE(34, 211 MPP_FUNCTION(0x0, "gpio", NULL), 212 MPP_FUNCTION(0x2, "ge1", "txclkout"), 213 MPP_FUNCTION(0x3, "spi1", "sck"), 214 MPP_FUNCTION(0x5, "led", "c1")), 215 MPP_MODE(35, 216 MPP_FUNCTION(0x0, "gpio", NULL), 217 MPP_FUNCTION(0x2, "ge1", "rxctl"), 218 MPP_FUNCTION(0x3, "spi1", "cs1"), 219 MPP_FUNCTION(0x4, "spi0", "cs2"), 220 MPP_FUNCTION(0x5, "led", "p1")), 221 MPP_MODE(36, 222 MPP_FUNCTION(0x0, "gpio", NULL), 223 MPP_FUNCTION(0x1, "pcie0", "clkreq"), 224 MPP_FUNCTION(0x5, "led", "c2")), 225 MPP_MODE(37, 226 MPP_FUNCTION(0x0, "gpio", NULL), 227 MPP_FUNCTION(0x1, "pcie0", "clkreq"), 228 MPP_FUNCTION(0x2, "tdm", "int"), 229 MPP_FUNCTION(0x4, "ge", "mdc")), 230 MPP_MODE(38, 231 MPP_FUNCTION(0x0, "gpio", NULL), 232 MPP_FUNCTION(0x1, "pcie1", "clkreq"), 233 MPP_FUNCTION(0x4, "ge", "mdio")), 234 MPP_MODE(39, 235 MPP_FUNCTION(0x0, "gpio", NULL), 236 MPP_FUNCTION(0x4, "ref", "clkout"), 237 MPP_FUNCTION(0x5, "led", "p3")), 238 MPP_MODE(40, 239 MPP_FUNCTION(0x0, "gpio", NULL), 240 MPP_FUNCTION(0x4, "uart1", "txd"), 241 MPP_FUNCTION(0x5, "led", "p0")), 242 MPP_MODE(41, 243 MPP_FUNCTION(0x0, "gpio", NULL), 244 MPP_FUNCTION(0x4, "uart1", "rxd"), 245 MPP_FUNCTION(0x5, "led", "p1")), 246 MPP_MODE(42, 247 MPP_FUNCTION(0x0, "gpio", NULL), 248 MPP_FUNCTION(0x3, "spi1", "cs2"), 249 MPP_FUNCTION(0x4, "led", "c0"), 250 MPP_FUNCTION(0x6, "ptp", "clk")), 251 MPP_MODE(43, 252 MPP_FUNCTION(0x0, "gpio", NULL), 253 MPP_FUNCTION(0x2, "sata0", "prsnt"), 254 MPP_FUNCTION(0x4, "dram", "vttctrl"), 255 MPP_FUNCTION(0x5, "led", "c1")), 256 MPP_MODE(44, 257 MPP_FUNCTION(0x0, "gpio", NULL), 258 MPP_FUNCTION(0x4, "sata0", "prsnt")), 259 MPP_MODE(45, 260 MPP_FUNCTION(0x0, "gpio", NULL), 261 MPP_FUNCTION(0x2, "spi0", "cs2"), 262 MPP_FUNCTION(0x4, "pcie0", "rstout"), 263 MPP_FUNCTION(0x5, "led", "c2"), 264 MPP_FUNCTION(0x6, "spi1", "cs2")), 265 MPP_MODE(46, 266 MPP_FUNCTION(0x0, "gpio", NULL), 267 MPP_FUNCTION(0x1, "led", "p0"), 268 MPP_FUNCTION(0x2, "ge0", "txd0"), 269 MPP_FUNCTION(0x3, "ge1", "txd0"), 270 MPP_FUNCTION(0x6, "dev", "we1")), 271 MPP_MODE(47, 272 MPP_FUNCTION(0x0, "gpio", NULL), 273 MPP_FUNCTION(0x1, "led", "p1"), 274 MPP_FUNCTION(0x2, "ge0", "txd1"), 275 MPP_FUNCTION(0x3, "ge1", "txd1"), 276 MPP_FUNCTION(0x5, "ptp", "trig"), 277 MPP_FUNCTION(0x6, "dev", "ale0")), 278 MPP_MODE(48, 279 MPP_FUNCTION(0x0, "gpio", NULL), 280 MPP_FUNCTION(0x1, "led", "p2"), 281 MPP_FUNCTION(0x2, "ge0", "txd2"), 282 MPP_FUNCTION(0x3, "ge1", "txd2"), 283 MPP_FUNCTION(0x6, "dev", "ale1")), 284 MPP_MODE(49, 285 MPP_FUNCTION(0x0, "gpio", NULL), 286 MPP_FUNCTION(0x1, "led", "p3"), 287 MPP_FUNCTION(0x2, "ge0", "txd3"), 288 MPP_FUNCTION(0x3, "ge1", "txd3"), 289 MPP_FUNCTION(0x6, "dev", "a2")), 290 MPP_MODE(50, 291 MPP_FUNCTION(0x0, "gpio", NULL), 292 MPP_FUNCTION(0x1, "led", "c0"), 293 MPP_FUNCTION(0x2, "ge0", "rxd0"), 294 MPP_FUNCTION(0x3, "ge1", "rxd0"), 295 MPP_FUNCTION(0x5, "ptp", "evreq"), 296 MPP_FUNCTION(0x6, "dev", "ad12")), 297 MPP_MODE(51, 298 MPP_FUNCTION(0x0, "gpio", NULL), 299 MPP_FUNCTION(0x1, "led", "c1"), 300 MPP_FUNCTION(0x2, "ge0", "rxd1"), 301 MPP_FUNCTION(0x3, "ge1", "rxd1"), 302 MPP_FUNCTION(0x6, "dev", "ad8")), 303 MPP_MODE(52, 304 MPP_FUNCTION(0x0, "gpio", NULL), 305 MPP_FUNCTION(0x1, "led", "c2"), 306 MPP_FUNCTION(0x2, "ge0", "rxd2"), 307 MPP_FUNCTION(0x3, "ge1", "rxd2"), 308 MPP_FUNCTION(0x5, "i2c0", "sda"), 309 MPP_FUNCTION(0x6, "dev", "ad9")), 310 MPP_MODE(53, 311 MPP_FUNCTION(0x0, "gpio", NULL), 312 MPP_FUNCTION(0x1, "pcie1", "rstout"), 313 MPP_FUNCTION(0x2, "ge0", "rxd3"), 314 MPP_FUNCTION(0x3, "ge1", "rxd3"), 315 MPP_FUNCTION(0x5, "i2c0", "sck"), 316 MPP_FUNCTION(0x6, "dev", "ad10")), 317 MPP_MODE(54, 318 MPP_FUNCTION(0x0, "gpio", NULL), 319 MPP_FUNCTION(0x1, "pcie0", "rstout"), 320 MPP_FUNCTION(0x2, "ge0", "rxctl"), 321 MPP_FUNCTION(0x3, "ge1", "rxctl"), 322 MPP_FUNCTION(0x6, "dev", "ad11")), 323 MPP_MODE(55, 324 MPP_FUNCTION(0x0, "gpio", NULL), 325 MPP_FUNCTION(0x2, "ge0", "rxclk"), 326 MPP_FUNCTION(0x3, "ge1", "rxclk"), 327 MPP_FUNCTION(0x6, "dev", "cs0")), 328 MPP_MODE(56, 329 MPP_FUNCTION(0x0, "gpio", NULL), 330 MPP_FUNCTION(0x2, "ge0", "txclkout"), 331 MPP_FUNCTION(0x3, "ge1", "txclkout"), 332 MPP_FUNCTION(0x6, "dev", "oe")), 333 MPP_MODE(57, 334 MPP_FUNCTION(0x0, "gpio", NULL), 335 MPP_FUNCTION(0x2, "ge0", "txctl"), 336 MPP_FUNCTION(0x3, "ge1", "txctl"), 337 MPP_FUNCTION(0x6, "dev", "we0")), 338 MPP_MODE(58, 339 MPP_FUNCTION(0x0, "gpio", NULL), 340 MPP_FUNCTION(0x4, "led", "c0")), 341 MPP_MODE(59, 342 MPP_FUNCTION(0x0, "gpio", NULL), 343 MPP_FUNCTION(0x4, "led", "c1")), 344 MPP_MODE(60, 345 MPP_FUNCTION(0x0, "gpio", NULL), 346 MPP_FUNCTION(0x2, "uart1", "txd"), 347 MPP_FUNCTION(0x4, "led", "c2"), 348 MPP_FUNCTION(0x6, "dev", "ad13")), 349 MPP_MODE(61, 350 MPP_FUNCTION(0x0, "gpio", NULL), 351 MPP_FUNCTION(0x1, "i2c1", "sda"), 352 MPP_FUNCTION(0x2, "uart1", "rxd"), 353 MPP_FUNCTION(0x3, "spi1", "cs2"), 354 MPP_FUNCTION(0x4, "led", "p0"), 355 MPP_FUNCTION(0x6, "dev", "ad14")), 356 MPP_MODE(62, 357 MPP_FUNCTION(0x0, "gpio", NULL), 358 MPP_FUNCTION(0x1, "i2c1", "sck"), 359 MPP_FUNCTION(0x4, "led", "p1"), 360 MPP_FUNCTION(0x6, "dev", "ad15")), 361 MPP_MODE(63, 362 MPP_FUNCTION(0x0, "gpio", NULL), 363 MPP_FUNCTION(0x2, "ptp", "trig"), 364 MPP_FUNCTION(0x4, "led", "p2"), 365 MPP_FUNCTION(0x6, "dev", "burst/last")), 366 MPP_MODE(64, 367 MPP_FUNCTION(0x0, "gpio", NULL), 368 MPP_FUNCTION(0x2, "dram", "vttctrl"), 369 MPP_FUNCTION(0x4, "led", "p3")), 370 MPP_MODE(65, 371 MPP_FUNCTION(0x0, "gpio", NULL), 372 MPP_FUNCTION(0x1, "sata1", "prsnt")), 373 MPP_MODE(66, 374 MPP_FUNCTION(0x0, "gpio", NULL), 375 MPP_FUNCTION(0x2, "ptp", "evreq"), 376 MPP_FUNCTION(0x4, "spi1", "cs3"), 377 MPP_FUNCTION(0x5, "pcie0", "rstout"), 378 MPP_FUNCTION(0x6, "dev", "cs3")), 379}; 380 381static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info; 382 383static const struct of_device_id armada_375_pinctrl_of_match[] = { 384 { .compatible = "marvell,mv88f6720-pinctrl" }, 385 { }, 386}; 387 388static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = { 389 MPP_FUNC_CTRL(0, 69, NULL, mvebu_mmio_mpp_ctrl), 390}; 391 392static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = { 393 MPP_GPIO_RANGE(0, 0, 0, 32), 394 MPP_GPIO_RANGE(1, 32, 32, 32), 395 MPP_GPIO_RANGE(2, 64, 64, 3), 396}; 397 398static int armada_375_pinctrl_probe(struct platform_device *pdev) 399{ 400 struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info; 401 402 soc->variant = 0; /* no variants for Armada 375 */ 403 soc->controls = mv88f6720_mpp_controls; 404 soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls); 405 soc->modes = mv88f6720_mpp_modes; 406 soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes); 407 soc->gpioranges = mv88f6720_mpp_gpio_ranges; 408 soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges); 409 410 pdev->dev.platform_data = soc; 411 412 return mvebu_pinctrl_simple_mmio_probe(pdev); 413} 414 415static struct platform_driver armada_375_pinctrl_driver = { 416 .driver = { 417 .name = "armada-375-pinctrl", 418 .of_match_table = of_match_ptr(armada_375_pinctrl_of_match), 419 }, 420 .probe = armada_375_pinctrl_probe, 421}; 422builtin_platform_driver(armada_375_pinctrl_driver);