cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

pinctrl-nomadik-db8500.c (54195B)


      1// SPDX-License-Identifier: GPL-2.0
      2#include <linux/kernel.h>
      3#include <linux/pinctrl/pinctrl.h>
      4#include "pinctrl-nomadik.h"
      5
      6/* All the pins that can be used for GPIO and some other functions */
      7#define _GPIO(offset)		(offset)
      8
      9#define DB8500_PIN_AJ5		_GPIO(0)
     10#define DB8500_PIN_AJ3		_GPIO(1)
     11#define DB8500_PIN_AH4		_GPIO(2)
     12#define DB8500_PIN_AH3		_GPIO(3)
     13#define DB8500_PIN_AH6		_GPIO(4)
     14#define DB8500_PIN_AG6		_GPIO(5)
     15#define DB8500_PIN_AF6		_GPIO(6)
     16#define DB8500_PIN_AG5		_GPIO(7)
     17#define DB8500_PIN_AD5		_GPIO(8)
     18#define DB8500_PIN_AE4		_GPIO(9)
     19#define DB8500_PIN_AF5		_GPIO(10)
     20#define DB8500_PIN_AG4		_GPIO(11)
     21#define DB8500_PIN_AC4		_GPIO(12)
     22#define DB8500_PIN_AF3		_GPIO(13)
     23#define DB8500_PIN_AE3		_GPIO(14)
     24#define DB8500_PIN_AC3		_GPIO(15)
     25#define DB8500_PIN_AD3		_GPIO(16)
     26#define DB8500_PIN_AD4		_GPIO(17)
     27#define DB8500_PIN_AC2		_GPIO(18)
     28#define DB8500_PIN_AC1		_GPIO(19)
     29#define DB8500_PIN_AB4		_GPIO(20)
     30#define DB8500_PIN_AB3		_GPIO(21)
     31#define DB8500_PIN_AA3		_GPIO(22)
     32#define DB8500_PIN_AA4		_GPIO(23)
     33#define DB8500_PIN_AB2		_GPIO(24)
     34#define DB8500_PIN_Y4		_GPIO(25)
     35#define DB8500_PIN_Y2		_GPIO(26)
     36#define DB8500_PIN_AA2		_GPIO(27)
     37#define DB8500_PIN_AA1		_GPIO(28)
     38#define DB8500_PIN_W2		_GPIO(29)
     39#define DB8500_PIN_W3		_GPIO(30)
     40#define DB8500_PIN_V3		_GPIO(31)
     41#define DB8500_PIN_V2		_GPIO(32)
     42#define DB8500_PIN_AF2		_GPIO(33)
     43#define DB8500_PIN_AE1		_GPIO(34)
     44#define DB8500_PIN_AE2		_GPIO(35)
     45#define DB8500_PIN_AG2		_GPIO(36)
     46/* Hole */
     47#define DB8500_PIN_F3		_GPIO(64)
     48#define DB8500_PIN_F1		_GPIO(65)
     49#define DB8500_PIN_G3		_GPIO(66)
     50#define DB8500_PIN_G2		_GPIO(67)
     51#define DB8500_PIN_E1		_GPIO(68)
     52#define DB8500_PIN_E2		_GPIO(69)
     53#define DB8500_PIN_G5		_GPIO(70)
     54#define DB8500_PIN_G4		_GPIO(71)
     55#define DB8500_PIN_H4		_GPIO(72)
     56#define DB8500_PIN_H3		_GPIO(73)
     57#define DB8500_PIN_J3		_GPIO(74)
     58#define DB8500_PIN_H2		_GPIO(75)
     59#define DB8500_PIN_J2		_GPIO(76)
     60#define DB8500_PIN_H1		_GPIO(77)
     61#define DB8500_PIN_F4		_GPIO(78)
     62#define DB8500_PIN_E3		_GPIO(79)
     63#define DB8500_PIN_E4		_GPIO(80)
     64#define DB8500_PIN_D2		_GPIO(81)
     65#define DB8500_PIN_C1		_GPIO(82)
     66#define DB8500_PIN_D3		_GPIO(83)
     67#define DB8500_PIN_C2		_GPIO(84)
     68#define DB8500_PIN_D5		_GPIO(85)
     69#define DB8500_PIN_C6		_GPIO(86)
     70#define DB8500_PIN_B3		_GPIO(87)
     71#define DB8500_PIN_C4		_GPIO(88)
     72#define DB8500_PIN_E6		_GPIO(89)
     73#define DB8500_PIN_A3		_GPIO(90)
     74#define DB8500_PIN_B6		_GPIO(91)
     75#define DB8500_PIN_D6		_GPIO(92)
     76#define DB8500_PIN_B7		_GPIO(93)
     77#define DB8500_PIN_D7		_GPIO(94)
     78#define DB8500_PIN_E8		_GPIO(95)
     79#define DB8500_PIN_D8		_GPIO(96)
     80#define DB8500_PIN_D9		_GPIO(97)
     81/* Hole */
     82#define DB8500_PIN_A5		_GPIO(128)
     83#define DB8500_PIN_B4		_GPIO(129)
     84#define DB8500_PIN_C8		_GPIO(130)
     85#define DB8500_PIN_A12		_GPIO(131)
     86#define DB8500_PIN_C10		_GPIO(132)
     87#define DB8500_PIN_B10		_GPIO(133)
     88#define DB8500_PIN_B9		_GPIO(134)
     89#define DB8500_PIN_A9		_GPIO(135)
     90#define DB8500_PIN_C7		_GPIO(136)
     91#define DB8500_PIN_A7		_GPIO(137)
     92#define DB8500_PIN_C5		_GPIO(138)
     93#define DB8500_PIN_C9		_GPIO(139)
     94#define DB8500_PIN_B11		_GPIO(140)
     95#define DB8500_PIN_C12		_GPIO(141)
     96#define DB8500_PIN_C11		_GPIO(142)
     97#define DB8500_PIN_D12		_GPIO(143)
     98#define DB8500_PIN_B13		_GPIO(144)
     99#define DB8500_PIN_C13		_GPIO(145)
    100#define DB8500_PIN_D13		_GPIO(146)
    101#define DB8500_PIN_C15		_GPIO(147)
    102#define DB8500_PIN_B16		_GPIO(148)
    103#define DB8500_PIN_B14		_GPIO(149)
    104#define DB8500_PIN_C14		_GPIO(150)
    105#define DB8500_PIN_D17		_GPIO(151)
    106#define DB8500_PIN_D16		_GPIO(152)
    107#define DB8500_PIN_B17		_GPIO(153)
    108#define DB8500_PIN_C16		_GPIO(154)
    109#define DB8500_PIN_C19		_GPIO(155)
    110#define DB8500_PIN_C17		_GPIO(156)
    111#define DB8500_PIN_A18		_GPIO(157)
    112#define DB8500_PIN_C18		_GPIO(158)
    113#define DB8500_PIN_B19		_GPIO(159)
    114#define DB8500_PIN_B20		_GPIO(160)
    115#define DB8500_PIN_D21		_GPIO(161)
    116#define DB8500_PIN_D20		_GPIO(162)
    117#define DB8500_PIN_C20		_GPIO(163)
    118#define DB8500_PIN_B21		_GPIO(164)
    119#define DB8500_PIN_C21		_GPIO(165)
    120#define DB8500_PIN_A22		_GPIO(166)
    121#define DB8500_PIN_B24		_GPIO(167)
    122#define DB8500_PIN_C22		_GPIO(168)
    123#define DB8500_PIN_D22		_GPIO(169)
    124#define DB8500_PIN_C23		_GPIO(170)
    125#define DB8500_PIN_D23		_GPIO(171)
    126/* Hole */
    127#define DB8500_PIN_AJ27		_GPIO(192)
    128#define DB8500_PIN_AH27		_GPIO(193)
    129#define DB8500_PIN_AF27		_GPIO(194)
    130#define DB8500_PIN_AG28		_GPIO(195)
    131#define DB8500_PIN_AG26		_GPIO(196)
    132#define DB8500_PIN_AH24		_GPIO(197)
    133#define DB8500_PIN_AG25		_GPIO(198)
    134#define DB8500_PIN_AH23		_GPIO(199)
    135#define DB8500_PIN_AH26		_GPIO(200)
    136#define DB8500_PIN_AF24		_GPIO(201)
    137#define DB8500_PIN_AF25		_GPIO(202)
    138#define DB8500_PIN_AE23		_GPIO(203)
    139#define DB8500_PIN_AF23		_GPIO(204)
    140#define DB8500_PIN_AG23		_GPIO(205)
    141#define DB8500_PIN_AG24		_GPIO(206)
    142#define DB8500_PIN_AJ23		_GPIO(207)
    143#define DB8500_PIN_AH16		_GPIO(208)
    144#define DB8500_PIN_AG15		_GPIO(209)
    145#define DB8500_PIN_AJ15		_GPIO(210)
    146#define DB8500_PIN_AG14		_GPIO(211)
    147#define DB8500_PIN_AF13		_GPIO(212)
    148#define DB8500_PIN_AG13		_GPIO(213)
    149#define DB8500_PIN_AH15		_GPIO(214)
    150#define DB8500_PIN_AH13		_GPIO(215)
    151#define DB8500_PIN_AG12		_GPIO(216)
    152#define DB8500_PIN_AH12		_GPIO(217)
    153#define DB8500_PIN_AH11		_GPIO(218)
    154#define DB8500_PIN_AG10		_GPIO(219)
    155#define DB8500_PIN_AH10		_GPIO(220)
    156#define DB8500_PIN_AJ11		_GPIO(221)
    157#define DB8500_PIN_AJ9		_GPIO(222)
    158#define DB8500_PIN_AH9		_GPIO(223)
    159#define DB8500_PIN_AG9		_GPIO(224)
    160#define DB8500_PIN_AG8		_GPIO(225)
    161#define DB8500_PIN_AF8		_GPIO(226)
    162#define DB8500_PIN_AH7		_GPIO(227)
    163#define DB8500_PIN_AJ6		_GPIO(228)
    164#define DB8500_PIN_AG7		_GPIO(229)
    165#define DB8500_PIN_AF7		_GPIO(230)
    166/* Hole */
    167#define DB8500_PIN_AF28		_GPIO(256)
    168#define DB8500_PIN_AE29		_GPIO(257)
    169#define DB8500_PIN_AD29		_GPIO(258)
    170#define DB8500_PIN_AC29		_GPIO(259)
    171#define DB8500_PIN_AD28		_GPIO(260)
    172#define DB8500_PIN_AD26		_GPIO(261)
    173#define DB8500_PIN_AE26		_GPIO(262)
    174#define DB8500_PIN_AG29		_GPIO(263)
    175#define DB8500_PIN_AE27		_GPIO(264)
    176#define DB8500_PIN_AD27		_GPIO(265)
    177#define DB8500_PIN_AC28		_GPIO(266)
    178#define DB8500_PIN_AC27		_GPIO(267)
    179
    180/*
    181 * The names of the pins are denoted by GPIO number and ball name, even
    182 * though they can be used for other things than GPIO, this is the first
    183 * column in the table of the data sheet and often used on schematics and
    184 * such.
    185 */
    186static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
    187	PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
    188	PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
    189	PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
    190	PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
    191	PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
    192	PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
    193	PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
    194	PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
    195	PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
    196	PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
    197	PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
    198	PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
    199	PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
    200	PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
    201	PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
    202	PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
    203	PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
    204	PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
    205	PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
    206	PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
    207	PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
    208	PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
    209	PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
    210	PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
    211	PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
    212	PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
    213	PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
    214	PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
    215	PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
    216	PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
    217	PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
    218	PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
    219	PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
    220	PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
    221	PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
    222	PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
    223	PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
    224	/* Hole */
    225	PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
    226	PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
    227	PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
    228	PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
    229	PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
    230	PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
    231	PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
    232	PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
    233	PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
    234	PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
    235	PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
    236	PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
    237	PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
    238	PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
    239	PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
    240	PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
    241	PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
    242	PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
    243	PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
    244	PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
    245	PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
    246	PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
    247	PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
    248	PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
    249	PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
    250	PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
    251	PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
    252	PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
    253	PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
    254	PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
    255	PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
    256	PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
    257	PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
    258	PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
    259	/* Hole */
    260	PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
    261	PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
    262	PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
    263	PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
    264	PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
    265	PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
    266	PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
    267	PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
    268	PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
    269	PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
    270	PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
    271	PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
    272	PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
    273	PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
    274	PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
    275	PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
    276	PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
    277	PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
    278	PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
    279	PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
    280	PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
    281	PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
    282	PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
    283	PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
    284	PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
    285	PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
    286	PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
    287	PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
    288	PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
    289	PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
    290	PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
    291	PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
    292	PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
    293	PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
    294	PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
    295	PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
    296	PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
    297	PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
    298	PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
    299	PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
    300	PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
    301	PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
    302	PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
    303	PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
    304	/* Hole */
    305	PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
    306	PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
    307	PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
    308	PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
    309	PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
    310	PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
    311	PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
    312	PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
    313	PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
    314	PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
    315	PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
    316	PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
    317	PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
    318	PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
    319	PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
    320	PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
    321	PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
    322	PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
    323	PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
    324	PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
    325	PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
    326	PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
    327	PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
    328	PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
    329	PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
    330	PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
    331	PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
    332	PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
    333	PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
    334	PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
    335	PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
    336	PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
    337	PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
    338	PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
    339	PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
    340	PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
    341	PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
    342	PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
    343	PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
    344	/* Hole */
    345	PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
    346	PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
    347	PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
    348	PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
    349	PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
    350	PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
    351	PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
    352	PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
    353	PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
    354	PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
    355	PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
    356	PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
    357};
    358
    359/*
    360 * Read the pin group names like this:
    361 * u0_a_1    = first groups of pins for uart0 on alt function a
    362 * i2c2_b_2  = second group of pins for i2c2 on alt function b
    363 *
    364 * The groups are arranged as sets per altfunction column, so we can
    365 * mux in one group at a time by selecting the same altfunction for them
    366 * all. When functions require pins on different altfunctions, you need
    367 * to combine several groups.
    368 */
    369
    370/* Altfunction A column */
    371static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
    372					DB8500_PIN_AH4, DB8500_PIN_AH3 };
    373static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
    374static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
    375/* Image processor I2C line, this is driven by image processor firmware */
    376static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
    377static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
    378/* MSP0 can only be on these pins, but TXD and RXD can be flipped */
    379static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
    380static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
    381static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
    382/* Basic pins of the MMC/SD card 0 interface */
    383static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, /* MC0_CMDDIR */
    384					 DB8500_PIN_AC1, /* MC0_DAT0DIR */
    385					 DB8500_PIN_AB4, /* MC0_DAT2DIR */
    386					 DB8500_PIN_AA3, /* MC0_FBCLK */
    387					 DB8500_PIN_AA4, /* MC0_CLK */
    388					 DB8500_PIN_AB2, /* MC0_CMD */
    389					 DB8500_PIN_Y4,  /* MC0_DAT0 */
    390					 DB8500_PIN_Y2,  /* MC0_DAT1 */
    391					 DB8500_PIN_AA2, /* MC0_DAT2 */
    392					 DB8500_PIN_AA1  /* MC0_DAT3 */
    393};
    394/* MMC/SD card 0 interface without CMD/DAT0/DAT2 direction control */
    395static const unsigned mc0_a_2_pins[] = { DB8500_PIN_AA3, /* MC0_FBCLK */
    396					 DB8500_PIN_AA4, /* MC0_CLK */
    397					 DB8500_PIN_AB2, /* MC0_CMD */
    398					 DB8500_PIN_Y4,  /* MC0_DAT0 */
    399					 DB8500_PIN_Y2,  /* MC0_DAT1 */
    400					 DB8500_PIN_AA2, /* MC0_DAT2 */
    401					 DB8500_PIN_AA1  /* MC0_DAT3 */
    402};
    403/* Often only 4 bits are used, then these are not needed (only used for MMC) */
    404static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, /* MC0_DAT4 */
    405					       DB8500_PIN_W3, /* MC0_DAT5 */
    406					       DB8500_PIN_V3, /* MC0_DAT6 */
    407					       DB8500_PIN_V2  /* MC0_DAT7 */
    408};
    409static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 }; /* MC0_DAT31DIR */
    410/* MSP1 can only be on these pins, but TXD and RXD can be flipped */
    411static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
    412static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
    413/* LCD interface */
    414static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
    415					  DB8500_PIN_G3, DB8500_PIN_G2 };
    416static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
    417static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
    418static const unsigned lcd_d0_d7_a_1_pins[] = {
    419	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
    420	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
    421/* D8 thru D11 often used as TVOUT lines */
    422static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
    423	DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
    424static const unsigned lcd_d12_d15_a_1_pins[] = {
    425	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
    426static const unsigned lcd_d12_d23_a_1_pins[] = {
    427	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
    428	DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
    429	DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
    430static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
    431	DB8500_PIN_D8, DB8500_PIN_D9 };
    432static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
    433static const unsigned kp_a_2_pins[] = {
    434	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
    435	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
    436	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
    437	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
    438/* MC2 has 8 data lines and no direction control, so only for (e)MMC */
    439static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
    440	DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
    441	DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
    442	DB8500_PIN_C5 };
    443/* MC2 without the feedback clock */
    444static const unsigned mc2_a_2_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
    445	DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
    446	DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5 };
    447static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
    448					  DB8500_PIN_C12, DB8500_PIN_C11 };
    449static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
    450					  DB8500_PIN_C13, DB8500_PIN_D13 };
    451static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
    452/*
    453 * Image processor GPIO pins are named "ipgpio" and have their own
    454 * numberspace
    455 */
    456static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
    457static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
    458/* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
    459static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
    460					   DB8500_PIN_D23 };
    461/*
    462 * This MSP cannot switch RX and TX, SCK in a separate group since this
    463 * seems to be optional.
    464 */
    465static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
    466static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
    467					  DB8500_PIN_AG28, DB8500_PIN_AG26 };
    468static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
    469	DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
    470	DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
    471	DB8500_PIN_AJ23 };
    472/* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
    473static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
    474	DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
    475	DB8500_PIN_AH15 };
    476static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
    477	DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 };
    478static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
    479	DB8500_PIN_AH12, DB8500_PIN_AH11 };
    480static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
    481	DB8500_PIN_AJ11 };
    482static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
    483	DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
    484static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
    485	DB8500_PIN_AG9, DB8500_PIN_AG8 };
    486static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };
    487static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };
    488static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };
    489static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };
    490static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
    491	DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
    492	DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
    493	DB8500_PIN_AC28, DB8500_PIN_AC27 };
    494
    495/* Altfunction B column */
    496static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
    497static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
    498static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
    499static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
    500static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
    501static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
    502static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
    503/* Just RX and TX for UART2 */
    504static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
    505static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
    506static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
    507static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
    508static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
    509	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
    510static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
    511static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
    512					  DB8500_PIN_V3, DB8500_PIN_V2 };
    513static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
    514static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
    515	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
    516	DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
    517	DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
    518	DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
    519	DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
    520static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
    521	DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
    522static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
    523	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
    524	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
    525	DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
    526	DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
    527	DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
    528	DB8500_PIN_C9 };
    529/* This chip select pin can be "ps0" in alt C so have it separately */
    530static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
    531/* This chip select pin can be "ps1" in alt C so have it separately */
    532static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
    533static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
    534static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
    535static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
    536static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
    537static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
    538	DB8500_PIN_C23, DB8500_PIN_D23 };
    539static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
    540	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
    541	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
    542	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
    543	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
    544static const unsigned lcd_d16_d23_b_1_pins[] = {
    545	DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
    546	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
    547static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
    548static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
    549static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
    550					  DB8500_PIN_AG13, DB8500_PIN_AH15 };
    551static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
    552	DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
    553	DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
    554	DB8500_PIN_AG8 };
    555static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
    556static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
    557static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
    558
    559/* Altfunction C column */
    560static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
    561	DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
    562static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
    563static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
    564static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
    565static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
    566static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
    567static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
    568/* Optional 4-bit Memory Stick interface */
    569static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
    570	DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
    571	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
    572static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
    573static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
    574static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
    575static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
    576					DB8500_PIN_AE2, DB8500_PIN_AG2 };
    577static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
    578static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
    579static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
    580static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
    581static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
    582static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
    583	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
    584static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
    585static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
    586static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
    587static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
    588static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
    589static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
    590	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
    591	DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
    592	DB8500_PIN_D9 };
    593static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
    594static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
    595	DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
    596	DB8500_PIN_C23, DB8500_PIN_D23 };
    597static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
    598static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
    599static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
    600static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
    601	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
    602static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
    603static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
    604static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
    605	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
    606static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
    607static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
    608static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };
    609static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };
    610static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
    611static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
    612					  DB8500_PIN_AG9, DB8500_PIN_AG8 };
    613static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
    614static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
    615
    616/* Other C1 column */
    617static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };
    618static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
    619	DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
    620static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };
    621static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };
    622static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
    623	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
    624	DB8500_PIN_J2, DB8500_PIN_H1 };
    625static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
    626	DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
    627	DB8500_PIN_D6, DB8500_PIN_B7 };
    628static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };
    629static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };
    630static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };
    631static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };
    632static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
    633	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
    634static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,
    635	DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22,
    636	DB8500_PIN_B24, DB8500_PIN_C22 };
    637static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };
    638static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
    639	DB8500_PIN_AH12, DB8500_PIN_AH11 };
    640static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
    641	DB8500_PIN_AH11 };
    642
    643/* Other C2 column */
    644static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,
    645	DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
    646static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
    647	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
    648	DB8500_PIN_J2, DB8500_PIN_H1 };
    649static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
    650	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
    651	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
    652	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
    653	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
    654
    655/* Other C3 column */
    656static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,
    657	DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 };
    658static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
    659	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
    660static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };
    661static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };
    662static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
    663	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
    664	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
    665	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
    666	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
    667
    668/* Other C4 column */
    669static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
    670	DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 };
    671static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
    672	DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
    673	DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
    674	DB8500_PIN_D21, DB8500_PIN_D20,	DB8500_PIN_C20, DB8500_PIN_B21,
    675	DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
    676
    677#define DB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins,		\
    678			.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
    679
    680static const struct nmk_pingroup nmk_db8500_groups[] = {
    681	/* Altfunction A column */
    682	DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
    683	DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
    684	DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
    685	DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
    686	DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
    687	DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
    688	DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
    689	DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
    690	DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
    691	DB8500_PIN_GROUP(mc0_a_2, NMK_GPIO_ALT_A),
    692	DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
    693	DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
    694	DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
    695	DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
    696	DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
    697	DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
    698	DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
    699	DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
    700	DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
    701	DB8500_PIN_GROUP(lcd_d12_d15_a_1, NMK_GPIO_ALT_A),
    702	DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
    703	DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
    704	DB8500_PIN_GROUP(kpskaskb_a_1, NMK_GPIO_ALT_A),
    705	DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
    706	DB8500_PIN_GROUP(mc2_a_2, NMK_GPIO_ALT_A),
    707	DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
    708	DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
    709	DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
    710	DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
    711	DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
    712	DB8500_PIN_GROUP(modem_a_1, NMK_GPIO_ALT_A),
    713	DB8500_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A),
    714	DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
    715	DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
    716	DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
    717	DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
    718	DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
    719	DB8500_PIN_GROUP(mc1dir_a_1, NMK_GPIO_ALT_A),
    720	DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
    721	DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
    722	DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
    723	DB8500_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A),
    724	DB8500_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A),
    725	DB8500_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A),
    726	DB8500_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A),
    727	DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
    728	/* Altfunction B column */
    729	DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
    730	DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
    731	DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
    732	DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
    733	DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
    734	DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
    735	DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
    736	DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
    737	DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
    738	DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
    739	DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
    740	DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
    741	DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
    742	DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
    743	DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
    744	DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
    745	DB8500_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
    746	DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
    747	DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
    748	DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
    749	DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
    750	DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
    751	DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
    752	DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
    753	DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
    754	DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
    755	DB8500_PIN_GROUP(lcd_d16_d23_b_1, NMK_GPIO_ALT_B),
    756	DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
    757	DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
    758	DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
    759	DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
    760	DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
    761	DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
    762	DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
    763	/* Altfunction C column */
    764	DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
    765	DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
    766	DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
    767	DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
    768	DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
    769	DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
    770	DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
    771	DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
    772	DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
    773	DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
    774	DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
    775	DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
    776	DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
    777	DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
    778	DB8500_PIN_GROUP(ipgpio6_c_2, NMK_GPIO_ALT_C),
    779	DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
    780	DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
    781	DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
    782	DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
    783	DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
    784	DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
    785	DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
    786	DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
    787	DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
    788	DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
    789	DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
    790	DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
    791	DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
    792	DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
    793	DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
    794	DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
    795	DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
    796	DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
    797	DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
    798	DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
    799	DB8500_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C),
    800	DB8500_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C),
    801	DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
    802	DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
    803	DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
    804	DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
    805	/* Other alt C1 column */
    806	DB8500_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1),
    807	DB8500_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1),
    808	DB8500_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1),
    809	DB8500_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1),
    810	DB8500_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1),
    811	DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
    812	DB8500_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1),
    813	DB8500_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1),
    814	DB8500_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1),
    815	DB8500_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1),
    816	DB8500_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1),
    817	DB8500_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1),
    818	DB8500_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1),
    819	DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
    820	DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
    821	/* Other alt C2 column */
    822	DB8500_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2),
    823	DB8500_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2),
    824	DB8500_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2),
    825	/* Other alt C3 column */
    826	DB8500_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3),
    827	DB8500_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3),
    828	DB8500_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3),
    829	DB8500_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3),
    830	DB8500_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3),
    831	/* Other alt C4 column */
    832	DB8500_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4),
    833	DB8500_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4),
    834};
    835
    836/* We use this macro to define the groups applicable to a function */
    837#define DB8500_FUNC_GROUPS(a, b...)	   \
    838static const char * const a##_groups[] = { b };
    839
    840DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
    841DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
    842/*
    843 * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
    844 * only available on two pins in alternative function C
    845 */
    846DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
    847		   "u2rxtx_c_2", "u2rxtx_c_3", "u2rx_oc1_1");
    848DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
    849/*
    850 * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
    851 * switched around by selecting the altfunction A or B. The SCK pin is
    852 * only available on the altfunction B.
    853 */
    854DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
    855		   "msp0txrx_b_1", "msp0sck_b_1");
    856DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_a_2", "mc0_dat47_a_1", "mc0dat31dir_a_1");
    857/* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
    858DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
    859DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
    860DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
    861		   "lcd_d8_d11_a_1", "lcd_d12_d15_a_1", "lcd_d12_d23_a_1", "lcd_b_1",
    862		   "lcd_d16_d23_b_1");
    863DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_a_2", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
    864DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2_a_2", "mc2rstn_c_1");
    865DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
    866DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
    867DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
    868/* The image processor has 8 GPIO pins that can be muxed out */
    869DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
    870	"ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
    871	"ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
    872	"ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
    873	"ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
    874/* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
    875DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
    876DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
    877DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
    878DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
    879DB8500_FUNC_GROUPS(clkout, "clkout1_a_1", "clkout1_a_2", "clkout1_c_1",
    880		"clkout2_a_1", "clkout2_a_2", "clkout2_c_1");
    881DB8500_FUNC_GROUPS(usb, "usb_a_1");
    882DB8500_FUNC_GROUPS(trig, "trig_b_1");
    883DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
    884DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
    885DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
    886/*
    887 * The modem UART can output its RX and TX pins in some different places,
    888 * so select one of each.
    889 */
    890DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
    891		"uartmodrx_c_1", "uartmod_tx_c_1", "uartmodrx_oc1_1",
    892		"uartmodtx_oc1_1", "uartmodrx_oc3_1", "uartmodtx_oc3_1");
    893DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1", "stmmod_oc1_1",
    894		"stmmod_oc3_1", "stmmod_oc3_2");
    895DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
    896/* Select between CS0 on alt B or PS1 on alt C */
    897DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
    898		   "smps0_c_1", "smps1_c_1");
    899DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
    900DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
    901DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
    902DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
    903DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
    904DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
    905DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
    906DB8500_FUNC_GROUPS(ms, "ms_c_1");
    907DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
    908DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2", "stmape_oc1_1");
    909DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
    910DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
    911DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
    912DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
    913DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
    914DB8500_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
    915DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
    916DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1", "ptma9_oc2_1");
    917DB8500_FUNC_GROUPS(rf, "rf_oc1_1", "rf_oc1_2");
    918DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1", "hxgpio_oc1_1");
    919DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1", "etmr4_oc3_1");
    920DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
    921#define FUNCTION(fname)					\
    922	{						\
    923		.name = #fname,				\
    924		.groups = fname##_groups,		\
    925		.ngroups = ARRAY_SIZE(fname##_groups),	\
    926	}
    927
    928static const struct nmk_function nmk_db8500_functions[] = {
    929	FUNCTION(u0),
    930	FUNCTION(u1),
    931	FUNCTION(u2),
    932	FUNCTION(ipi2c),
    933	FUNCTION(msp0),
    934	FUNCTION(mc0),
    935	FUNCTION(msp1),
    936	FUNCTION(lcdb),
    937	FUNCTION(lcd),
    938	FUNCTION(kp),
    939	FUNCTION(mc2),
    940	FUNCTION(ssp1),
    941	FUNCTION(ssp0),
    942	FUNCTION(i2c0),
    943	FUNCTION(ipgpio),
    944	FUNCTION(msp2),
    945	FUNCTION(mc4),
    946	FUNCTION(mc1),
    947	FUNCTION(hsi),
    948	FUNCTION(clkout),
    949	FUNCTION(usb),
    950	FUNCTION(trig),
    951	FUNCTION(i2c4),
    952	FUNCTION(i2c1),
    953	FUNCTION(i2c2),
    954	FUNCTION(uartmod),
    955	FUNCTION(stmmod),
    956	FUNCTION(spi3),
    957	FUNCTION(sm),
    958	FUNCTION(lcda),
    959	FUNCTION(ddrtrig),
    960	FUNCTION(pwl),
    961	FUNCTION(spi1),
    962	FUNCTION(mc3),
    963	FUNCTION(ipjtag),
    964	FUNCTION(slim0),
    965	FUNCTION(ms),
    966	FUNCTION(iptrigout),
    967	FUNCTION(stmape),
    968	FUNCTION(mc5),
    969	FUNCTION(usbsim),
    970	FUNCTION(i2c3),
    971	FUNCTION(spi0),
    972	FUNCTION(spi2),
    973	FUNCTION(remap),
    974	FUNCTION(sbag),
    975	FUNCTION(ptm),
    976	FUNCTION(rf),
    977	FUNCTION(hx),
    978	FUNCTION(etm),
    979	FUNCTION(hwobs),
    980};
    981
    982static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
    983	PRCM_GPIOCR_ALTCX(23,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_CLK_a */
    984				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_CLK_a */
    985				false, 0, 0,
    986				false, 0, 0
    987	),
    988	PRCM_GPIOCR_ALTCX(24,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE or U2_RXD ??? */
    989				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_VAL_a */
    990				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
    991				false, 0, 0
    992	),
    993	PRCM_GPIOCR_ALTCX(25,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[0] */
    994				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[0] */
    995				false, 0, 0,
    996				false, 0, 0
    997	),
    998	PRCM_GPIOCR_ALTCX(26,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[1] */
    999				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[1] */
   1000				false, 0, 0,
   1001				false, 0, 0
   1002	),
   1003	PRCM_GPIOCR_ALTCX(27,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[2] */
   1004				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[2] */
   1005				false, 0, 0,
   1006				false, 0, 0
   1007	),
   1008	PRCM_GPIOCR_ALTCX(28,	true, PRCM_IDX_GPIOCR1, 9,	/* STMAPE_DAT_a[3] */
   1009				true, PRCM_IDX_GPIOCR1, 7,	/* SBAG_D_a[3] */
   1010				false, 0, 0,
   1011				false, 0, 0
   1012	),
   1013	PRCM_GPIOCR_ALTCX(29,	false, 0, 0,
   1014				false, 0, 0,
   1015				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
   1016				false, 0, 0
   1017	),
   1018	PRCM_GPIOCR_ALTCX(30,	false, 0, 0,
   1019				false, 0, 0,
   1020				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
   1021				false, 0, 0
   1022	),
   1023	PRCM_GPIOCR_ALTCX(31,	false, 0, 0,
   1024				false, 0, 0,
   1025				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
   1026				false, 0, 0
   1027	),
   1028	PRCM_GPIOCR_ALTCX(32,	false, 0, 0,
   1029				false, 0, 0,
   1030				true, PRCM_IDX_GPIOCR1, 10,	/* STM_MOD_CMD0 */
   1031				false, 0, 0
   1032	),
   1033	PRCM_GPIOCR_ALTCX(68,	true, PRCM_IDX_GPIOCR1, 18,	/* REMAP_SELECT_ON */
   1034				false, 0, 0,
   1035				false, 0, 0,
   1036				false, 0, 0
   1037	),
   1038	PRCM_GPIOCR_ALTCX(69,	true, PRCM_IDX_GPIOCR1, 18,	/* REMAP_SELECT_ON */
   1039				false, 0, 0,
   1040				false, 0, 0,
   1041				false, 0, 0
   1042	),
   1043	PRCM_GPIOCR_ALTCX(70,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D23 */
   1044				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1045				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
   1046				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_CLK */
   1047	),
   1048	PRCM_GPIOCR_ALTCX(71,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D22 */
   1049				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1050				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
   1051				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D3 */
   1052	),
   1053	PRCM_GPIOCR_ALTCX(72,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D21 */
   1054				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1055				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
   1056				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D2 */
   1057	),
   1058	PRCM_GPIOCR_ALTCX(73,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D20 */
   1059				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1060				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
   1061				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D1 */
   1062	),
   1063	PRCM_GPIOCR_ALTCX(74,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D19 */
   1064				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1065				true, PRCM_IDX_GPIOCR1, 11,	/* STM_MOD_CMD1 */
   1066				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_D0 */
   1067	),
   1068	PRCM_GPIOCR_ALTCX(75,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D18 */
   1069				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1070				true, PRCM_IDX_GPIOCR1, 0,	/* DBG_UARTMOD_CMD0 */
   1071				false, 0, 0
   1072	),
   1073	PRCM_GPIOCR_ALTCX(76,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D17 */
   1074				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1075				true, PRCM_IDX_GPIOCR1, 0,	/* DBG_UARTMOD_CMD0 */
   1076				false, 0, 0
   1077	),
   1078	PRCM_GPIOCR_ALTCX(77,	true, PRCM_IDX_GPIOCR1, 5,	/* PTM_A9_D16 */
   1079				true, PRCM_IDX_GPIOCR2, 2,	/* DBG_ETM_R4_CMD0 */
   1080				false, 0, 0,
   1081				true, PRCM_IDX_GPIOCR1, 8	/* SBAG_VAL */
   1082	),
   1083	PRCM_GPIOCR_ALTCX(86,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O3 */
   1084				false, 0, 0,
   1085				false, 0, 0,
   1086				false, 0, 0
   1087	),
   1088	PRCM_GPIOCR_ALTCX(87,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O2 */
   1089				false, 0, 0,
   1090				false, 0, 0,
   1091				false, 0, 0
   1092	),
   1093	PRCM_GPIOCR_ALTCX(88,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I3 */
   1094				false, 0, 0,
   1095				false, 0, 0,
   1096				false, 0, 0
   1097	),
   1098	PRCM_GPIOCR_ALTCX(89,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I2 */
   1099				false, 0, 0,
   1100				false, 0, 0,
   1101				false, 0, 0
   1102	),
   1103	PRCM_GPIOCR_ALTCX(90,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O1 */
   1104				false, 0, 0,
   1105				false, 0, 0,
   1106				false, 0, 0
   1107	),
   1108	PRCM_GPIOCR_ALTCX(91,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_O0 */
   1109				false, 0, 0,
   1110				false, 0, 0,
   1111				false, 0, 0
   1112	),
   1113	PRCM_GPIOCR_ALTCX(92,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I1 */
   1114				false, 0, 0,
   1115				false, 0, 0,
   1116				false, 0, 0
   1117	),
   1118	PRCM_GPIOCR_ALTCX(93,	true, PRCM_IDX_GPIOCR1, 12,	/* KP_I0 */
   1119				false, 0, 0,
   1120				false, 0, 0,
   1121				false, 0, 0
   1122	),
   1123	PRCM_GPIOCR_ALTCX(96,	true, PRCM_IDX_GPIOCR2, 3,	/* RF_INT */
   1124				false, 0, 0,
   1125				false, 0, 0,
   1126				false, 0, 0
   1127	),
   1128	PRCM_GPIOCR_ALTCX(97,	true, PRCM_IDX_GPIOCR2, 1,	/* RF_CTRL */
   1129				false, 0, 0,
   1130				false, 0, 0,
   1131				false, 0, 0
   1132	),
   1133	PRCM_GPIOCR_ALTCX(151,	false, 0, 0,
   1134				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_CTL */
   1135				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1136				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS17 */
   1137	),
   1138	PRCM_GPIOCR_ALTCX(152,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_CLK */
   1139				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_CLK */
   1140				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1141				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS16 */
   1142	),
   1143	PRCM_GPIOCR_ALTCX(153,	true, PRCM_IDX_GPIOCR1, 1,	/* UARTMOD_CMD1 */
   1144				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D15 */
   1145				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1146				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS15 */
   1147	),
   1148	PRCM_GPIOCR_ALTCX(154,	true, PRCM_IDX_GPIOCR1, 1,	/* UARTMOD_CMD1 */
   1149				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D14 */
   1150				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1151				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS14 */
   1152	),
   1153	PRCM_GPIOCR_ALTCX(155,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
   1154				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D13 */
   1155				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1156				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS13 */
   1157	),
   1158	PRCM_GPIOCR_ALTCX(156,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
   1159				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D12 */
   1160				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1161				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS12 */
   1162	),
   1163	PRCM_GPIOCR_ALTCX(157,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
   1164				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D11 */
   1165				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1166				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS11 */
   1167	),
   1168	PRCM_GPIOCR_ALTCX(158,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
   1169				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D10 */
   1170				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1171				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS10 */
   1172	),
   1173	PRCM_GPIOCR_ALTCX(159,	true, PRCM_IDX_GPIOCR1, 13,	/* STM_MOD_CMD2 */
   1174				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D9 */
   1175				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1176				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS9 */
   1177	),
   1178	PRCM_GPIOCR_ALTCX(160,	false, 0, 0,
   1179				true, PRCM_IDX_GPIOCR1, 14,	/* PTM_A9_D8 */
   1180				true, PRCM_IDX_GPIOCR1, 19,	/* DBG_ETM_R4_CMD2 */
   1181				true, PRCM_IDX_GPIOCR1, 25	/* HW_OBS8 */
   1182	),
   1183	PRCM_GPIOCR_ALTCX(161,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO7 */
   1184				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D7 */
   1185				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1186				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS7 */
   1187	),
   1188	PRCM_GPIOCR_ALTCX(162,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO6 */
   1189				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D6 */
   1190				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1191				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS6 */
   1192	),
   1193	PRCM_GPIOCR_ALTCX(163,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO5 */
   1194				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D5 */
   1195				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1196				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS5 */
   1197	),
   1198	PRCM_GPIOCR_ALTCX(164,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO4 */
   1199				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D4 */
   1200				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1201				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS4 */
   1202	),
   1203	PRCM_GPIOCR_ALTCX(165,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO3 */
   1204				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D3 */
   1205				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1206				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS3 */
   1207	),
   1208	PRCM_GPIOCR_ALTCX(166,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO2 */
   1209				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D2 */
   1210				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1211				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS2 */
   1212	),
   1213	PRCM_GPIOCR_ALTCX(167,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO1 */
   1214				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D1 */
   1215				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1216				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS1 */
   1217	),
   1218	PRCM_GPIOCR_ALTCX(168,	true, PRCM_IDX_GPIOCR1, 4,	/* Hx_GPIO0 */
   1219				true, PRCM_IDX_GPIOCR1, 6,	/* PTM_A9_D0 */
   1220				true, PRCM_IDX_GPIOCR1, 15,	/* DBG_ETM_R4_CMD1*/
   1221				true, PRCM_IDX_GPIOCR1, 24	/* HW_OBS0 */
   1222	),
   1223	PRCM_GPIOCR_ALTCX(170,	true, PRCM_IDX_GPIOCR2, 2,	/* RF_INT */
   1224				false, 0, 0,
   1225				false, 0, 0,
   1226				false, 0, 0
   1227	),
   1228	PRCM_GPIOCR_ALTCX(171,	true, PRCM_IDX_GPIOCR2, 0,	/* RF_CTRL */
   1229				false, 0, 0,
   1230				false, 0, 0,
   1231				false, 0, 0
   1232	),
   1233	PRCM_GPIOCR_ALTCX(215,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_TXD */
   1234				false, 0, 0,
   1235				false, 0, 0,
   1236				false, 0, 0
   1237	),
   1238	PRCM_GPIOCR_ALTCX(216,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_FRM */
   1239				false, 0, 0,
   1240				false, 0, 0,
   1241				false, 0, 0
   1242	),
   1243	PRCM_GPIOCR_ALTCX(217,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_CLK */
   1244				false, 0, 0,
   1245				false, 0, 0,
   1246				false, 0, 0
   1247	),
   1248	PRCM_GPIOCR_ALTCX(218,	true, PRCM_IDX_GPIOCR1, 23,	/* SPI2_RXD */
   1249				false, 0, 0,
   1250				false, 0, 0,
   1251				false, 0, 0
   1252	),
   1253};
   1254
   1255static const u16 db8500_prcm_gpiocr_regs[] = {
   1256	[PRCM_IDX_GPIOCR1] = 0x138,
   1257	[PRCM_IDX_GPIOCR2] = 0x574,
   1258};
   1259
   1260static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
   1261	.pins = nmk_db8500_pins,
   1262	.npins = ARRAY_SIZE(nmk_db8500_pins),
   1263	.functions = nmk_db8500_functions,
   1264	.nfunctions = ARRAY_SIZE(nmk_db8500_functions),
   1265	.groups = nmk_db8500_groups,
   1266	.ngroups = ARRAY_SIZE(nmk_db8500_groups),
   1267	.altcx_pins = db8500_altcx_pins,
   1268	.npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
   1269	.prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
   1270};
   1271
   1272void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
   1273{
   1274	*soc = &nmk_db8500_soc;
   1275}