cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

pinctrl-apq8084.c (37066B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
      4 */
      5
      6#include <linux/module.h>
      7#include <linux/of.h>
      8#include <linux/platform_device.h>
      9#include <linux/pinctrl/pinctrl.h>
     10
     11#include "pinctrl-msm.h"
     12
     13static const struct pinctrl_pin_desc apq8084_pins[] = {
     14	PINCTRL_PIN(0, "GPIO_0"),
     15	PINCTRL_PIN(1, "GPIO_1"),
     16	PINCTRL_PIN(2, "GPIO_2"),
     17	PINCTRL_PIN(3, "GPIO_3"),
     18	PINCTRL_PIN(4, "GPIO_4"),
     19	PINCTRL_PIN(5, "GPIO_5"),
     20	PINCTRL_PIN(6, "GPIO_6"),
     21	PINCTRL_PIN(7, "GPIO_7"),
     22	PINCTRL_PIN(8, "GPIO_8"),
     23	PINCTRL_PIN(9, "GPIO_9"),
     24	PINCTRL_PIN(10, "GPIO_10"),
     25	PINCTRL_PIN(11, "GPIO_11"),
     26	PINCTRL_PIN(12, "GPIO_12"),
     27	PINCTRL_PIN(13, "GPIO_13"),
     28	PINCTRL_PIN(14, "GPIO_14"),
     29	PINCTRL_PIN(15, "GPIO_15"),
     30	PINCTRL_PIN(16, "GPIO_16"),
     31	PINCTRL_PIN(17, "GPIO_17"),
     32	PINCTRL_PIN(18, "GPIO_18"),
     33	PINCTRL_PIN(19, "GPIO_19"),
     34	PINCTRL_PIN(20, "GPIO_20"),
     35	PINCTRL_PIN(21, "GPIO_21"),
     36	PINCTRL_PIN(22, "GPIO_22"),
     37	PINCTRL_PIN(23, "GPIO_23"),
     38	PINCTRL_PIN(24, "GPIO_24"),
     39	PINCTRL_PIN(25, "GPIO_25"),
     40	PINCTRL_PIN(26, "GPIO_26"),
     41	PINCTRL_PIN(27, "GPIO_27"),
     42	PINCTRL_PIN(28, "GPIO_28"),
     43	PINCTRL_PIN(29, "GPIO_29"),
     44	PINCTRL_PIN(30, "GPIO_30"),
     45	PINCTRL_PIN(31, "GPIO_31"),
     46	PINCTRL_PIN(32, "GPIO_32"),
     47	PINCTRL_PIN(33, "GPIO_33"),
     48	PINCTRL_PIN(34, "GPIO_34"),
     49	PINCTRL_PIN(35, "GPIO_35"),
     50	PINCTRL_PIN(36, "GPIO_36"),
     51	PINCTRL_PIN(37, "GPIO_37"),
     52	PINCTRL_PIN(38, "GPIO_38"),
     53	PINCTRL_PIN(39, "GPIO_39"),
     54	PINCTRL_PIN(40, "GPIO_40"),
     55	PINCTRL_PIN(41, "GPIO_41"),
     56	PINCTRL_PIN(42, "GPIO_42"),
     57	PINCTRL_PIN(43, "GPIO_43"),
     58	PINCTRL_PIN(44, "GPIO_44"),
     59	PINCTRL_PIN(45, "GPIO_45"),
     60	PINCTRL_PIN(46, "GPIO_46"),
     61	PINCTRL_PIN(47, "GPIO_47"),
     62	PINCTRL_PIN(48, "GPIO_48"),
     63	PINCTRL_PIN(49, "GPIO_49"),
     64	PINCTRL_PIN(50, "GPIO_50"),
     65	PINCTRL_PIN(51, "GPIO_51"),
     66	PINCTRL_PIN(52, "GPIO_52"),
     67	PINCTRL_PIN(53, "GPIO_53"),
     68	PINCTRL_PIN(54, "GPIO_54"),
     69	PINCTRL_PIN(55, "GPIO_55"),
     70	PINCTRL_PIN(56, "GPIO_56"),
     71	PINCTRL_PIN(57, "GPIO_57"),
     72	PINCTRL_PIN(58, "GPIO_58"),
     73	PINCTRL_PIN(59, "GPIO_59"),
     74	PINCTRL_PIN(60, "GPIO_60"),
     75	PINCTRL_PIN(61, "GPIO_61"),
     76	PINCTRL_PIN(62, "GPIO_62"),
     77	PINCTRL_PIN(63, "GPIO_63"),
     78	PINCTRL_PIN(64, "GPIO_64"),
     79	PINCTRL_PIN(65, "GPIO_65"),
     80	PINCTRL_PIN(66, "GPIO_66"),
     81	PINCTRL_PIN(67, "GPIO_67"),
     82	PINCTRL_PIN(68, "GPIO_68"),
     83	PINCTRL_PIN(69, "GPIO_69"),
     84	PINCTRL_PIN(70, "GPIO_70"),
     85	PINCTRL_PIN(71, "GPIO_71"),
     86	PINCTRL_PIN(72, "GPIO_72"),
     87	PINCTRL_PIN(73, "GPIO_73"),
     88	PINCTRL_PIN(74, "GPIO_74"),
     89	PINCTRL_PIN(75, "GPIO_75"),
     90	PINCTRL_PIN(76, "GPIO_76"),
     91	PINCTRL_PIN(77, "GPIO_77"),
     92	PINCTRL_PIN(78, "GPIO_78"),
     93	PINCTRL_PIN(79, "GPIO_79"),
     94	PINCTRL_PIN(80, "GPIO_80"),
     95	PINCTRL_PIN(81, "GPIO_81"),
     96	PINCTRL_PIN(82, "GPIO_82"),
     97	PINCTRL_PIN(83, "GPIO_83"),
     98	PINCTRL_PIN(84, "GPIO_84"),
     99	PINCTRL_PIN(85, "GPIO_85"),
    100	PINCTRL_PIN(86, "GPIO_86"),
    101	PINCTRL_PIN(87, "GPIO_87"),
    102	PINCTRL_PIN(88, "GPIO_88"),
    103	PINCTRL_PIN(89, "GPIO_89"),
    104	PINCTRL_PIN(90, "GPIO_90"),
    105	PINCTRL_PIN(91, "GPIO_91"),
    106	PINCTRL_PIN(92, "GPIO_92"),
    107	PINCTRL_PIN(93, "GPIO_93"),
    108	PINCTRL_PIN(94, "GPIO_94"),
    109	PINCTRL_PIN(95, "GPIO_95"),
    110	PINCTRL_PIN(96, "GPIO_96"),
    111	PINCTRL_PIN(97, "GPIO_97"),
    112	PINCTRL_PIN(98, "GPIO_98"),
    113	PINCTRL_PIN(99, "GPIO_99"),
    114	PINCTRL_PIN(100, "GPIO_100"),
    115	PINCTRL_PIN(101, "GPIO_101"),
    116	PINCTRL_PIN(102, "GPIO_102"),
    117	PINCTRL_PIN(103, "GPIO_103"),
    118	PINCTRL_PIN(104, "GPIO_104"),
    119	PINCTRL_PIN(105, "GPIO_105"),
    120	PINCTRL_PIN(106, "GPIO_106"),
    121	PINCTRL_PIN(107, "GPIO_107"),
    122	PINCTRL_PIN(108, "GPIO_108"),
    123	PINCTRL_PIN(109, "GPIO_109"),
    124	PINCTRL_PIN(110, "GPIO_110"),
    125	PINCTRL_PIN(111, "GPIO_111"),
    126	PINCTRL_PIN(112, "GPIO_112"),
    127	PINCTRL_PIN(113, "GPIO_113"),
    128	PINCTRL_PIN(114, "GPIO_114"),
    129	PINCTRL_PIN(115, "GPIO_115"),
    130	PINCTRL_PIN(116, "GPIO_116"),
    131	PINCTRL_PIN(117, "GPIO_117"),
    132	PINCTRL_PIN(118, "GPIO_118"),
    133	PINCTRL_PIN(119, "GPIO_119"),
    134	PINCTRL_PIN(120, "GPIO_120"),
    135	PINCTRL_PIN(121, "GPIO_121"),
    136	PINCTRL_PIN(122, "GPIO_122"),
    137	PINCTRL_PIN(123, "GPIO_123"),
    138	PINCTRL_PIN(124, "GPIO_124"),
    139	PINCTRL_PIN(125, "GPIO_125"),
    140	PINCTRL_PIN(126, "GPIO_126"),
    141	PINCTRL_PIN(127, "GPIO_127"),
    142	PINCTRL_PIN(128, "GPIO_128"),
    143	PINCTRL_PIN(129, "GPIO_129"),
    144	PINCTRL_PIN(130, "GPIO_130"),
    145	PINCTRL_PIN(131, "GPIO_131"),
    146	PINCTRL_PIN(132, "GPIO_132"),
    147	PINCTRL_PIN(133, "GPIO_133"),
    148	PINCTRL_PIN(134, "GPIO_134"),
    149	PINCTRL_PIN(135, "GPIO_135"),
    150	PINCTRL_PIN(136, "GPIO_136"),
    151	PINCTRL_PIN(137, "GPIO_137"),
    152	PINCTRL_PIN(138, "GPIO_138"),
    153	PINCTRL_PIN(139, "GPIO_139"),
    154	PINCTRL_PIN(140, "GPIO_140"),
    155	PINCTRL_PIN(141, "GPIO_141"),
    156	PINCTRL_PIN(142, "GPIO_142"),
    157	PINCTRL_PIN(143, "GPIO_143"),
    158	PINCTRL_PIN(144, "GPIO_144"),
    159	PINCTRL_PIN(145, "GPIO_145"),
    160	PINCTRL_PIN(146, "GPIO_146"),
    161
    162	PINCTRL_PIN(147, "SDC1_CLK"),
    163	PINCTRL_PIN(148, "SDC1_CMD"),
    164	PINCTRL_PIN(149, "SDC1_DATA"),
    165	PINCTRL_PIN(150, "SDC2_CLK"),
    166	PINCTRL_PIN(151, "SDC2_CMD"),
    167	PINCTRL_PIN(152, "SDC2_DATA"),
    168};
    169
    170#define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
    171
    172DECLARE_APQ_GPIO_PINS(0);
    173DECLARE_APQ_GPIO_PINS(1);
    174DECLARE_APQ_GPIO_PINS(2);
    175DECLARE_APQ_GPIO_PINS(3);
    176DECLARE_APQ_GPIO_PINS(4);
    177DECLARE_APQ_GPIO_PINS(5);
    178DECLARE_APQ_GPIO_PINS(6);
    179DECLARE_APQ_GPIO_PINS(7);
    180DECLARE_APQ_GPIO_PINS(8);
    181DECLARE_APQ_GPIO_PINS(9);
    182DECLARE_APQ_GPIO_PINS(10);
    183DECLARE_APQ_GPIO_PINS(11);
    184DECLARE_APQ_GPIO_PINS(12);
    185DECLARE_APQ_GPIO_PINS(13);
    186DECLARE_APQ_GPIO_PINS(14);
    187DECLARE_APQ_GPIO_PINS(15);
    188DECLARE_APQ_GPIO_PINS(16);
    189DECLARE_APQ_GPIO_PINS(17);
    190DECLARE_APQ_GPIO_PINS(18);
    191DECLARE_APQ_GPIO_PINS(19);
    192DECLARE_APQ_GPIO_PINS(20);
    193DECLARE_APQ_GPIO_PINS(21);
    194DECLARE_APQ_GPIO_PINS(22);
    195DECLARE_APQ_GPIO_PINS(23);
    196DECLARE_APQ_GPIO_PINS(24);
    197DECLARE_APQ_GPIO_PINS(25);
    198DECLARE_APQ_GPIO_PINS(26);
    199DECLARE_APQ_GPIO_PINS(27);
    200DECLARE_APQ_GPIO_PINS(28);
    201DECLARE_APQ_GPIO_PINS(29);
    202DECLARE_APQ_GPIO_PINS(30);
    203DECLARE_APQ_GPIO_PINS(31);
    204DECLARE_APQ_GPIO_PINS(32);
    205DECLARE_APQ_GPIO_PINS(33);
    206DECLARE_APQ_GPIO_PINS(34);
    207DECLARE_APQ_GPIO_PINS(35);
    208DECLARE_APQ_GPIO_PINS(36);
    209DECLARE_APQ_GPIO_PINS(37);
    210DECLARE_APQ_GPIO_PINS(38);
    211DECLARE_APQ_GPIO_PINS(39);
    212DECLARE_APQ_GPIO_PINS(40);
    213DECLARE_APQ_GPIO_PINS(41);
    214DECLARE_APQ_GPIO_PINS(42);
    215DECLARE_APQ_GPIO_PINS(43);
    216DECLARE_APQ_GPIO_PINS(44);
    217DECLARE_APQ_GPIO_PINS(45);
    218DECLARE_APQ_GPIO_PINS(46);
    219DECLARE_APQ_GPIO_PINS(47);
    220DECLARE_APQ_GPIO_PINS(48);
    221DECLARE_APQ_GPIO_PINS(49);
    222DECLARE_APQ_GPIO_PINS(50);
    223DECLARE_APQ_GPIO_PINS(51);
    224DECLARE_APQ_GPIO_PINS(52);
    225DECLARE_APQ_GPIO_PINS(53);
    226DECLARE_APQ_GPIO_PINS(54);
    227DECLARE_APQ_GPIO_PINS(55);
    228DECLARE_APQ_GPIO_PINS(56);
    229DECLARE_APQ_GPIO_PINS(57);
    230DECLARE_APQ_GPIO_PINS(58);
    231DECLARE_APQ_GPIO_PINS(59);
    232DECLARE_APQ_GPIO_PINS(60);
    233DECLARE_APQ_GPIO_PINS(61);
    234DECLARE_APQ_GPIO_PINS(62);
    235DECLARE_APQ_GPIO_PINS(63);
    236DECLARE_APQ_GPIO_PINS(64);
    237DECLARE_APQ_GPIO_PINS(65);
    238DECLARE_APQ_GPIO_PINS(66);
    239DECLARE_APQ_GPIO_PINS(67);
    240DECLARE_APQ_GPIO_PINS(68);
    241DECLARE_APQ_GPIO_PINS(69);
    242DECLARE_APQ_GPIO_PINS(70);
    243DECLARE_APQ_GPIO_PINS(71);
    244DECLARE_APQ_GPIO_PINS(72);
    245DECLARE_APQ_GPIO_PINS(73);
    246DECLARE_APQ_GPIO_PINS(74);
    247DECLARE_APQ_GPIO_PINS(75);
    248DECLARE_APQ_GPIO_PINS(76);
    249DECLARE_APQ_GPIO_PINS(77);
    250DECLARE_APQ_GPIO_PINS(78);
    251DECLARE_APQ_GPIO_PINS(79);
    252DECLARE_APQ_GPIO_PINS(80);
    253DECLARE_APQ_GPIO_PINS(81);
    254DECLARE_APQ_GPIO_PINS(82);
    255DECLARE_APQ_GPIO_PINS(83);
    256DECLARE_APQ_GPIO_PINS(84);
    257DECLARE_APQ_GPIO_PINS(85);
    258DECLARE_APQ_GPIO_PINS(86);
    259DECLARE_APQ_GPIO_PINS(87);
    260DECLARE_APQ_GPIO_PINS(88);
    261DECLARE_APQ_GPIO_PINS(89);
    262DECLARE_APQ_GPIO_PINS(90);
    263DECLARE_APQ_GPIO_PINS(91);
    264DECLARE_APQ_GPIO_PINS(92);
    265DECLARE_APQ_GPIO_PINS(93);
    266DECLARE_APQ_GPIO_PINS(94);
    267DECLARE_APQ_GPIO_PINS(95);
    268DECLARE_APQ_GPIO_PINS(96);
    269DECLARE_APQ_GPIO_PINS(97);
    270DECLARE_APQ_GPIO_PINS(98);
    271DECLARE_APQ_GPIO_PINS(99);
    272DECLARE_APQ_GPIO_PINS(100);
    273DECLARE_APQ_GPIO_PINS(101);
    274DECLARE_APQ_GPIO_PINS(102);
    275DECLARE_APQ_GPIO_PINS(103);
    276DECLARE_APQ_GPIO_PINS(104);
    277DECLARE_APQ_GPIO_PINS(105);
    278DECLARE_APQ_GPIO_PINS(106);
    279DECLARE_APQ_GPIO_PINS(107);
    280DECLARE_APQ_GPIO_PINS(108);
    281DECLARE_APQ_GPIO_PINS(109);
    282DECLARE_APQ_GPIO_PINS(110);
    283DECLARE_APQ_GPIO_PINS(111);
    284DECLARE_APQ_GPIO_PINS(112);
    285DECLARE_APQ_GPIO_PINS(113);
    286DECLARE_APQ_GPIO_PINS(114);
    287DECLARE_APQ_GPIO_PINS(115);
    288DECLARE_APQ_GPIO_PINS(116);
    289DECLARE_APQ_GPIO_PINS(117);
    290DECLARE_APQ_GPIO_PINS(118);
    291DECLARE_APQ_GPIO_PINS(119);
    292DECLARE_APQ_GPIO_PINS(120);
    293DECLARE_APQ_GPIO_PINS(121);
    294DECLARE_APQ_GPIO_PINS(122);
    295DECLARE_APQ_GPIO_PINS(123);
    296DECLARE_APQ_GPIO_PINS(124);
    297DECLARE_APQ_GPIO_PINS(125);
    298DECLARE_APQ_GPIO_PINS(126);
    299DECLARE_APQ_GPIO_PINS(127);
    300DECLARE_APQ_GPIO_PINS(128);
    301DECLARE_APQ_GPIO_PINS(129);
    302DECLARE_APQ_GPIO_PINS(130);
    303DECLARE_APQ_GPIO_PINS(131);
    304DECLARE_APQ_GPIO_PINS(132);
    305DECLARE_APQ_GPIO_PINS(133);
    306DECLARE_APQ_GPIO_PINS(134);
    307DECLARE_APQ_GPIO_PINS(135);
    308DECLARE_APQ_GPIO_PINS(136);
    309DECLARE_APQ_GPIO_PINS(137);
    310DECLARE_APQ_GPIO_PINS(138);
    311DECLARE_APQ_GPIO_PINS(139);
    312DECLARE_APQ_GPIO_PINS(140);
    313DECLARE_APQ_GPIO_PINS(141);
    314DECLARE_APQ_GPIO_PINS(142);
    315DECLARE_APQ_GPIO_PINS(143);
    316DECLARE_APQ_GPIO_PINS(144);
    317DECLARE_APQ_GPIO_PINS(145);
    318DECLARE_APQ_GPIO_PINS(146);
    319
    320static const unsigned int sdc1_clk_pins[] = { 147 };
    321static const unsigned int sdc1_cmd_pins[] = { 148 };
    322static const unsigned int sdc1_data_pins[] = { 149 };
    323static const unsigned int sdc2_clk_pins[] = { 150 };
    324static const unsigned int sdc2_cmd_pins[] = { 151 };
    325static const unsigned int sdc2_data_pins[] = { 152 };
    326
    327#define FUNCTION(fname)					\
    328	[APQ_MUX_##fname] = {				\
    329		.name = #fname,				\
    330		.groups = fname##_groups,		\
    331		.ngroups = ARRAY_SIZE(fname##_groups),	\
    332	}
    333
    334#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7)        \
    335	{						\
    336		.name = "gpio" #id,			\
    337		.pins = gpio##id##_pins,		\
    338		.npins = ARRAY_SIZE(gpio##id##_pins),	\
    339		.funcs = (int[]){			\
    340			APQ_MUX_gpio,			\
    341			APQ_MUX_##f1,			\
    342			APQ_MUX_##f2,			\
    343			APQ_MUX_##f3,			\
    344			APQ_MUX_##f4,			\
    345			APQ_MUX_##f5,			\
    346			APQ_MUX_##f6,			\
    347			APQ_MUX_##f7			\
    348		},					\
    349		.nfuncs = 8,				\
    350		.ctl_reg = 0x1000 + 0x10 * id,		\
    351		.io_reg = 0x1004 + 0x10 * id,		\
    352		.intr_cfg_reg = 0x1008 + 0x10 * id,	\
    353		.intr_status_reg = 0x100c + 0x10 * id,	\
    354		.intr_target_reg = 0x1008 + 0x10 * id,	\
    355		.mux_bit = 2,				\
    356		.pull_bit = 0,				\
    357		.drv_bit = 6,				\
    358		.oe_bit = 9,				\
    359		.in_bit = 0,				\
    360		.out_bit = 1,				\
    361		.intr_enable_bit = 0,			\
    362		.intr_status_bit = 0,			\
    363		.intr_ack_high = 0,			\
    364		.intr_target_bit = 5,			\
    365		.intr_target_kpss_val = 3,		\
    366		.intr_raw_status_bit = 4,		\
    367		.intr_polarity_bit = 1,			\
    368		.intr_detection_bit = 2,		\
    369		.intr_detection_width = 2,		\
    370	}
    371
    372#define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
    373	{						\
    374		.name = #pg_name,	                \
    375		.pins = pg_name##_pins,                 \
    376		.npins = ARRAY_SIZE(pg_name##_pins),    \
    377		.ctl_reg = ctl,                         \
    378		.io_reg = 0,                            \
    379		.intr_cfg_reg = 0,                      \
    380		.intr_status_reg = 0,                   \
    381		.intr_target_reg = 0,                   \
    382		.mux_bit = -1,                          \
    383		.pull_bit = pull,                       \
    384		.drv_bit = drv,                         \
    385		.oe_bit = -1,                           \
    386		.in_bit = -1,                           \
    387		.out_bit = -1,                          \
    388		.intr_enable_bit = -1,                  \
    389		.intr_status_bit = -1,                  \
    390		.intr_target_bit = -1,                  \
    391		.intr_target_kpss_val = -1,		\
    392		.intr_raw_status_bit = -1,              \
    393		.intr_polarity_bit = -1,                \
    394		.intr_detection_bit = -1,               \
    395		.intr_detection_width = -1,             \
    396	}
    397
    398enum apq8084_functions {
    399	APQ_MUX_adsp_ext,
    400	APQ_MUX_audio_ref,
    401	APQ_MUX_blsp_i2c1,
    402	APQ_MUX_blsp_i2c2,
    403	APQ_MUX_blsp_i2c3,
    404	APQ_MUX_blsp_i2c4,
    405	APQ_MUX_blsp_i2c5,
    406	APQ_MUX_blsp_i2c6,
    407	APQ_MUX_blsp_i2c7,
    408	APQ_MUX_blsp_i2c8,
    409	APQ_MUX_blsp_i2c9,
    410	APQ_MUX_blsp_i2c10,
    411	APQ_MUX_blsp_i2c11,
    412	APQ_MUX_blsp_i2c12,
    413	APQ_MUX_blsp_spi1,
    414	APQ_MUX_blsp_spi1_cs1,
    415	APQ_MUX_blsp_spi1_cs2,
    416	APQ_MUX_blsp_spi1_cs3,
    417	APQ_MUX_blsp_spi2,
    418	APQ_MUX_blsp_spi3,
    419	APQ_MUX_blsp_spi3_cs1,
    420	APQ_MUX_blsp_spi3_cs2,
    421	APQ_MUX_blsp_spi3_cs3,
    422	APQ_MUX_blsp_spi4,
    423	APQ_MUX_blsp_spi5,
    424	APQ_MUX_blsp_spi6,
    425	APQ_MUX_blsp_spi7,
    426	APQ_MUX_blsp_spi8,
    427	APQ_MUX_blsp_spi9,
    428	APQ_MUX_blsp_spi10,
    429	APQ_MUX_blsp_spi10_cs1,
    430	APQ_MUX_blsp_spi10_cs2,
    431	APQ_MUX_blsp_spi10_cs3,
    432	APQ_MUX_blsp_spi11,
    433	APQ_MUX_blsp_spi12,
    434	APQ_MUX_blsp_uart1,
    435	APQ_MUX_blsp_uart2,
    436	APQ_MUX_blsp_uart3,
    437	APQ_MUX_blsp_uart4,
    438	APQ_MUX_blsp_uart5,
    439	APQ_MUX_blsp_uart6,
    440	APQ_MUX_blsp_uart7,
    441	APQ_MUX_blsp_uart8,
    442	APQ_MUX_blsp_uart9,
    443	APQ_MUX_blsp_uart10,
    444	APQ_MUX_blsp_uart11,
    445	APQ_MUX_blsp_uart12,
    446	APQ_MUX_blsp_uim1,
    447	APQ_MUX_blsp_uim2,
    448	APQ_MUX_blsp_uim3,
    449	APQ_MUX_blsp_uim4,
    450	APQ_MUX_blsp_uim5,
    451	APQ_MUX_blsp_uim6,
    452	APQ_MUX_blsp_uim7,
    453	APQ_MUX_blsp_uim8,
    454	APQ_MUX_blsp_uim9,
    455	APQ_MUX_blsp_uim10,
    456	APQ_MUX_blsp_uim11,
    457	APQ_MUX_blsp_uim12,
    458	APQ_MUX_cam_mclk0,
    459	APQ_MUX_cam_mclk1,
    460	APQ_MUX_cam_mclk2,
    461	APQ_MUX_cam_mclk3,
    462	APQ_MUX_cci_async,
    463	APQ_MUX_cci_async_in0,
    464	APQ_MUX_cci_i2c0,
    465	APQ_MUX_cci_i2c1,
    466	APQ_MUX_cci_timer0,
    467	APQ_MUX_cci_timer1,
    468	APQ_MUX_cci_timer2,
    469	APQ_MUX_cci_timer3,
    470	APQ_MUX_cci_timer4,
    471	APQ_MUX_edp_hpd,
    472	APQ_MUX_gcc_gp1,
    473	APQ_MUX_gcc_gp2,
    474	APQ_MUX_gcc_gp3,
    475	APQ_MUX_gcc_obt,
    476	APQ_MUX_gcc_vtt,
    477	APQ_MUX_gp_mn,
    478	APQ_MUX_gp_pdm0,
    479	APQ_MUX_gp_pdm1,
    480	APQ_MUX_gp_pdm2,
    481	APQ_MUX_gp0_clk,
    482	APQ_MUX_gp1_clk,
    483	APQ_MUX_gpio,
    484	APQ_MUX_hdmi_cec,
    485	APQ_MUX_hdmi_ddc,
    486	APQ_MUX_hdmi_dtest,
    487	APQ_MUX_hdmi_hpd,
    488	APQ_MUX_hdmi_rcv,
    489	APQ_MUX_hsic,
    490	APQ_MUX_ldo_en,
    491	APQ_MUX_ldo_update,
    492	APQ_MUX_mdp_vsync,
    493	APQ_MUX_pci_e0,
    494	APQ_MUX_pci_e0_n,
    495	APQ_MUX_pci_e0_rst,
    496	APQ_MUX_pci_e1,
    497	APQ_MUX_pci_e1_rst,
    498	APQ_MUX_pci_e1_rst_n,
    499	APQ_MUX_pci_e1_clkreq_n,
    500	APQ_MUX_pri_mi2s,
    501	APQ_MUX_qua_mi2s,
    502	APQ_MUX_sata_act,
    503	APQ_MUX_sata_devsleep,
    504	APQ_MUX_sata_devsleep_n,
    505	APQ_MUX_sd_write,
    506	APQ_MUX_sdc_emmc_mode,
    507	APQ_MUX_sdc3,
    508	APQ_MUX_sdc4,
    509	APQ_MUX_sec_mi2s,
    510	APQ_MUX_slimbus,
    511	APQ_MUX_spdif_tx,
    512	APQ_MUX_spkr_i2s,
    513	APQ_MUX_spkr_i2s_ws,
    514	APQ_MUX_spss_geni,
    515	APQ_MUX_ter_mi2s,
    516	APQ_MUX_tsif1,
    517	APQ_MUX_tsif2,
    518	APQ_MUX_uim,
    519	APQ_MUX_uim_batt_alarm,
    520	APQ_MUX_NA,
    521};
    522
    523static const char * const gpio_groups[] = {
    524	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
    525	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
    526	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
    527	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
    528	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
    529	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
    530	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
    531	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
    532	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
    533	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
    534	"gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
    535	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
    536	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
    537	"gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
    538	"gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
    539	"gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
    540	"gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
    541	"gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
    542	"gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
    543	"gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
    544	"gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
    545	"gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146"
    546};
    547
    548static const char * const adsp_ext_groups[] = {
    549	"gpio34"
    550};
    551static const char * const audio_ref_groups[] = {
    552	"gpio100"
    553};
    554static const char * const blsp_i2c1_groups[] = {
    555	"gpio2", "gpio3"
    556};
    557static const char * const blsp_i2c2_groups[] = {
    558	"gpio6", "gpio7"
    559};
    560static const char * const blsp_i2c3_groups[] = {
    561	"gpio10", "gpio11"
    562};
    563static const char * const blsp_i2c4_groups[] = {
    564	"gpio29", "gpio30"
    565};
    566static const char * const blsp_i2c5_groups[] = {
    567	"gpio41", "gpio42"
    568};
    569static const char * const blsp_i2c6_groups[] = {
    570	"gpio45", "gpio46"
    571};
    572static const char * const blsp_i2c7_groups[] = {
    573	"gpio132", "gpio133"
    574};
    575static const char * const blsp_i2c8_groups[] = {
    576	"gpio53", "gpio54"
    577};
    578static const char * const blsp_i2c9_groups[] = {
    579	"gpio57", "gpio58"
    580};
    581static const char * const blsp_i2c10_groups[] = {
    582	"gpio61", "gpio62"
    583};
    584static const char * const blsp_i2c11_groups[] = {
    585	"gpio65", "gpio66"
    586};
    587static const char * const blsp_i2c12_groups[] = {
    588	"gpio49", "gpio50"
    589};
    590static const char * const blsp_spi1_groups[] = {
    591	"gpio0", "gpio1", "gpio2", "gpio3"
    592};
    593static const char * const blsp_spi2_groups[] = {
    594	"gpio4", "gpio5", "gpio6", "gpio7"
    595};
    596static const char * const blsp_spi3_groups[] = {
    597	"gpio8", "gpio9", "gpio10", "gpio11"
    598};
    599static const char * const blsp_spi4_groups[] = {
    600	"gpio27", "gpio28", "gpio29", "gpio30"
    601};
    602static const char * const blsp_spi5_groups[] = {
    603	"gpio39", "gpio40", "gpio41", "gpio42"
    604};
    605static const char * const blsp_spi6_groups[] = {
    606	"gpio43", "gpio44", "gpio45", "gpio46"
    607};
    608static const char * const blsp_spi7_groups[] = {
    609	"gpio130", "gpio131", "gpio132", "gpio133"
    610};
    611static const char * const blsp_spi8_groups[] = {
    612	"gpio51", "gpio52", "gpio53", "gpio54"
    613};
    614static const char * const blsp_spi9_groups[] = {
    615	"gpio55", "gpio56", "gpio57", "gpio58"
    616};
    617static const char * const blsp_spi10_groups[] = {
    618	"gpio59", "gpio60", "gpio61", "gpio62"
    619};
    620static const char * const blsp_spi11_groups[] = {
    621	"gpio63", "gpio64", "gpio65", "gpio66"
    622};
    623static const char * const blsp_spi12_groups[] = {
    624	"gpio47", "gpio48", "gpio49", "gpio50"
    625};
    626static const char * const blsp_uart1_groups[] = {
    627	"gpio0", "gpio1", "gpio2", "gpio3"
    628};
    629static const char * const blsp_uart2_groups[] = {
    630	"gpio4", "gpio5", "gpio6", "gpio7"
    631};
    632static const char * const blsp_uart3_groups[] = {
    633	"gpio8"
    634};
    635static const char * const blsp_uart4_groups[] = {
    636	"gpio27", "gpio28", "gpio29", "gpio30"
    637};
    638static const char * const blsp_uart5_groups[] = {
    639	"gpio39", "gpio40", "gpio41", "gpio42"
    640};
    641static const char * const blsp_uart6_groups[] = {
    642	"gpio43", "gpio44", "gpio45", "gpio46"
    643};
    644static const char * const blsp_uart7_groups[] = {
    645	"gpio130", "gpio131", "gpio132", "gpio133"
    646};
    647static const char * const blsp_uart8_groups[] = {
    648	"gpio51", "gpio52", "gpio53", "gpio54"
    649};
    650static const char * const blsp_uart9_groups[] = {
    651	"gpio55", "gpio56", "gpio57", "gpio58"
    652};
    653static const char * const blsp_uart10_groups[] = {
    654	"gpio59", "gpio60", "gpio61", "gpio62"
    655};
    656static const char * const blsp_uart11_groups[] = {
    657	"gpio63", "gpio64", "gpio65", "gpio66"
    658};
    659static const char * const blsp_uart12_groups[] = {
    660	"gpio47", "gpio48", "gpio49", "gpio50"
    661};
    662static const char * const blsp_uim1_groups[] = {
    663	"gpio0", "gpio1"
    664};
    665static const char * const blsp_uim2_groups[] = {
    666	"gpio4", "gpio5"
    667};
    668static const char * const blsp_uim3_groups[] = {
    669	"gpio8", "gpio9"
    670};
    671static const char * const blsp_uim4_groups[] = {
    672	"gpio27", "gpio28"
    673};
    674static const char * const blsp_uim5_groups[] = {
    675	"gpio39", "gpio40"
    676};
    677static const char * const blsp_uim6_groups[] = {
    678	"gpio43", "gpio44"
    679};
    680static const char * const blsp_uim7_groups[] = {
    681	"gpio130", "gpio131"
    682};
    683static const char * const blsp_uim8_groups[] = {
    684	"gpio51", "gpio52"
    685};
    686static const char * const blsp_uim9_groups[] = {
    687	"gpio55", "gpio56"
    688};
    689static const char * const blsp_uim10_groups[] = {
    690	"gpio59", "gpio60"
    691};
    692static const char * const blsp_uim11_groups[] = {
    693	"gpio63", "gpio64"
    694};
    695static const char * const blsp_uim12_groups[] = {
    696	"gpio47", "gpio48"
    697};
    698static const char * const blsp_spi1_cs1_groups[] = {
    699	"gpio116"
    700};
    701static const char * const blsp_spi1_cs2_groups[] = {
    702	"gpio117"
    703};
    704static const char * const blsp_spi1_cs3_groups[] = {
    705	"gpio118"
    706};
    707static const char * const blsp_spi3_cs1_groups[] = {
    708	"gpio67"
    709};
    710static const char * const blsp_spi3_cs2_groups[] = {
    711	"gpio71"
    712};
    713static const char * const blsp_spi3_cs3_groups[] = {
    714	"gpio72"
    715};
    716static const char * const blsp_spi10_cs1_groups[] = {
    717	"gpio106"
    718};
    719static const char * const blsp_spi10_cs2_groups[] = {
    720	"gpio111"
    721};
    722static const char * const blsp_spi10_cs3_groups[] = {
    723	"gpio128"
    724};
    725static const char * const cam_mclk0_groups[] = {
    726	"gpio15"
    727};
    728static const char * const cam_mclk1_groups[] = {
    729	"gpio16"
    730};
    731static const char * const cam_mclk2_groups[] = {
    732	"gpio17"
    733};
    734static const char * const cam_mclk3_groups[] = {
    735	"gpio18"
    736};
    737static const char * const cci_async_groups[] = {
    738	"gpio26", "gpio119"
    739};
    740static const char * const cci_async_in0_groups[] = {
    741	"gpio120"
    742};
    743static const char * const cci_i2c0_groups[] = {
    744	"gpio19", "gpio20"
    745};
    746static const char * const cci_i2c1_groups[] = {
    747	"gpio21", "gpio22"
    748};
    749static const char * const cci_timer0_groups[] = {
    750	"gpio23"
    751};
    752static const char * const cci_timer1_groups[] = {
    753	"gpio24"
    754};
    755static const char * const cci_timer2_groups[] = {
    756	"gpio25"
    757};
    758static const char * const cci_timer3_groups[] = {
    759	"gpio26"
    760};
    761static const char * const cci_timer4_groups[] = {
    762	"gpio119"
    763};
    764static const char * const edp_hpd_groups[] = {
    765	"gpio103"
    766};
    767static const char * const gcc_gp1_groups[] = {
    768	"gpio37"
    769};
    770static const char * const gcc_gp2_groups[] = {
    771	"gpio38"
    772};
    773static const char * const gcc_gp3_groups[] = {
    774	"gpio86"
    775};
    776static const char * const gcc_obt_groups[] = {
    777	"gpio127"
    778};
    779static const char * const gcc_vtt_groups[] = {
    780	"gpio126"
    781};
    782static const char * const gp_mn_groups[] = {
    783	"gpio29"
    784};
    785static const char * const gp_pdm0_groups[] = {
    786	"gpio48", "gpio83"
    787};
    788static const char * const gp_pdm1_groups[] = {
    789	"gpio84", "gpio101"
    790};
    791static const char * const gp_pdm2_groups[] = {
    792	"gpio85", "gpio110"
    793};
    794static const char * const gp0_clk_groups[] = {
    795	"gpio25"
    796};
    797static const char * const gp1_clk_groups[] = {
    798	"gpio26"
    799};
    800static const char * const hdmi_cec_groups[] = {
    801	"gpio31"
    802};
    803static const char * const hdmi_ddc_groups[] = {
    804	"gpio32", "gpio33"
    805};
    806static const char * const hdmi_dtest_groups[] = {
    807	"gpio123"
    808};
    809static const char * const hdmi_hpd_groups[] = {
    810	"gpio34"
    811};
    812static const char * const hdmi_rcv_groups[] = {
    813	"gpio125"
    814};
    815static const char * const hsic_groups[] = {
    816	"gpio134", "gpio135"
    817};
    818static const char * const ldo_en_groups[] = {
    819	"gpio124"
    820};
    821static const char * const ldo_update_groups[] = {
    822	"gpio125"
    823};
    824static const char * const mdp_vsync_groups[] = {
    825	"gpio12", "gpio13", "gpio14"
    826};
    827static const char * const pci_e0_groups[] = {
    828	"gpio68", "gpio70"
    829};
    830static const char * const pci_e0_n_groups[] = {
    831	"gpio68", "gpio70"
    832};
    833static const char * const pci_e0_rst_groups[] = {
    834	"gpio70"
    835};
    836static const char * const pci_e1_groups[] = {
    837	"gpio140"
    838};
    839static const char * const pci_e1_rst_groups[] = {
    840	"gpio140"
    841};
    842static const char * const pci_e1_rst_n_groups[] = {
    843	"gpio140"
    844};
    845static const char * const pci_e1_clkreq_n_groups[] = {
    846	"gpio141"
    847};
    848static const char * const pri_mi2s_groups[] = {
    849	"gpio76", "gpio77", "gpio78", "gpio79", "gpio80"
    850};
    851static const char * const qua_mi2s_groups[] = {
    852	"gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97"
    853};
    854static const char * const sata_act_groups[] = {
    855	"gpio129"
    856};
    857static const char * const sata_devsleep_groups[] = {
    858	"gpio119"
    859};
    860static const char * const sata_devsleep_n_groups[] = {
    861	"gpio119"
    862};
    863static const char * const sd_write_groups[] = {
    864	"gpio75"
    865};
    866static const char * const sdc_emmc_mode_groups[] = {
    867	"gpio146"
    868};
    869static const char * const sdc3_groups[] = {
    870	"gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72"
    871};
    872static const char * const sdc4_groups[] = {
    873	"gpio82", "gpio83", "gpio84", "gpio85", "gpio86",
    874	"gpio91", "gpio95", "gpio96", "gpio97", "gpio101"
    875};
    876static const char * const sec_mi2s_groups[] = {
    877	"gpio81", "gpio82", "gpio83", "gpio84", "gpio85"
    878};
    879static const char * const slimbus_groups[] = {
    880	"gpio98", "gpio99"
    881};
    882static const char * const spdif_tx_groups[] = {
    883	"gpio124", "gpio136", "gpio142"
    884};
    885static const char * const spkr_i2s_groups[] = {
    886	"gpio98", "gpio99", "gpio100"
    887};
    888static const char * const spkr_i2s_ws_groups[] = {
    889	"gpio104"
    890};
    891static const char * const spss_geni_groups[] = {
    892	"gpio8", "gpio9"
    893};
    894static const char * const ter_mi2s_groups[] = {
    895	"gpio86", "gpio87", "gpio88", "gpio89", "gpio90"
    896};
    897static const char * const tsif1_groups[] = {
    898	"gpio82", "gpio83", "gpio84", "gpio85", "gpio86"
    899};
    900static const char * const tsif2_groups[] = {
    901	"gpio91", "gpio95", "gpio96", "gpio97", "gpio101"
    902};
    903static const char * const uim_groups[] = {
    904	"gpio130", "gpio131", "gpio132", "gpio133"
    905};
    906static const char * const uim_batt_alarm_groups[] = {
    907	"gpio102"
    908};
    909static const struct msm_function apq8084_functions[] = {
    910	FUNCTION(adsp_ext),
    911	FUNCTION(audio_ref),
    912	FUNCTION(blsp_i2c1),
    913	FUNCTION(blsp_i2c2),
    914	FUNCTION(blsp_i2c3),
    915	FUNCTION(blsp_i2c4),
    916	FUNCTION(blsp_i2c5),
    917	FUNCTION(blsp_i2c6),
    918	FUNCTION(blsp_i2c7),
    919	FUNCTION(blsp_i2c8),
    920	FUNCTION(blsp_i2c9),
    921	FUNCTION(blsp_i2c10),
    922	FUNCTION(blsp_i2c11),
    923	FUNCTION(blsp_i2c12),
    924	FUNCTION(blsp_spi1),
    925	FUNCTION(blsp_spi1_cs1),
    926	FUNCTION(blsp_spi1_cs2),
    927	FUNCTION(blsp_spi1_cs3),
    928	FUNCTION(blsp_spi2),
    929	FUNCTION(blsp_spi3),
    930	FUNCTION(blsp_spi3_cs1),
    931	FUNCTION(blsp_spi3_cs2),
    932	FUNCTION(blsp_spi3_cs3),
    933	FUNCTION(blsp_spi4),
    934	FUNCTION(blsp_spi5),
    935	FUNCTION(blsp_spi6),
    936	FUNCTION(blsp_spi7),
    937	FUNCTION(blsp_spi8),
    938	FUNCTION(blsp_spi9),
    939	FUNCTION(blsp_spi10),
    940	FUNCTION(blsp_spi10_cs1),
    941	FUNCTION(blsp_spi10_cs2),
    942	FUNCTION(blsp_spi10_cs3),
    943	FUNCTION(blsp_spi11),
    944	FUNCTION(blsp_spi12),
    945	FUNCTION(blsp_uart1),
    946	FUNCTION(blsp_uart2),
    947	FUNCTION(blsp_uart3),
    948	FUNCTION(blsp_uart4),
    949	FUNCTION(blsp_uart5),
    950	FUNCTION(blsp_uart6),
    951	FUNCTION(blsp_uart7),
    952	FUNCTION(blsp_uart8),
    953	FUNCTION(blsp_uart9),
    954	FUNCTION(blsp_uart10),
    955	FUNCTION(blsp_uart11),
    956	FUNCTION(blsp_uart12),
    957	FUNCTION(blsp_uim1),
    958	FUNCTION(blsp_uim2),
    959	FUNCTION(blsp_uim3),
    960	FUNCTION(blsp_uim4),
    961	FUNCTION(blsp_uim5),
    962	FUNCTION(blsp_uim6),
    963	FUNCTION(blsp_uim7),
    964	FUNCTION(blsp_uim8),
    965	FUNCTION(blsp_uim9),
    966	FUNCTION(blsp_uim10),
    967	FUNCTION(blsp_uim11),
    968	FUNCTION(blsp_uim12),
    969	FUNCTION(cam_mclk0),
    970	FUNCTION(cam_mclk1),
    971	FUNCTION(cam_mclk2),
    972	FUNCTION(cam_mclk3),
    973	FUNCTION(cci_async),
    974	FUNCTION(cci_async_in0),
    975	FUNCTION(cci_i2c0),
    976	FUNCTION(cci_i2c1),
    977	FUNCTION(cci_timer0),
    978	FUNCTION(cci_timer1),
    979	FUNCTION(cci_timer2),
    980	FUNCTION(cci_timer3),
    981	FUNCTION(cci_timer4),
    982	FUNCTION(edp_hpd),
    983	FUNCTION(gcc_gp1),
    984	FUNCTION(gcc_gp2),
    985	FUNCTION(gcc_gp3),
    986	FUNCTION(gcc_obt),
    987	FUNCTION(gcc_vtt),
    988	FUNCTION(gp_mn),
    989	FUNCTION(gp_pdm0),
    990	FUNCTION(gp_pdm1),
    991	FUNCTION(gp_pdm2),
    992	FUNCTION(gp0_clk),
    993	FUNCTION(gp1_clk),
    994	FUNCTION(gpio),
    995	FUNCTION(hdmi_cec),
    996	FUNCTION(hdmi_ddc),
    997	FUNCTION(hdmi_dtest),
    998	FUNCTION(hdmi_hpd),
    999	FUNCTION(hdmi_rcv),
   1000	FUNCTION(hsic),
   1001	FUNCTION(ldo_en),
   1002	FUNCTION(ldo_update),
   1003	FUNCTION(mdp_vsync),
   1004	FUNCTION(pci_e0),
   1005	FUNCTION(pci_e0_n),
   1006	FUNCTION(pci_e0_rst),
   1007	FUNCTION(pci_e1),
   1008	FUNCTION(pci_e1_rst),
   1009	FUNCTION(pci_e1_rst_n),
   1010	FUNCTION(pci_e1_clkreq_n),
   1011	FUNCTION(pri_mi2s),
   1012	FUNCTION(qua_mi2s),
   1013	FUNCTION(sata_act),
   1014	FUNCTION(sata_devsleep),
   1015	FUNCTION(sata_devsleep_n),
   1016	FUNCTION(sd_write),
   1017	FUNCTION(sdc_emmc_mode),
   1018	FUNCTION(sdc3),
   1019	FUNCTION(sdc4),
   1020	FUNCTION(sec_mi2s),
   1021	FUNCTION(slimbus),
   1022	FUNCTION(spdif_tx),
   1023	FUNCTION(spkr_i2s),
   1024	FUNCTION(spkr_i2s_ws),
   1025	FUNCTION(spss_geni),
   1026	FUNCTION(ter_mi2s),
   1027	FUNCTION(tsif1),
   1028	FUNCTION(tsif2),
   1029	FUNCTION(uim),
   1030	FUNCTION(uim_batt_alarm),
   1031};
   1032
   1033static const struct msm_pingroup apq8084_groups[] = {
   1034	PINGROUP(0,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
   1035	PINGROUP(1,   blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
   1036	PINGROUP(2,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
   1037	PINGROUP(3,   blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA),
   1038	PINGROUP(4,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
   1039	PINGROUP(5,   blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA),
   1040	PINGROUP(6,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
   1041	PINGROUP(7,   blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA),
   1042	PINGROUP(8,   blsp_spi3, blsp_uart3, blsp_uim3, spss_geni, NA, NA, NA),
   1043	PINGROUP(9,   blsp_spi3, blsp_uim3, blsp_uart3, spss_geni, NA, NA, NA),
   1044	PINGROUP(10,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
   1045	PINGROUP(11,  blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA),
   1046	PINGROUP(12,  mdp_vsync, NA, NA, NA, NA, NA, NA),
   1047	PINGROUP(13,  mdp_vsync, NA, NA, NA, NA, NA, NA),
   1048	PINGROUP(14,  mdp_vsync, NA, NA, NA, NA, NA, NA),
   1049	PINGROUP(15,  cam_mclk0, NA, NA, NA, NA, NA, NA),
   1050	PINGROUP(16,  cam_mclk1, NA, NA, NA, NA, NA, NA),
   1051	PINGROUP(17,  cam_mclk2, NA, NA, NA, NA, NA, NA),
   1052	PINGROUP(18,  cam_mclk3, NA, NA, NA, NA, NA, NA),
   1053	PINGROUP(19,  cci_i2c0, NA, NA, NA, NA, NA, NA),
   1054	PINGROUP(20,  cci_i2c0, NA, NA, NA, NA, NA, NA),
   1055	PINGROUP(21,  cci_i2c1, NA, NA, NA, NA, NA, NA),
   1056	PINGROUP(22,  cci_i2c1, NA, NA, NA, NA, NA, NA),
   1057	PINGROUP(23,  cci_timer0, NA, NA, NA, NA, NA, NA),
   1058	PINGROUP(24,  cci_timer1, NA, NA, NA, NA, NA, NA),
   1059	PINGROUP(25,  cci_timer2, gp0_clk, NA, NA, NA, NA, NA),
   1060	PINGROUP(26,  cci_timer3, cci_async, gp1_clk, NA, NA, NA, NA),
   1061	PINGROUP(27,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
   1062	PINGROUP(28,  blsp_spi4, blsp_uart4, blsp_uim4, NA, NA, NA, NA),
   1063	PINGROUP(29,  blsp_spi4, blsp_uart4, blsp_i2c4, gp_mn, NA, NA, NA),
   1064	PINGROUP(30,  blsp_spi4, blsp_uart4, blsp_i2c4, NA, NA, NA, NA),
   1065	PINGROUP(31,  hdmi_cec, NA, NA, NA, NA, NA, NA),
   1066	PINGROUP(32,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
   1067	PINGROUP(33,  hdmi_ddc, NA, NA, NA, NA, NA, NA),
   1068	PINGROUP(34,  hdmi_hpd, NA, adsp_ext, NA, NA, NA, NA),
   1069	PINGROUP(35,  NA, NA, NA, NA, NA, NA, NA),
   1070	PINGROUP(36,  NA, NA, NA, NA, NA, NA, NA),
   1071	PINGROUP(37,  gcc_gp1, NA, NA, NA, NA, NA, NA),
   1072	PINGROUP(38,  gcc_gp2, NA, NA, NA, NA, NA, NA),
   1073	PINGROUP(39,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
   1074	PINGROUP(40,  blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA),
   1075	PINGROUP(41,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
   1076	PINGROUP(42,  blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA),
   1077	PINGROUP(43,  blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA, NA),
   1078	PINGROUP(44,  blsp_spi6, blsp_uart6, blsp_uim6, NA, NA, NA, NA),
   1079	PINGROUP(45,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
   1080	PINGROUP(46,  blsp_spi6, blsp_uart6, blsp_i2c6, NA, NA, NA, NA),
   1081	PINGROUP(47,  blsp_spi12, blsp_uart12, blsp_uim12, NA, NA, NA, NA),
   1082	PINGROUP(48,  blsp_spi12, blsp_uart12, blsp_uim12, gp_pdm0, NA, NA, NA),
   1083	PINGROUP(49,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
   1084	PINGROUP(50,  blsp_spi12, blsp_uart12, blsp_i2c12, NA, NA, NA, NA),
   1085	PINGROUP(51,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
   1086	PINGROUP(52,  blsp_spi8, blsp_uart8, blsp_uim8, NA, NA, NA, NA),
   1087	PINGROUP(53,  blsp_spi8, blsp_uart8, blsp_i2c8, NA, NA, NA, NA),
   1088	PINGROUP(54,  blsp_spi8, blsp_uart8, blsp_i2c8, NA, NA, NA, NA),
   1089	PINGROUP(55,  blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA),
   1090	PINGROUP(56,  blsp_spi9, blsp_uart9, blsp_uim9, NA, NA, NA, NA),
   1091	PINGROUP(57,  blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA),
   1092	PINGROUP(58,  blsp_spi9, blsp_uart9, blsp_i2c9, NA, NA, NA, NA),
   1093	PINGROUP(59,  blsp_spi10, blsp_uart10, blsp_uim10, NA, NA, NA, NA),
   1094	PINGROUP(60,  blsp_spi10, blsp_uart10, blsp_uim10, NA, NA, NA, NA),
   1095	PINGROUP(61,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
   1096	PINGROUP(62,  blsp_spi10, blsp_uart10, blsp_i2c10, NA, NA, NA, NA),
   1097	PINGROUP(63,  blsp_spi11, blsp_uart11, blsp_uim11, NA, NA, NA, NA),
   1098	PINGROUP(64,  blsp_spi11, blsp_uart11, blsp_uim11, NA, NA, NA, NA),
   1099	PINGROUP(65,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
   1100	PINGROUP(66,  blsp_spi11, blsp_uart11, blsp_i2c11, NA, NA, NA, NA),
   1101	PINGROUP(67,  sdc3, blsp_spi3_cs1, NA, NA, NA, NA, NA),
   1102	PINGROUP(68,  sdc3, pci_e0, NA, NA, NA, NA, NA),
   1103	PINGROUP(69,  sdc3, NA, NA, NA, NA, NA, NA),
   1104	PINGROUP(70,  sdc3, pci_e0_n, pci_e0, NA, NA, NA, NA),
   1105	PINGROUP(71,  sdc3, blsp_spi3_cs2, NA, NA, NA, NA, NA),
   1106	PINGROUP(72,  sdc3, blsp_spi3_cs3, NA, NA, NA, NA, NA),
   1107	PINGROUP(73,  NA, NA, NA, NA, NA, NA, NA),
   1108	PINGROUP(74,  NA, NA, NA, NA, NA, NA, NA),
   1109	PINGROUP(75,  sd_write, NA, NA, NA, NA, NA, NA),
   1110	PINGROUP(76,  pri_mi2s, NA, NA, NA, NA, NA, NA),
   1111	PINGROUP(77,  pri_mi2s, NA, NA, NA, NA, NA, NA),
   1112	PINGROUP(78,  pri_mi2s, NA, NA, NA, NA, NA, NA),
   1113	PINGROUP(79,  pri_mi2s, NA, NA, NA, NA, NA, NA),
   1114	PINGROUP(80,  pri_mi2s, NA, NA, NA, NA, NA, NA),
   1115	PINGROUP(81,  sec_mi2s, NA, NA, NA, NA, NA, NA),
   1116	PINGROUP(82,  sec_mi2s, sdc4, tsif1, NA, NA, NA, NA),
   1117	PINGROUP(83,  sec_mi2s, sdc4, tsif1, NA, NA, NA, gp_pdm0),
   1118	PINGROUP(84,  sec_mi2s, sdc4, tsif1, NA, NA, NA, gp_pdm1),
   1119	PINGROUP(85,  sec_mi2s, sdc4, tsif1, NA, gp_pdm2, NA, NA),
   1120	PINGROUP(86,  ter_mi2s, sdc4, tsif1, NA, NA, NA, gcc_gp3),
   1121	PINGROUP(87,  ter_mi2s, NA, NA, NA, NA, NA, NA),
   1122	PINGROUP(88,  ter_mi2s, NA, NA, NA, NA, NA, NA),
   1123	PINGROUP(89,  ter_mi2s, NA, NA, NA, NA, NA, NA),
   1124	PINGROUP(90,  ter_mi2s, NA, NA, NA, NA, NA, NA),
   1125	PINGROUP(91,  qua_mi2s, sdc4, tsif2, NA, NA, NA, NA),
   1126	PINGROUP(92,  qua_mi2s, NA, NA, NA, NA, NA, NA),
   1127	PINGROUP(93,  qua_mi2s, NA, NA, NA, NA, NA, NA),
   1128	PINGROUP(94,  qua_mi2s, NA, NA, NA, NA, NA, NA),
   1129	PINGROUP(95,  qua_mi2s, sdc4, tsif2, NA, NA, NA, gcc_gp1),
   1130	PINGROUP(96,  qua_mi2s, sdc4, tsif2, NA, NA, NA, gcc_gp2),
   1131	PINGROUP(97,  qua_mi2s, sdc4, tsif2, NA, gcc_gp3, NA, NA),
   1132	PINGROUP(98,  slimbus, spkr_i2s, NA, NA, NA, NA, NA),
   1133	PINGROUP(99,  slimbus, spkr_i2s, NA, NA, NA, NA, NA),
   1134	PINGROUP(100, audio_ref, spkr_i2s, NA, NA, NA, NA, NA),
   1135	PINGROUP(101, sdc4, tsif2, gp_pdm1, NA, NA, NA, NA),
   1136	PINGROUP(102, uim_batt_alarm, NA, NA, NA, NA, NA, NA),
   1137	PINGROUP(103, edp_hpd, NA, NA, NA, NA, NA, NA),
   1138	PINGROUP(104, spkr_i2s, NA, NA, NA, NA, NA, NA),
   1139	PINGROUP(105, NA, NA, NA, NA, NA, NA, NA),
   1140	PINGROUP(106, blsp_spi10_cs1, NA, NA, NA, NA, NA, NA),
   1141	PINGROUP(107, NA, NA, NA, NA, NA, NA, NA),
   1142	PINGROUP(108, NA, NA, NA, NA, NA, NA, NA),
   1143	PINGROUP(109, NA, NA, NA, NA, NA, NA, NA),
   1144	PINGROUP(110, gp_pdm2, NA, NA, NA, NA, NA, NA),
   1145	PINGROUP(111, blsp_spi10_cs2, NA, NA, NA, NA, NA, NA),
   1146	PINGROUP(112, NA, NA, NA, NA, NA, NA, NA),
   1147	PINGROUP(113, NA, NA, NA, NA, NA, NA, NA),
   1148	PINGROUP(114, NA, NA, NA, NA, NA, NA, NA),
   1149	PINGROUP(115, NA, NA, NA, NA, NA, NA, NA),
   1150	PINGROUP(116, blsp_spi1_cs1, NA, NA, NA, NA, NA, NA),
   1151	PINGROUP(117, blsp_spi1_cs2, NA, NA, NA, NA, NA, NA),
   1152	PINGROUP(118, blsp_spi1_cs3, NA, NA, NA, NA, NA, NA),
   1153	PINGROUP(119, cci_timer4, cci_async, sata_devsleep, sata_devsleep_n, NA, NA, NA),
   1154	PINGROUP(120, cci_async, NA, NA, NA, NA, NA, NA),
   1155	PINGROUP(121, NA, NA, NA, NA, NA, NA, NA),
   1156	PINGROUP(122, NA, NA, NA, NA, NA, NA, NA),
   1157	PINGROUP(123, hdmi_dtest, NA, NA, NA, NA, NA, NA),
   1158	PINGROUP(124, spdif_tx, ldo_en, NA, NA, NA, NA, NA),
   1159	PINGROUP(125, ldo_update, hdmi_rcv, NA, NA, NA, NA, NA),
   1160	PINGROUP(126, gcc_vtt, NA, NA, NA, NA, NA, NA),
   1161	PINGROUP(127, gcc_obt, NA, NA, NA, NA, NA, NA),
   1162	PINGROUP(128, blsp_spi10_cs3, NA, NA, NA, NA, NA, NA),
   1163	PINGROUP(129, sata_act, NA, NA, NA, NA, NA, NA),
   1164	PINGROUP(130, uim, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
   1165	PINGROUP(131, uim, blsp_spi7, blsp_uart7, blsp_uim7, NA, NA, NA),
   1166	PINGROUP(132, uim, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
   1167	PINGROUP(133, uim, blsp_spi7, blsp_uart7, blsp_i2c7, NA, NA, NA),
   1168	PINGROUP(134, hsic, NA, NA, NA, NA, NA, NA),
   1169	PINGROUP(135, hsic, NA, NA, NA, NA, NA, NA),
   1170	PINGROUP(136, spdif_tx, NA, NA, NA, NA, NA, NA),
   1171	PINGROUP(137, NA, NA, NA, NA, NA, NA, NA),
   1172	PINGROUP(138, NA, NA, NA, NA, NA, NA, NA),
   1173	PINGROUP(139, NA, NA, NA, NA, NA, NA, NA),
   1174	PINGROUP(140, pci_e1_rst_n, pci_e1_rst, NA, NA, NA, NA, NA),
   1175	PINGROUP(141, pci_e1_clkreq_n, NA, NA, NA, NA, NA, NA),
   1176	PINGROUP(142, spdif_tx, NA, NA, NA, NA, NA, NA),
   1177	PINGROUP(143, NA, NA, NA, NA, NA, NA, NA),
   1178	PINGROUP(144, NA, NA, NA, NA, NA, NA, NA),
   1179	PINGROUP(145, NA, NA, NA, NA, NA, NA, NA),
   1180	PINGROUP(146, sdc_emmc_mode, NA, NA, NA, NA, NA, NA),
   1181
   1182	SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6),
   1183	SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3),
   1184	SDC_PINGROUP(sdc1_data, 0x2044, 9, 0),
   1185	SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6),
   1186	SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3),
   1187	SDC_PINGROUP(sdc2_data, 0x2048, 9, 0),
   1188};
   1189
   1190#define NUM_GPIO_PINGROUPS 147
   1191
   1192static const struct msm_pinctrl_soc_data apq8084_pinctrl = {
   1193	.pins = apq8084_pins,
   1194	.npins = ARRAY_SIZE(apq8084_pins),
   1195	.functions = apq8084_functions,
   1196	.nfunctions = ARRAY_SIZE(apq8084_functions),
   1197	.groups = apq8084_groups,
   1198	.ngroups = ARRAY_SIZE(apq8084_groups),
   1199	.ngpios = NUM_GPIO_PINGROUPS,
   1200};
   1201
   1202static int apq8084_pinctrl_probe(struct platform_device *pdev)
   1203{
   1204	return msm_pinctrl_probe(pdev, &apq8084_pinctrl);
   1205}
   1206
   1207static const struct of_device_id apq8084_pinctrl_of_match[] = {
   1208	{ .compatible = "qcom,apq8084-pinctrl", },
   1209	{ },
   1210};
   1211
   1212static struct platform_driver apq8084_pinctrl_driver = {
   1213	.driver = {
   1214		.name = "apq8084-pinctrl",
   1215		.of_match_table = apq8084_pinctrl_of_match,
   1216	},
   1217	.probe = apq8084_pinctrl_probe,
   1218	.remove = msm_pinctrl_remove,
   1219};
   1220
   1221static int __init apq8084_pinctrl_init(void)
   1222{
   1223	return platform_driver_register(&apq8084_pinctrl_driver);
   1224}
   1225arch_initcall(apq8084_pinctrl_init);
   1226
   1227static void __exit apq8084_pinctrl_exit(void)
   1228{
   1229	platform_driver_unregister(&apq8084_pinctrl_driver);
   1230}
   1231module_exit(apq8084_pinctrl_exit);
   1232
   1233MODULE_DESCRIPTION("Qualcomm APQ8084 pinctrl driver");
   1234MODULE_LICENSE("GPL v2");
   1235MODULE_DEVICE_TABLE(of, apq8084_pinctrl_of_match);