cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

pinctrl-lpass-lpi.h (2229B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
      4 * Copyright (c) 2020 Linaro Ltd.
      5 */
      6#ifndef __PINCTRL_LPASS_LPI_H__
      7#define __PINCTRL_LPASS_LPI_H__
      8
      9#include <linux/bitops.h>
     10#include <linux/bitfield.h>
     11#include "../core.h"
     12
     13#define LPI_SLEW_RATE_CTL_REG	0xa000
     14#define LPI_TLMM_REG_OFFSET		0x1000
     15#define LPI_SLEW_RATE_MAX		0x03
     16#define LPI_SLEW_BITS_SIZE		0x02
     17#define LPI_SLEW_RATE_MASK		GENMASK(1, 0)
     18#define LPI_GPIO_CFG_REG		0x00
     19#define LPI_GPIO_PULL_MASK		GENMASK(1, 0)
     20#define LPI_GPIO_FUNCTION_MASK		GENMASK(5, 2)
     21#define LPI_GPIO_OUT_STRENGTH_MASK	GENMASK(8, 6)
     22#define LPI_GPIO_OE_MASK		BIT(9)
     23#define LPI_GPIO_VALUE_REG		0x04
     24#define LPI_GPIO_VALUE_IN_MASK		BIT(0)
     25#define LPI_GPIO_VALUE_OUT_MASK		BIT(1)
     26
     27#define LPI_GPIO_BIAS_DISABLE		0x0
     28#define LPI_GPIO_PULL_DOWN		0x1
     29#define LPI_GPIO_KEEPER			0x2
     30#define LPI_GPIO_PULL_UP		0x3
     31#define LPI_GPIO_DS_TO_VAL(v)		(v / 2 - 1)
     32#define LPI_NO_SLEW				-1
     33
     34#define LPI_FUNCTION(fname)			                \
     35	[LPI_MUX_##fname] = {		                \
     36		.name = #fname,				\
     37		.groups = fname##_groups,               \
     38		.ngroups = ARRAY_SIZE(fname##_groups),	\
     39	}
     40
     41#define LPI_PINGROUP(id, soff, f1, f2, f3, f4)		\
     42	{						\
     43		.group.name = "gpio" #id,			\
     44		.group.pins = gpio##id##_pins,		\
     45		.pin = id,				\
     46		.slew_offset = soff,			\
     47		.group.num_pins = ARRAY_SIZE(gpio##id##_pins),	\
     48		.funcs = (int[]){			\
     49			LPI_MUX_gpio,			\
     50			LPI_MUX_##f1,			\
     51			LPI_MUX_##f2,			\
     52			LPI_MUX_##f3,			\
     53			LPI_MUX_##f4,			\
     54		},					\
     55		.nfuncs = 5,				\
     56	}
     57
     58struct lpi_pingroup {
     59	struct group_desc group;
     60	unsigned int pin;
     61	/* Bit offset in slew register for SoundWire pins only */
     62	int slew_offset;
     63	unsigned int *funcs;
     64	unsigned int nfuncs;
     65};
     66
     67struct lpi_function {
     68	const char *name;
     69	const char * const *groups;
     70	unsigned int ngroups;
     71};
     72
     73struct lpi_pinctrl_variant_data {
     74	const struct pinctrl_pin_desc *pins;
     75	int npins;
     76	const struct lpi_pingroup *groups;
     77	int ngroups;
     78	const struct lpi_function *functions;
     79	int nfunctions;
     80	bool is_clk_optional;
     81};
     82
     83int lpi_pinctrl_probe(struct platform_device *pdev);
     84int lpi_pinctrl_remove(struct platform_device *pdev);
     85
     86#endif /*__PINCTRL_LPASS_LPI_H__*/