cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-sc7280-lpass-lpi.c (5481B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
      4 * ALSA SoC platform-machine driver for QTi LPASS
      5 */
      6
      7#include <linux/gpio/driver.h>
      8#include <linux/module.h>
      9#include <linux/platform_device.h>
     10
     11#include "pinctrl-lpass-lpi.h"
     12
     13enum lpass_lpi_functions {
     14	LPI_MUX_dmic1_clk,
     15	LPI_MUX_dmic1_data,
     16	LPI_MUX_dmic2_clk,
     17	LPI_MUX_dmic2_data,
     18	LPI_MUX_dmic3_clk,
     19	LPI_MUX_dmic3_data,
     20	LPI_MUX_i2s1_clk,
     21	LPI_MUX_i2s1_data,
     22	LPI_MUX_i2s1_ws,
     23	LPI_MUX_i2s2_clk,
     24	LPI_MUX_i2s2_data,
     25	LPI_MUX_i2s2_ws,
     26	LPI_MUX_qua_mi2s_data,
     27	LPI_MUX_qua_mi2s_sclk,
     28	LPI_MUX_qua_mi2s_ws,
     29	LPI_MUX_swr_rx_clk,
     30	LPI_MUX_swr_rx_data,
     31	LPI_MUX_swr_tx_clk,
     32	LPI_MUX_swr_tx_data,
     33	LPI_MUX_wsa_swr_clk,
     34	LPI_MUX_wsa_swr_data,
     35	LPI_MUX_gpio,
     36	LPI_MUX__,
     37};
     38
     39static int gpio0_pins[] = { 0 };
     40static int gpio1_pins[] = { 1 };
     41static int gpio2_pins[] = { 2 };
     42static int gpio3_pins[] = { 3 };
     43static int gpio4_pins[] = { 4 };
     44static int gpio5_pins[] = { 5 };
     45static int gpio6_pins[] = { 6 };
     46static int gpio7_pins[] = { 7 };
     47static int gpio8_pins[] = { 8 };
     48static int gpio9_pins[] = { 9 };
     49static int gpio10_pins[] = { 10 };
     50static int gpio11_pins[] = { 11 };
     51static int gpio12_pins[] = { 12 };
     52static int gpio13_pins[] = { 13 };
     53static int gpio14_pins[] = { 14 };
     54
     55static const struct pinctrl_pin_desc sc7280_lpi_pins[] = {
     56	PINCTRL_PIN(0, "gpio0"),
     57	PINCTRL_PIN(1, "gpio1"),
     58	PINCTRL_PIN(2, "gpio2"),
     59	PINCTRL_PIN(3, "gpio3"),
     60	PINCTRL_PIN(4, "gpio4"),
     61	PINCTRL_PIN(5, "gpio5"),
     62	PINCTRL_PIN(6, "gpio6"),
     63	PINCTRL_PIN(7, "gpio7"),
     64	PINCTRL_PIN(8, "gpio8"),
     65	PINCTRL_PIN(9, "gpio9"),
     66	PINCTRL_PIN(10, "gpio10"),
     67	PINCTRL_PIN(11, "gpio11"),
     68	PINCTRL_PIN(12, "gpio12"),
     69	PINCTRL_PIN(13, "gpio13"),
     70	PINCTRL_PIN(14, "gpio14"),
     71};
     72
     73static const char * const swr_tx_clk_groups[] = { "gpio0" };
     74static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio14" };
     75static const char * const swr_rx_clk_groups[] = { "gpio3" };
     76static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" };
     77static const char * const dmic1_clk_groups[] = { "gpio6" };
     78static const char * const dmic1_data_groups[] = { "gpio7" };
     79static const char * const dmic2_clk_groups[] = { "gpio8" };
     80static const char * const dmic2_data_groups[] = { "gpio9" };
     81static const char * const i2s2_clk_groups[] = { "gpio10" };
     82static const char * const i2s2_ws_groups[] = { "gpio11" };
     83static const char * const dmic3_clk_groups[] = { "gpio12" };
     84static const char * const dmic3_data_groups[] = { "gpio13" };
     85static const char * const qua_mi2s_sclk_groups[] = { "gpio0" };
     86static const char * const qua_mi2s_ws_groups[] = { "gpio1" };
     87static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4" };
     88static const char * const i2s1_clk_groups[] = { "gpio6" };
     89static const char * const i2s1_ws_groups[] = { "gpio7" };
     90static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
     91static const char * const wsa_swr_clk_groups[] = { "gpio10" };
     92static const char * const wsa_swr_data_groups[] = { "gpio11" };
     93static const char * const i2s2_data_groups[] = { "gpio12", "gpio13" };
     94
     95static const struct lpi_pingroup sc7280_groups[] = {
     96	LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _),
     97	LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _),
     98	LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _),
     99	LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _),
    100	LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _),
    101	LPI_PINGROUP(5, 12, swr_rx_data, _, _, _),
    102	LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _,  _),
    103	LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _),
    104	LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _),
    105	LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, _, _),
    106	LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _),
    107	LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _),
    108	LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s2_data, _, _),
    109	LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s2_data, _, _),
    110	LPI_PINGROUP(14, 6, swr_tx_data, _, _, _),
    111};
    112
    113static const struct lpi_function sc7280_functions[] = {
    114	LPI_FUNCTION(dmic1_clk),
    115	LPI_FUNCTION(dmic1_data),
    116	LPI_FUNCTION(dmic2_clk),
    117	LPI_FUNCTION(dmic2_data),
    118	LPI_FUNCTION(dmic3_clk),
    119	LPI_FUNCTION(dmic3_data),
    120	LPI_FUNCTION(i2s1_clk),
    121	LPI_FUNCTION(i2s1_data),
    122	LPI_FUNCTION(i2s1_ws),
    123	LPI_FUNCTION(i2s2_clk),
    124	LPI_FUNCTION(i2s2_data),
    125	LPI_FUNCTION(i2s2_ws),
    126	LPI_FUNCTION(qua_mi2s_data),
    127	LPI_FUNCTION(qua_mi2s_sclk),
    128	LPI_FUNCTION(qua_mi2s_ws),
    129	LPI_FUNCTION(swr_rx_clk),
    130	LPI_FUNCTION(swr_rx_data),
    131	LPI_FUNCTION(swr_tx_clk),
    132	LPI_FUNCTION(swr_tx_data),
    133	LPI_FUNCTION(wsa_swr_clk),
    134	LPI_FUNCTION(wsa_swr_data),
    135};
    136
    137static const struct lpi_pinctrl_variant_data sc7280_lpi_data = {
    138	.pins = sc7280_lpi_pins,
    139	.npins = ARRAY_SIZE(sc7280_lpi_pins),
    140	.groups = sc7280_groups,
    141	.ngroups = ARRAY_SIZE(sc7280_groups),
    142	.functions = sc7280_functions,
    143	.nfunctions = ARRAY_SIZE(sc7280_functions),
    144	.is_clk_optional = true,
    145};
    146
    147static const struct of_device_id lpi_pinctrl_of_match[] = {
    148	{
    149	       .compatible = "qcom,sc7280-lpass-lpi-pinctrl",
    150	       .data = &sc7280_lpi_data,
    151	},
    152	{ }
    153};
    154MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match);
    155
    156static struct platform_driver lpi_pinctrl_driver = {
    157	.driver = {
    158		   .name = "qcom-sc7280-lpass-lpi-pinctrl",
    159		   .of_match_table = lpi_pinctrl_of_match,
    160	},
    161	.probe = lpi_pinctrl_probe,
    162	.remove = lpi_pinctrl_remove,
    163};
    164
    165module_platform_driver(lpi_pinctrl_driver);
    166MODULE_DESCRIPTION("QTI SC7280 LPI GPIO pin control driver");
    167MODULE_LICENSE("GPL");