cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-rt305x.c (5126B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2
      3#include <asm/mach-ralink/ralink_regs.h>
      4#include <asm/mach-ralink/rt305x.h>
      5#include <linux/module.h>
      6#include <linux/platform_device.h>
      7#include <linux/of.h>
      8#include "pinctrl-ralink.h"
      9
     10#define RT305X_GPIO_MODE_UART0_SHIFT	2
     11#define RT305X_GPIO_MODE_UART0_MASK	0x7
     12#define RT305X_GPIO_MODE_UART0(x)	((x) << RT305X_GPIO_MODE_UART0_SHIFT)
     13#define RT305X_GPIO_MODE_UARTF		0
     14#define RT305X_GPIO_MODE_PCM_UARTF	1
     15#define RT305X_GPIO_MODE_PCM_I2S	2
     16#define RT305X_GPIO_MODE_I2S_UARTF	3
     17#define RT305X_GPIO_MODE_PCM_GPIO	4
     18#define RT305X_GPIO_MODE_GPIO_UARTF	5
     19#define RT305X_GPIO_MODE_GPIO_I2S	6
     20#define RT305X_GPIO_MODE_GPIO		7
     21
     22#define RT305X_GPIO_MODE_I2C		0
     23#define RT305X_GPIO_MODE_SPI		1
     24#define RT305X_GPIO_MODE_UART1		5
     25#define RT305X_GPIO_MODE_JTAG		6
     26#define RT305X_GPIO_MODE_MDIO		7
     27#define RT305X_GPIO_MODE_SDRAM		8
     28#define RT305X_GPIO_MODE_RGMII		9
     29#define RT5350_GPIO_MODE_PHY_LED	14
     30#define RT5350_GPIO_MODE_SPI_CS1	21
     31#define RT3352_GPIO_MODE_LNA		18
     32#define RT3352_GPIO_MODE_PA		20
     33
     34static struct ralink_pmx_func i2c_func[] =  { FUNC("i2c", 0, 1, 2) };
     35static struct ralink_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) };
     36static struct ralink_pmx_func uartf_func[] = {
     37	FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8),
     38	FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8),
     39	FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8),
     40	FUNC("i2s uartf", RT305X_GPIO_MODE_I2S_UARTF, 7, 8),
     41	FUNC("pcm gpio", RT305X_GPIO_MODE_PCM_GPIO, 11, 4),
     42	FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4),
     43	FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4),
     44};
     45static struct ralink_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) };
     46static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
     47static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) };
     48static struct ralink_pmx_func rt5350_led_func[] = { FUNC("led", 0, 22, 5) };
     49static struct ralink_pmx_func rt5350_cs1_func[] = {
     50	FUNC("spi_cs1", 0, 27, 1),
     51	FUNC("wdg_cs1", 1, 27, 1),
     52};
     53static struct ralink_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 16) };
     54static struct ralink_pmx_func rt3352_rgmii_func[] = {
     55	FUNC("rgmii", 0, 24, 12)
     56};
     57static struct ralink_pmx_func rgmii_func[] = { FUNC("rgmii", 0, 40, 12) };
     58static struct ralink_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) };
     59static struct ralink_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) };
     60static struct ralink_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) };
     61static struct ralink_pmx_func rt3352_cs1_func[] = {
     62	FUNC("spi_cs1", 0, 45, 1),
     63	FUNC("wdg_cs1", 1, 45, 1),
     64};
     65
     66static struct ralink_pmx_group rt3050_pinmux_data[] = {
     67	GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
     68	GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI),
     69	GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK,
     70		RT305X_GPIO_MODE_UART0_SHIFT),
     71	GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1),
     72	GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
     73	GRP("mdio", mdio_func, 1, RT305X_GPIO_MODE_MDIO),
     74	GRP("rgmii", rgmii_func, 1, RT305X_GPIO_MODE_RGMII),
     75	GRP("sdram", sdram_func, 1, RT305X_GPIO_MODE_SDRAM),
     76	{ 0 }
     77};
     78
     79static struct ralink_pmx_group rt3352_pinmux_data[] = {
     80	GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
     81	GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI),
     82	GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK,
     83		RT305X_GPIO_MODE_UART0_SHIFT),
     84	GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1),
     85	GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
     86	GRP("mdio", mdio_func, 1, RT305X_GPIO_MODE_MDIO),
     87	GRP("rgmii", rt3352_rgmii_func, 1, RT305X_GPIO_MODE_RGMII),
     88	GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA),
     89	GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA),
     90	GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
     91	GRP("spi_cs1", rt3352_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
     92	{ 0 }
     93};
     94
     95static struct ralink_pmx_group rt5350_pinmux_data[] = {
     96	GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
     97	GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI),
     98	GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK,
     99		RT305X_GPIO_MODE_UART0_SHIFT),
    100	GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1),
    101	GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
    102	GRP("led", rt5350_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
    103	GRP("spi_cs1", rt5350_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
    104	{ 0 }
    105};
    106
    107static int rt305x_pinctrl_probe(struct platform_device *pdev)
    108{
    109	if (soc_is_rt5350())
    110		return ralink_pinctrl_init(pdev, rt5350_pinmux_data);
    111	else if (soc_is_rt305x() || soc_is_rt3350())
    112		return ralink_pinctrl_init(pdev, rt3050_pinmux_data);
    113	else if (soc_is_rt3352())
    114		return ralink_pinctrl_init(pdev, rt3352_pinmux_data);
    115	else
    116		return -EINVAL;
    117}
    118
    119static const struct of_device_id rt305x_pinctrl_match[] = {
    120	{ .compatible = "ralink,rt305x-pinctrl" },
    121	{}
    122};
    123MODULE_DEVICE_TABLE(of, rt305x_pinctrl_match);
    124
    125static struct platform_driver rt305x_pinctrl_driver = {
    126	.probe = rt305x_pinctrl_probe,
    127	.driver = {
    128		.name = "rt305x-pinctrl",
    129		.of_match_table = rt305x_pinctrl_match,
    130	},
    131};
    132
    133static int __init rt305x_pinctrl_init(void)
    134{
    135	return platform_driver_register(&rt305x_pinctrl_driver);
    136}
    137core_initcall_sync(rt305x_pinctrl_init);