cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-rt3883.c (4103B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2
      3#include <linux/module.h>
      4#include <linux/platform_device.h>
      5#include <linux/of.h>
      6#include "pinctrl-ralink.h"
      7
      8#define RT3883_GPIO_MODE_UART0_SHIFT	2
      9#define RT3883_GPIO_MODE_UART0_MASK	0x7
     10#define RT3883_GPIO_MODE_UART0(x)	((x) << RT3883_GPIO_MODE_UART0_SHIFT)
     11#define RT3883_GPIO_MODE_UARTF		0x0
     12#define RT3883_GPIO_MODE_PCM_UARTF	0x1
     13#define RT3883_GPIO_MODE_PCM_I2S	0x2
     14#define RT3883_GPIO_MODE_I2S_UARTF	0x3
     15#define RT3883_GPIO_MODE_PCM_GPIO	0x4
     16#define RT3883_GPIO_MODE_GPIO_UARTF	0x5
     17#define RT3883_GPIO_MODE_GPIO_I2S	0x6
     18#define RT3883_GPIO_MODE_GPIO		0x7
     19
     20#define RT3883_GPIO_MODE_I2C		0
     21#define RT3883_GPIO_MODE_SPI		1
     22#define RT3883_GPIO_MODE_UART1		5
     23#define RT3883_GPIO_MODE_JTAG		6
     24#define RT3883_GPIO_MODE_MDIO		7
     25#define RT3883_GPIO_MODE_GE1		9
     26#define RT3883_GPIO_MODE_GE2		10
     27
     28#define RT3883_GPIO_MODE_PCI_SHIFT	11
     29#define RT3883_GPIO_MODE_PCI_MASK	0x7
     30#define RT3883_GPIO_MODE_PCI		(RT3883_GPIO_MODE_PCI_MASK << RT3883_GPIO_MODE_PCI_SHIFT)
     31#define RT3883_GPIO_MODE_LNA_A_SHIFT	16
     32#define RT3883_GPIO_MODE_LNA_A_MASK	0x3
     33#define _RT3883_GPIO_MODE_LNA_A(_x)	((_x) << RT3883_GPIO_MODE_LNA_A_SHIFT)
     34#define RT3883_GPIO_MODE_LNA_A_GPIO	0x3
     35#define RT3883_GPIO_MODE_LNA_A		_RT3883_GPIO_MODE_LNA_A(RT3883_GPIO_MODE_LNA_A_MASK)
     36#define RT3883_GPIO_MODE_LNA_G_SHIFT	18
     37#define RT3883_GPIO_MODE_LNA_G_MASK	0x3
     38#define _RT3883_GPIO_MODE_LNA_G(_x)	((_x) << RT3883_GPIO_MODE_LNA_G_SHIFT)
     39#define RT3883_GPIO_MODE_LNA_G_GPIO	0x3
     40#define RT3883_GPIO_MODE_LNA_G		_RT3883_GPIO_MODE_LNA_G(RT3883_GPIO_MODE_LNA_G_MASK)
     41
     42static struct ralink_pmx_func i2c_func[] =  { FUNC("i2c", 0, 1, 2) };
     43static struct ralink_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) };
     44static struct ralink_pmx_func uartf_func[] = {
     45	FUNC("uartf", RT3883_GPIO_MODE_UARTF, 7, 8),
     46	FUNC("pcm uartf", RT3883_GPIO_MODE_PCM_UARTF, 7, 8),
     47	FUNC("pcm i2s", RT3883_GPIO_MODE_PCM_I2S, 7, 8),
     48	FUNC("i2s uartf", RT3883_GPIO_MODE_I2S_UARTF, 7, 8),
     49	FUNC("pcm gpio", RT3883_GPIO_MODE_PCM_GPIO, 11, 4),
     50	FUNC("gpio uartf", RT3883_GPIO_MODE_GPIO_UARTF, 7, 4),
     51	FUNC("gpio i2s", RT3883_GPIO_MODE_GPIO_I2S, 7, 4),
     52};
     53static struct ralink_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) };
     54static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
     55static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) };
     56static struct ralink_pmx_func lna_a_func[] = { FUNC("lna a", 0, 32, 3) };
     57static struct ralink_pmx_func lna_g_func[] = { FUNC("lna g", 0, 35, 3) };
     58static struct ralink_pmx_func pci_func[] = {
     59	FUNC("pci-dev", 0, 40, 32),
     60	FUNC("pci-host2", 1, 40, 32),
     61	FUNC("pci-host1", 2, 40, 32),
     62	FUNC("pci-fnc", 3, 40, 32)
     63};
     64static struct ralink_pmx_func ge1_func[] = { FUNC("ge1", 0, 72, 12) };
     65static struct ralink_pmx_func ge2_func[] = { FUNC("ge2", 0, 84, 12) };
     66
     67static struct ralink_pmx_group rt3883_pinmux_data[] = {
     68	GRP("i2c", i2c_func, 1, RT3883_GPIO_MODE_I2C),
     69	GRP("spi", spi_func, 1, RT3883_GPIO_MODE_SPI),
     70	GRP("uartf", uartf_func, RT3883_GPIO_MODE_UART0_MASK,
     71		RT3883_GPIO_MODE_UART0_SHIFT),
     72	GRP("uartlite", uartlite_func, 1, RT3883_GPIO_MODE_UART1),
     73	GRP("jtag", jtag_func, 1, RT3883_GPIO_MODE_JTAG),
     74	GRP("mdio", mdio_func, 1, RT3883_GPIO_MODE_MDIO),
     75	GRP("lna a", lna_a_func, 1, RT3883_GPIO_MODE_LNA_A),
     76	GRP("lna g", lna_g_func, 1, RT3883_GPIO_MODE_LNA_G),
     77	GRP("pci", pci_func, RT3883_GPIO_MODE_PCI_MASK,
     78		RT3883_GPIO_MODE_PCI_SHIFT),
     79	GRP("ge1", ge1_func, 1, RT3883_GPIO_MODE_GE1),
     80	GRP("ge2", ge2_func, 1, RT3883_GPIO_MODE_GE2),
     81	{ 0 }
     82};
     83
     84static int rt3883_pinctrl_probe(struct platform_device *pdev)
     85{
     86	return ralink_pinctrl_init(pdev, rt3883_pinmux_data);
     87}
     88
     89static const struct of_device_id rt3883_pinctrl_match[] = {
     90	{ .compatible = "ralink,rt3883-pinctrl" },
     91	{}
     92};
     93MODULE_DEVICE_TABLE(of, rt3883_pinctrl_match);
     94
     95static struct platform_driver rt3883_pinctrl_driver = {
     96	.probe = rt3883_pinctrl_probe,
     97	.driver = {
     98		.name = "rt3883-pinctrl",
     99		.of_match_table = rt3883_pinctrl_match,
    100	},
    101};
    102
    103static int __init rt3883_pinctrl_init(void)
    104{
    105	return platform_driver_register(&rt3883_pinctrl_driver);
    106}
    107core_initcall_sync(rt3883_pinctrl_init);