cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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Kconfig (1334B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2#
      3# ST Microelectronics SPEAr PINCTRL drivers
      4#
      5
      6if PLAT_SPEAR
      7
      8config PINCTRL_SPEAR
      9	bool
     10	depends on OF
     11	select PINMUX
     12	help
     13	  This enables pin control drivers for SPEAr Platform
     14
     15config PINCTRL_SPEAR3XX
     16	bool
     17	depends on ARCH_SPEAR3XX
     18	select PINCTRL_SPEAR
     19
     20config PINCTRL_SPEAR300
     21	bool "ST Microelectronics SPEAr300 SoC pin controller driver"
     22	depends on MACH_SPEAR300
     23	select PINCTRL_SPEAR3XX
     24
     25config PINCTRL_SPEAR310
     26	bool "ST Microelectronics SPEAr310 SoC pin controller driver"
     27	depends on MACH_SPEAR310
     28	select PINCTRL_SPEAR3XX
     29	select PINCTRL_SPEAR_PLGPIO
     30
     31config PINCTRL_SPEAR320
     32	bool "ST Microelectronics SPEAr320 SoC pin controller driver"
     33	depends on MACH_SPEAR320
     34	select PINCTRL_SPEAR3XX
     35	select PINCTRL_SPEAR_PLGPIO
     36
     37config PINCTRL_SPEAR1310
     38	bool "ST Microelectronics SPEAr1310 SoC pin controller driver"
     39	depends on MACH_SPEAR1310
     40	select PINCTRL_SPEAR
     41	select PINCTRL_SPEAR_PLGPIO
     42
     43config PINCTRL_SPEAR1340
     44	bool "ST Microelectronics SPEAr1340 SoC pin controller driver"
     45	depends on MACH_SPEAR1340
     46	select PINCTRL_SPEAR
     47	select PINCTRL_SPEAR_PLGPIO
     48
     49config PINCTRL_SPEAR_PLGPIO
     50	bool "SPEAr SoC PLGPIO Controller"
     51	depends on GPIOLIB && PINCTRL_SPEAR
     52	select GPIOLIB_IRQCHIP
     53	help
     54	  Say yes here to support PLGPIO controller on ST Microelectronics SPEAr
     55	  SoCs.
     56
     57endif