cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-sprd.h (1453B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Driver header file for pin controller driver
      4 * Copyright (C) 2017 Spreadtrum  - http://www.spreadtrum.com
      5 */
      6
      7#ifndef __PINCTRL_SPRD_H__
      8#define __PINCTRL_SPRD_H__
      9
     10struct platform_device;
     11
     12#define NUM_OFFSET	(20)
     13#define TYPE_OFFSET	(16)
     14#define BIT_OFFSET	(8)
     15#define WIDTH_OFFSET	(4)
     16
     17#define SPRD_PIN_INFO(num, type, offset, width, reg)	\
     18		(((num) & 0xFFF) << NUM_OFFSET |	\
     19		 ((type) & 0xF) << TYPE_OFFSET |	\
     20		 ((offset) & 0xFF) << BIT_OFFSET |	\
     21		 ((width) & 0xF) << WIDTH_OFFSET |	\
     22		 ((reg) & 0xF))
     23
     24#define SPRD_PINCTRL_PIN(pin)	SPRD_PINCTRL_PIN_DATA(pin, #pin)
     25
     26#define SPRD_PINCTRL_PIN_DATA(a, b)				\
     27	{							\
     28		.name = b,					\
     29		.num = (((a) >> NUM_OFFSET) & 0xfff),		\
     30		.type = (((a) >> TYPE_OFFSET) & 0xf),		\
     31		.bit_offset = (((a) >> BIT_OFFSET) & 0xff),	\
     32		.bit_width = ((a) >> WIDTH_OFFSET & 0xf),	\
     33		.reg = ((a) & 0xf)				\
     34	}
     35
     36enum pin_type {
     37	GLOBAL_CTRL_PIN,
     38	COMMON_PIN,
     39	MISC_PIN,
     40};
     41
     42struct sprd_pins_info {
     43	const char *name;
     44	unsigned int num;
     45	enum pin_type type;
     46
     47	/* for global control pins configuration */
     48	unsigned long bit_offset;
     49	unsigned long bit_width;
     50	unsigned int reg;
     51};
     52
     53int sprd_pinctrl_core_probe(struct platform_device *pdev,
     54			    struct sprd_pins_info *sprd_soc_pin_info,
     55			    int pins_cnt);
     56int sprd_pinctrl_remove(struct platform_device *pdev);
     57void sprd_pinctrl_shutdown(struct platform_device *pdev);
     58
     59#endif /* __PINCTRL_SPRD_H__ */