cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

rs780e-acpi.c (4020B)

      1// SPDX-License-Identifier: GPL-2.0
      2#include <linux/io.h>
      3#include <linux/init.h>
      4#include <linux/ioport.h>
      5#include <linux/export.h>
      6#include <linux/of.h>
      7#include <linux/platform_device.h>
      8
      9static unsigned long acpi_iobase;
     10
     11#define ACPI_PM_EVT_BLK         (acpi_iobase + 0x00) /* 4 bytes */
     12#define ACPI_PM_CNT_BLK         (acpi_iobase + 0x04) /* 2 bytes */
     13#define ACPI_PMA_CNT_BLK        (acpi_iobase + 0x0F) /* 1 byte */
     14#define ACPI_PM_TMR_BLK         (acpi_iobase + 0x18) /* 4 bytes */
     15#define ACPI_GPE0_BLK           (acpi_iobase + 0x10) /* 8 bytes */
     16#define ACPI_END                (acpi_iobase + 0x80)
     17
     18#define PM_INDEX        0xCD6
     19#define PM_DATA         0xCD7
     20#define PM2_INDEX       0xCD0
     21#define PM2_DATA        0xCD1
     22
     23static void pmio_write_index(u16 index, u8 reg, u8 value)
     24{
     25	outb(reg, index);
     26	outb(value, index + 1);
     27}
     28
     29static u8 pmio_read_index(u16 index, u8 reg)
     30{
     31	outb(reg, index);
     32	return inb(index + 1);
     33}
     34
     35void pm_iowrite(u8 reg, u8 value)
     36{
     37	pmio_write_index(PM_INDEX, reg, value);
     38}
     39EXPORT_SYMBOL(pm_iowrite);
     40
     41u8 pm_ioread(u8 reg)
     42{
     43	return pmio_read_index(PM_INDEX, reg);
     44}
     45EXPORT_SYMBOL(pm_ioread);
     46
     47void pm2_iowrite(u8 reg, u8 value)
     48{
     49	pmio_write_index(PM2_INDEX, reg, value);
     50}
     51EXPORT_SYMBOL(pm2_iowrite);
     52
     53u8 pm2_ioread(u8 reg)
     54{
     55	return pmio_read_index(PM2_INDEX, reg);
     56}
     57EXPORT_SYMBOL(pm2_ioread);
     58
     59static void acpi_hw_clear_status(void)
     60{
     61	u16 value;
     62
     63	/* PMStatus: Clear WakeStatus/PwrBtnStatus */
     64	value = inw(ACPI_PM_EVT_BLK);
     65	value |= (1 << 8 | 1 << 15);
     66	outw(value, ACPI_PM_EVT_BLK);
     67
     68	/* GPEStatus: Clear all generated events */
     69	outl(inl(ACPI_GPE0_BLK), ACPI_GPE0_BLK);
     70}
     71
     72static void acpi_registers_setup(void)
     73{
     74	u32 value;
     75
     76	/* PM Status Base */
     77	pm_iowrite(0x20, ACPI_PM_EVT_BLK & 0xff);
     78	pm_iowrite(0x21, ACPI_PM_EVT_BLK >> 8);
     79
     80	/* PM Control Base */
     81	pm_iowrite(0x22, ACPI_PM_CNT_BLK & 0xff);
     82	pm_iowrite(0x23, ACPI_PM_CNT_BLK >> 8);
     83
     84	/* GPM Base */
     85	pm_iowrite(0x28, ACPI_GPE0_BLK & 0xff);
     86	pm_iowrite(0x29, ACPI_GPE0_BLK >> 8);
     87
     88	/* ACPI End */
     89	pm_iowrite(0x2e, ACPI_END & 0xff);
     90	pm_iowrite(0x2f, ACPI_END >> 8);
     91
     92	/* IO Decode: When AcpiDecodeEnable set, South-Bridge uses the contents
     93	 * of the PM registers at index 0x20~0x2B to decode ACPI I/O address. */
     94	pm_iowrite(0x0e, 1 << 3);
     95
     96	/* SCI_EN set */
     97	outw(1, ACPI_PM_CNT_BLK);
     98
     99	/* Enable to generate SCI */
    100	pm_iowrite(0x10, pm_ioread(0x10) | 1);
    101
    102	/* GPM3/GPM9 enable */
    103	value = inl(ACPI_GPE0_BLK + 4);
    104	outl(value | (1 << 14) | (1 << 22), ACPI_GPE0_BLK + 4);
    105
    106	/* Set GPM9 as input */
    107	pm_iowrite(0x8d, pm_ioread(0x8d) & (~(1 << 1)));
    108
    109	/* Set GPM9 as non-output */
    110	pm_iowrite(0x94, pm_ioread(0x94) | (1 << 3));
    111
    112	/* GPM3 config ACPI trigger SCIOUT */
    113	pm_iowrite(0x33, pm_ioread(0x33) & (~(3 << 4)));
    114
    115	/* GPM9 config ACPI trigger SCIOUT */
    116	pm_iowrite(0x3d, pm_ioread(0x3d) & (~(3 << 2)));
    117
    118	/* GPM3 config falling edge trigger */
    119	pm_iowrite(0x37, pm_ioread(0x37) & (~(1 << 6)));
    120
    121	/* No wait for STPGNT# in ACPI Sx state */
    122	pm_iowrite(0x7c, pm_ioread(0x7c) | (1 << 6));
    123
    124	/* Set GPM3 pull-down enable */
    125	value = pm2_ioread(0xf6);
    126	value |= ((1 << 7) | (1 << 3));
    127	pm2_iowrite(0xf6, value);
    128
    129	/* Set GPM9 pull-down enable */
    130	value = pm2_ioread(0xf8);
    131	value |= ((1 << 5) | (1 << 1));
    132	pm2_iowrite(0xf8, value);
    133}
    134
    135static int rs780e_acpi_probe(struct platform_device *pdev)
    136{
    137	struct resource *res;
    138
    139	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
    140	if (!res)
    141		return -ENODEV;
    142
    143	/* SCI interrupt need acpi space, allocate here */
    144	if (!request_region(res->start, resource_size(res), "acpi")) {
    145		pr_err("RS780E-ACPI: Failed to request IO Region\n");
    146		return -EBUSY;
    147	}
    148
    149	acpi_iobase = res->start;
    150
    151	acpi_registers_setup();
    152	acpi_hw_clear_status();
    153
    154	return 0;
    155}
    156
    157static const struct of_device_id rs780e_acpi_match[] = {
    158	{ .compatible = "loongson,rs780e-acpi" },
    159	{},
    160};
    161
    162static struct platform_driver rs780e_acpi_driver = {
    163	.probe = rs780e_acpi_probe,
    164	.driver = {
    165		.name = "RS780E-ACPI",
    166		.of_match_table = rs780e_acpi_match,
    167	},
    168};
    169builtin_platform_driver(rs780e_acpi_driver);