cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pwm-lpss-pci.c (3014B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Intel Low Power Subsystem PWM controller PCI driver
      4 *
      5 * Copyright (C) 2014, Intel Corporation
      6 *
      7 * Derived from the original pwm-lpss.c
      8 */
      9
     10#include <linux/kernel.h>
     11#include <linux/module.h>
     12#include <linux/pci.h>
     13#include <linux/pm_runtime.h>
     14
     15#include "pwm-lpss.h"
     16
     17/* BayTrail */
     18static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
     19	.clk_rate = 25000000,
     20	.npwm = 1,
     21	.base_unit_bits = 16,
     22};
     23
     24/* Braswell */
     25static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
     26	.clk_rate = 19200000,
     27	.npwm = 1,
     28	.base_unit_bits = 16,
     29};
     30
     31/* Broxton */
     32static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
     33	.clk_rate = 19200000,
     34	.npwm = 4,
     35	.base_unit_bits = 22,
     36	.bypass = true,
     37};
     38
     39/* Tangier */
     40static const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
     41	.clk_rate = 19200000,
     42	.npwm = 4,
     43	.base_unit_bits = 22,
     44};
     45
     46static int pwm_lpss_probe_pci(struct pci_dev *pdev,
     47			      const struct pci_device_id *id)
     48{
     49	const struct pwm_lpss_boardinfo *info;
     50	struct pwm_lpss_chip *lpwm;
     51	int err;
     52
     53	err = pcim_enable_device(pdev);
     54	if (err < 0)
     55		return err;
     56
     57	info = (struct pwm_lpss_boardinfo *)id->driver_data;
     58	lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info);
     59	if (IS_ERR(lpwm))
     60		return PTR_ERR(lpwm);
     61
     62	pci_set_drvdata(pdev, lpwm);
     63
     64	pm_runtime_put(&pdev->dev);
     65	pm_runtime_allow(&pdev->dev);
     66
     67	return 0;
     68}
     69
     70static void pwm_lpss_remove_pci(struct pci_dev *pdev)
     71{
     72	pm_runtime_forbid(&pdev->dev);
     73	pm_runtime_get_sync(&pdev->dev);
     74}
     75
     76#ifdef CONFIG_PM
     77static int pwm_lpss_runtime_suspend_pci(struct device *dev)
     78{
     79	/*
     80	 * The PCI core will handle transition to D3 automatically. We only
     81	 * need to provide runtime PM hooks for that to happen.
     82	 */
     83	return 0;
     84}
     85
     86static int pwm_lpss_runtime_resume_pci(struct device *dev)
     87{
     88	return 0;
     89}
     90#endif
     91
     92static const struct dev_pm_ops pwm_lpss_pci_pm = {
     93	SET_RUNTIME_PM_OPS(pwm_lpss_runtime_suspend_pci,
     94			   pwm_lpss_runtime_resume_pci, NULL)
     95};
     96
     97static const struct pci_device_id pwm_lpss_pci_ids[] = {
     98	{ PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info},
     99	{ PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&pwm_lpss_byt_info},
    100	{ PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&pwm_lpss_byt_info},
    101	{ PCI_VDEVICE(INTEL, 0x11a5), (unsigned long)&pwm_lpss_tng_info},
    102	{ PCI_VDEVICE(INTEL, 0x1ac8), (unsigned long)&pwm_lpss_bxt_info},
    103	{ PCI_VDEVICE(INTEL, 0x2288), (unsigned long)&pwm_lpss_bsw_info},
    104	{ PCI_VDEVICE(INTEL, 0x2289), (unsigned long)&pwm_lpss_bsw_info},
    105	{ PCI_VDEVICE(INTEL, 0x31c8), (unsigned long)&pwm_lpss_bxt_info},
    106	{ PCI_VDEVICE(INTEL, 0x5ac8), (unsigned long)&pwm_lpss_bxt_info},
    107	{ },
    108};
    109MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids);
    110
    111static struct pci_driver pwm_lpss_driver_pci = {
    112	.name = "pwm-lpss",
    113	.id_table = pwm_lpss_pci_ids,
    114	.probe = pwm_lpss_probe_pci,
    115	.remove = pwm_lpss_remove_pci,
    116	.driver = {
    117		.pm = &pwm_lpss_pci_pm,
    118	},
    119};
    120module_pci_driver(pwm_lpss_driver_pci);
    121
    122MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS");
    123MODULE_LICENSE("GPL v2");