cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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pv88080-regulator.h (3502B)


      1/* SPDX-License-Identifier: GPL-2.0+ */
      2/*
      3 * pv88080-regulator.h - Regulator definitions for PV88080
      4 * Copyright (C) 2016 Powerventure Semiconductor Ltd.
      5 */
      6
      7#ifndef __PV88080_REGISTERS_H__
      8#define __PV88080_REGISTERS_H__
      9
     10/* System Control and Event Registers */
     11#define	PV88080_REG_EVENT_A				0x04
     12#define	PV88080_REG_MASK_A				0x09
     13#define	PV88080_REG_MASK_B				0x0A
     14#define	PV88080_REG_MASK_C				0x0B
     15
     16/* Regulator Registers - rev. AA */
     17#define PV88080AA_REG_HVBUCK_CONF1		0x2D
     18#define PV88080AA_REG_HVBUCK_CONF2		0x2E
     19#define	PV88080AA_REG_BUCK1_CONF0		0x27
     20#define	PV88080AA_REG_BUCK1_CONF1		0x28
     21#define	PV88080AA_REG_BUCK1_CONF2		0x59
     22#define	PV88080AA_REG_BUCK1_CONF5		0x5C
     23#define	PV88080AA_REG_BUCK2_CONF0		0x29
     24#define	PV88080AA_REG_BUCK2_CONF1		0x2A
     25#define	PV88080AA_REG_BUCK2_CONF2		0x61
     26#define	PV88080AA_REG_BUCK2_CONF5		0x64
     27#define	PV88080AA_REG_BUCK3_CONF0		0x2B
     28#define	PV88080AA_REG_BUCK3_CONF1		0x2C
     29#define	PV88080AA_REG_BUCK3_CONF2		0x69
     30#define	PV88080AA_REG_BUCK3_CONF5		0x6C
     31
     32/* Regulator Registers - rev. BA */
     33#define	PV88080BA_REG_HVBUCK_CONF1		0x33
     34#define	PV88080BA_REG_HVBUCK_CONF2		0x34
     35#define	PV88080BA_REG_BUCK1_CONF0		0x2A
     36#define	PV88080BA_REG_BUCK1_CONF1		0x2C
     37#define	PV88080BA_REG_BUCK1_CONF2		0x5A
     38#define	PV88080BA_REG_BUCK1_CONF5		0x5D
     39#define	PV88080BA_REG_BUCK2_CONF0		0x2D
     40#define	PV88080BA_REG_BUCK2_CONF1		0x2F
     41#define	PV88080BA_REG_BUCK2_CONF2		0x63
     42#define	PV88080BA_REG_BUCK2_CONF5		0x66
     43#define	PV88080BA_REG_BUCK3_CONF0		0x30
     44#define	PV88080BA_REG_BUCK3_CONF1		0x32
     45#define	PV88080BA_REG_BUCK3_CONF2		0x6C
     46#define	PV88080BA_REG_BUCK3_CONF5		0x6F
     47
     48/* PV88080_REG_EVENT_A (addr=0x04) */
     49#define	PV88080_E_VDD_FLT				0x01
     50#define	PV88080_E_OVER_TEMP				0x02
     51
     52/* PV88080_REG_MASK_A (addr=0x09) */
     53#define	PV88080_M_VDD_FLT				0x01
     54#define	PV88080_M_OVER_TEMP				0x02
     55
     56/* PV88080_REG_BUCK1_CONF0 (addr=0x27|0x2A) */
     57#define	PV88080_BUCK1_EN				0x80
     58#define PV88080_VBUCK1_MASK				0x7F
     59
     60/* PV88080_REG_BUCK2_CONF0 (addr=0x29|0x2D) */
     61#define	PV88080_BUCK2_EN				0x80
     62#define PV88080_VBUCK2_MASK				0x7F
     63
     64/* PV88080_REG_BUCK3_CONF0 (addr=0x2B|0x30) */
     65#define	PV88080_BUCK3_EN				0x80
     66#define PV88080_VBUCK3_MASK				0x7F
     67
     68/* PV88080_REG_BUCK1_CONF1 (addr=0x28|0x2C) */
     69#define PV88080_BUCK1_ILIM_SHIFT		2
     70#define PV88080_BUCK1_ILIM_MASK			0x0C
     71#define PV88080_BUCK1_MODE_MASK			0x03
     72
     73/* PV88080_REG_BUCK2_CONF1 (addr=0x2A|0x2F) */
     74#define PV88080_BUCK2_ILIM_SHIFT		2
     75#define PV88080_BUCK2_ILIM_MASK			0x0C
     76#define PV88080_BUCK2_MODE_MASK			0x03
     77
     78/* PV88080_REG_BUCK3_CONF1 (addr=0x2C|0x32) */
     79#define PV88080_BUCK3_ILIM_SHIFT		2
     80#define PV88080_BUCK3_ILIM_MASK			0x0C
     81#define PV88080_BUCK3_MODE_MASK			0x03
     82
     83#define	PV88080_BUCK_MODE_SLEEP			0x00
     84#define	PV88080_BUCK_MODE_AUTO			0x01
     85#define	PV88080_BUCK_MODE_SYNC			0x02
     86
     87/* PV88080_REG_HVBUCK_CONF1 (addr=0x2D|0x33) */
     88#define PV88080_VHVBUCK_MASK			0xFF
     89
     90/* PV88080_REG_HVBUCK_CONF1 (addr=0x2E|0x34) */
     91#define PV88080_HVBUCK_EN				0x01
     92
     93/* PV88080_REG_BUCK2_CONF2 (addr=0x61|0x63) */
     94/* PV88080_REG_BUCK3_CONF2 (addr=0x69|0x6C) */
     95#define PV88080_BUCK_VDAC_RANGE_SHIFT	7
     96#define PV88080_BUCK_VDAC_RANGE_MASK	0x01
     97
     98#define PV88080_BUCK_VDAC_RANGE_1		0x00
     99#define PV88080_BUCK_VDAC_RANGE_2		0x01
    100
    101/* PV88080_REG_BUCK2_CONF5 (addr=0x64|0x66) */
    102/* PV88080_REG_BUCK3_CONF5 (addr=0x6C|0x6F) */
    103#define PV88080_BUCK_VRANGE_GAIN_SHIFT	0
    104#define PV88080_BUCK_VRANGE_GAIN_MASK	0x01
    105
    106#define PV88080_BUCK_VRANGE_GAIN_1		0x00
    107#define PV88080_BUCK_VRANGE_GAIN_2		0x01
    108
    109#endif	/* __PV88080_REGISTERS_H__ */