cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rtc-ds2404.c (5949B)


      1// SPDX-License-Identifier: GPL-2.0
      2// Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
      3
      4#include <linux/platform_device.h>
      5#include <linux/module.h>
      6#include <linux/init.h>
      7#include <linux/rtc.h>
      8#include <linux/types.h>
      9#include <linux/bcd.h>
     10#include <linux/platform_data/rtc-ds2404.h>
     11#include <linux/delay.h>
     12#include <linux/gpio.h>
     13#include <linux/slab.h>
     14
     15#include <linux/io.h>
     16
     17#define DS2404_STATUS_REG 0x200
     18#define DS2404_CONTROL_REG 0x201
     19#define DS2404_RTC_REG 0x202
     20
     21#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
     22#define DS2404_READ_SCRATCHPAD_CMD 0xaa
     23#define DS2404_COPY_SCRATCHPAD_CMD 0x55
     24#define DS2404_READ_MEMORY_CMD 0xf0
     25
     26#define DS2404_RST	0
     27#define DS2404_CLK	1
     28#define DS2404_DQ	2
     29
     30struct ds2404_gpio {
     31	const char *name;
     32	unsigned int gpio;
     33};
     34
     35struct ds2404 {
     36	struct ds2404_gpio *gpio;
     37	struct rtc_device *rtc;
     38};
     39
     40static struct ds2404_gpio ds2404_gpio[] = {
     41	{ "RTC RST", 0 },
     42	{ "RTC CLK", 0 },
     43	{ "RTC DQ", 0 },
     44};
     45
     46static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev,
     47			  struct ds2404_platform_data *pdata)
     48{
     49	int i, err;
     50
     51	ds2404_gpio[DS2404_RST].gpio = pdata->gpio_rst;
     52	ds2404_gpio[DS2404_CLK].gpio = pdata->gpio_clk;
     53	ds2404_gpio[DS2404_DQ].gpio = pdata->gpio_dq;
     54
     55	for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++) {
     56		err = gpio_request(ds2404_gpio[i].gpio, ds2404_gpio[i].name);
     57		if (err) {
     58			dev_err(&pdev->dev, "error mapping gpio %s: %d\n",
     59				ds2404_gpio[i].name, err);
     60			goto err_request;
     61		}
     62		if (i != DS2404_DQ)
     63			gpio_direction_output(ds2404_gpio[i].gpio, 1);
     64	}
     65
     66	chip->gpio = ds2404_gpio;
     67	return 0;
     68
     69err_request:
     70	while (--i >= 0)
     71		gpio_free(ds2404_gpio[i].gpio);
     72	return err;
     73}
     74
     75static void ds2404_gpio_unmap(void *data)
     76{
     77	int i;
     78
     79	for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++)
     80		gpio_free(ds2404_gpio[i].gpio);
     81}
     82
     83static void ds2404_reset(struct device *dev)
     84{
     85	gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 0);
     86	udelay(1000);
     87	gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 1);
     88	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
     89	gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 0);
     90	udelay(10);
     91}
     92
     93static void ds2404_write_byte(struct device *dev, u8 byte)
     94{
     95	int i;
     96
     97	gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 1);
     98	for (i = 0; i < 8; i++) {
     99		gpio_set_value(ds2404_gpio[DS2404_DQ].gpio, byte & (1 << i));
    100		udelay(10);
    101		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
    102		udelay(10);
    103		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
    104		udelay(10);
    105	}
    106}
    107
    108static u8 ds2404_read_byte(struct device *dev)
    109{
    110	int i;
    111	u8 ret = 0;
    112
    113	gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
    114
    115	for (i = 0; i < 8; i++) {
    116		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
    117		udelay(10);
    118		if (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
    119			ret |= 1 << i;
    120		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
    121		udelay(10);
    122	}
    123	return ret;
    124}
    125
    126static void ds2404_read_memory(struct device *dev, u16 offset,
    127			       int length, u8 *out)
    128{
    129	ds2404_reset(dev);
    130	ds2404_write_byte(dev, DS2404_READ_MEMORY_CMD);
    131	ds2404_write_byte(dev, offset & 0xff);
    132	ds2404_write_byte(dev, (offset >> 8) & 0xff);
    133	while (length--)
    134		*out++ = ds2404_read_byte(dev);
    135}
    136
    137static void ds2404_write_memory(struct device *dev, u16 offset,
    138				int length, u8 *out)
    139{
    140	int i;
    141	u8 ta01, ta02, es;
    142
    143	ds2404_reset(dev);
    144	ds2404_write_byte(dev, DS2404_WRITE_SCRATCHPAD_CMD);
    145	ds2404_write_byte(dev, offset & 0xff);
    146	ds2404_write_byte(dev, (offset >> 8) & 0xff);
    147
    148	for (i = 0; i < length; i++)
    149		ds2404_write_byte(dev, out[i]);
    150
    151	ds2404_reset(dev);
    152	ds2404_write_byte(dev, DS2404_READ_SCRATCHPAD_CMD);
    153
    154	ta01 = ds2404_read_byte(dev);
    155	ta02 = ds2404_read_byte(dev);
    156	es = ds2404_read_byte(dev);
    157
    158	for (i = 0; i < length; i++) {
    159		if (out[i] != ds2404_read_byte(dev)) {
    160			dev_err(dev, "read invalid data\n");
    161			return;
    162		}
    163	}
    164
    165	ds2404_reset(dev);
    166	ds2404_write_byte(dev, DS2404_COPY_SCRATCHPAD_CMD);
    167	ds2404_write_byte(dev, ta01);
    168	ds2404_write_byte(dev, ta02);
    169	ds2404_write_byte(dev, es);
    170
    171	gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
    172	while (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
    173		;
    174}
    175
    176static void ds2404_enable_osc(struct device *dev)
    177{
    178	u8 in[1] = { 0x10 }; /* enable oscillator */
    179	ds2404_write_memory(dev, 0x201, 1, in);
    180}
    181
    182static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
    183{
    184	unsigned long time = 0;
    185	__le32 hw_time = 0;
    186
    187	ds2404_read_memory(dev, 0x203, 4, (u8 *)&hw_time);
    188	time = le32_to_cpu(hw_time);
    189
    190	rtc_time64_to_tm(time, dt);
    191	return 0;
    192}
    193
    194static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
    195{
    196	u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
    197	ds2404_write_memory(dev, 0x203, 4, (u8 *)&time);
    198	return 0;
    199}
    200
    201static const struct rtc_class_ops ds2404_rtc_ops = {
    202	.read_time	= ds2404_read_time,
    203	.set_time	= ds2404_set_time,
    204};
    205
    206static int rtc_probe(struct platform_device *pdev)
    207{
    208	struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
    209	struct ds2404 *chip;
    210	int retval = -EBUSY;
    211
    212	chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
    213	if (!chip)
    214		return -ENOMEM;
    215
    216	chip->rtc = devm_rtc_allocate_device(&pdev->dev);
    217	if (IS_ERR(chip->rtc))
    218		return PTR_ERR(chip->rtc);
    219
    220	retval = ds2404_gpio_map(chip, pdev, pdata);
    221	if (retval)
    222		return retval;
    223
    224	retval = devm_add_action_or_reset(&pdev->dev, ds2404_gpio_unmap, chip);
    225	if (retval)
    226		return retval;
    227
    228	dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
    229		 chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
    230		 chip->gpio[DS2404_DQ].gpio);
    231
    232	platform_set_drvdata(pdev, chip);
    233
    234	chip->rtc->ops = &ds2404_rtc_ops;
    235	chip->rtc->range_max = U32_MAX;
    236
    237	retval = devm_rtc_register_device(chip->rtc);
    238	if (retval)
    239		return retval;
    240
    241	ds2404_enable_osc(&pdev->dev);
    242	return 0;
    243}
    244
    245static struct platform_driver rtc_device_driver = {
    246	.probe	= rtc_probe,
    247	.driver = {
    248		.name	= "ds2404",
    249	},
    250};
    251module_platform_driver(rtc_device_driver);
    252
    253MODULE_DESCRIPTION("DS2404 RTC");
    254MODULE_AUTHOR("Sven Schnelle");
    255MODULE_LICENSE("GPL");
    256MODULE_ALIAS("platform:ds2404");