cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cio.h (4485B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef S390_CIO_H
      3#define S390_CIO_H
      4
      5#include <linux/mutex.h>
      6#include <linux/device.h>
      7#include <linux/mod_devicetable.h>
      8#include <asm/chpid.h>
      9#include <asm/cio.h>
     10#include <asm/fcx.h>
     11#include <asm/schid.h>
     12#include <asm/tpi.h>
     13#include "chsc.h"
     14
     15/*
     16 * path management control word
     17 */
     18struct pmcw {
     19	u32 intparm;		/* interruption parameter */
     20	u32 qf	 : 1;		/* qdio facility */
     21	u32 w	 : 1;
     22	u32 isc  : 3;		/* interruption sublass */
     23	u32 res5 : 3;		/* reserved zeros */
     24	u32 ena  : 1;		/* enabled */
     25	u32 lm	 : 2;		/* limit mode */
     26	u32 mme  : 2;		/* measurement-mode enable */
     27	u32 mp	 : 1;		/* multipath mode */
     28	u32 tf	 : 1;		/* timing facility */
     29	u32 dnv  : 1;		/* device number valid */
     30	u32 dev  : 16;		/* device number */
     31	u8  lpm;		/* logical path mask */
     32	u8  pnom;		/* path not operational mask */
     33	u8  lpum;		/* last path used mask */
     34	u8  pim;		/* path installed mask */
     35	u16 mbi;		/* measurement-block index */
     36	u8  pom;		/* path operational mask */
     37	u8  pam;		/* path available mask */
     38	u8  chpid[8];		/* CHPID 0-7 (if available) */
     39	u32 unused1 : 8;	/* reserved zeros */
     40	u32 st	    : 3;	/* subchannel type */
     41	u32 unused2 : 18;	/* reserved zeros */
     42	u32 mbfc    : 1;	/* measurement block format control */
     43	u32 xmwme   : 1;	/* extended measurement word mode enable */
     44	u32 csense  : 1;	/* concurrent sense; can be enabled ...*/
     45				/*  ... per MSCH, however, if facility */
     46				/*  ... is not installed, this results */
     47				/*  ... in an operand exception.       */
     48} __attribute__ ((packed));
     49
     50/* Target SCHIB configuration. */
     51struct schib_config {
     52	u64 mba;
     53	u32 intparm;
     54	u16 mbi;
     55	u32 isc:3;
     56	u32 ena:1;
     57	u32 mme:2;
     58	u32 mp:1;
     59	u32 csense:1;
     60	u32 mbfc:1;
     61} __attribute__ ((packed));
     62
     63/*
     64 * subchannel information block
     65 */
     66struct schib {
     67	struct pmcw pmcw;	 /* path management control word */
     68	union scsw scsw;	 /* subchannel status word */
     69	__u64 mba;               /* measurement block address */
     70	__u8 mda[4];		 /* model dependent area */
     71} __attribute__ ((packed,aligned(4)));
     72
     73/*
     74 * When rescheduled, todo's with higher values will overwrite those
     75 * with lower values.
     76 */
     77enum sch_todo {
     78	SCH_TODO_NOTHING,
     79	SCH_TODO_EVAL,
     80	SCH_TODO_UNREG,
     81};
     82
     83/* subchannel data structure used by I/O subroutines */
     84struct subchannel {
     85	struct subchannel_id schid;
     86	spinlock_t *lock;	/* subchannel lock */
     87	struct mutex reg_mutex;
     88	enum {
     89		SUBCHANNEL_TYPE_IO = 0,
     90		SUBCHANNEL_TYPE_CHSC = 1,
     91		SUBCHANNEL_TYPE_MSG = 2,
     92		SUBCHANNEL_TYPE_ADM = 3,
     93	} st;			/* subchannel type */
     94	__u8 vpm;		/* verified path mask */
     95	__u8 lpm;		/* logical path mask */
     96	__u8 opm;               /* operational path mask */
     97	struct schib schib;	/* subchannel information block */
     98	int isc; /* desired interruption subclass */
     99	struct chsc_ssd_info ssd_info;	/* subchannel description */
    100	struct device dev;	/* entry in device tree */
    101	struct css_driver *driver;
    102	enum sch_todo todo;
    103	struct work_struct todo_work;
    104	struct schib_config config;
    105	u64 dma_mask;
    106	/*
    107	 * Driver name to force a match.  Do not set directly, because core
    108	 * frees it.  Use driver_set_override() to set or clear it.
    109	 */
    110	const char *driver_override;
    111} __attribute__ ((aligned(8)));
    112
    113DECLARE_PER_CPU_ALIGNED(struct irb, cio_irb);
    114
    115#define to_subchannel(n) container_of(n, struct subchannel, dev)
    116
    117extern int cio_enable_subchannel(struct subchannel *, u32);
    118extern int cio_disable_subchannel (struct subchannel *);
    119extern int cio_cancel (struct subchannel *);
    120extern int cio_clear (struct subchannel *);
    121extern int cio_cancel_halt_clear(struct subchannel *, int *);
    122extern int cio_resume (struct subchannel *);
    123extern int cio_halt (struct subchannel *);
    124extern int cio_start (struct subchannel *, struct ccw1 *, __u8);
    125extern int cio_start_key (struct subchannel *, struct ccw1 *, __u8, __u8);
    126extern int cio_set_options (struct subchannel *, int);
    127extern int cio_update_schib(struct subchannel *sch);
    128extern int cio_commit_config(struct subchannel *sch);
    129
    130int cio_tm_start_key(struct subchannel *sch, struct tcw *tcw, u8 lpm, u8 key);
    131int cio_tm_intrg(struct subchannel *sch);
    132
    133extern int __init airq_init(void);
    134
    135/* Use with care. */
    136#ifdef CONFIG_CCW_CONSOLE
    137extern struct subchannel *cio_probe_console(void);
    138extern int cio_is_console(struct subchannel_id);
    139extern void cio_register_early_subchannels(void);
    140extern void cio_tsch(struct subchannel *sch);
    141#else
    142#define cio_is_console(schid) 0
    143static inline void cio_register_early_subchannels(void) {}
    144#endif
    145
    146#endif