cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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a100u2w.h (16936B)


      1/*
      2 * Initio A100 device driver for Linux.
      3 *
      4 * Copyright (c) 1994-1998 Initio Corporation
      5 * All rights reserved.
      6 *
      7 * This program is free software; you can redistribute it and/or modify
      8 * it under the terms of the GNU General Public License as published by
      9 * the Free Software Foundation; either version 2, or (at your option)
     10 * any later version.
     11 *
     12 * This program is distributed in the hope that it will be useful,
     13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 * GNU General Public License for more details.
     16 *
     17 * You should have received a copy of the GNU General Public License
     18 * along with this program; see the file COPYING.  If not, write to
     19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
     20 *
     21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31 * SUCH DAMAGE.
     32 *
     33 * Revision History:
     34 * 06/18/98 HL, Initial production Version 1.02
     35 * 12/19/98 bv, Use spinlocks for 2.1.95 and up
     36 * 06/25/02 Doug Ledford <dledford@redhat.com>
     37 *	 - This and the i60uscsi.h file are almost identical,
     38 *	   merged them into a single header used by both .c files.
     39 * 14/06/07 Alan Cox <alan@redhat.com>
     40 *	 - Grand cleanup and Linuxisation
     41 */
     42
     43#define inia100_REVID "Initio INI-A100U2W SCSI device driver; Revision: 1.02d"
     44
     45#if 1
     46#define ORC_MAXQUEUE		245
     47#define ORC_MAXTAGS		64
     48#else
     49#define ORC_MAXQUEUE		25
     50#define ORC_MAXTAGS		8
     51#endif
     52
     53#define TOTAL_SG_ENTRY		32
     54#define MAX_TARGETS		16
     55#define IMAX_CDB			15
     56#define SENSE_SIZE		14
     57
     58/************************************************************************/
     59/*              Scatter-Gather Element Structure                        */
     60/************************************************************************/
     61struct orc_sgent {
     62	u32 base;		/* Data Pointer */
     63	u32 length;		/* Data Length */
     64};
     65
     66/* SCSI related definition                                              */
     67#define DISC_NOT_ALLOW          0x80	/* Disconnect is not allowed    */
     68#define DISC_ALLOW              0xC0	/* Disconnect is allowed        */
     69
     70
     71#define ORC_OFFSET_SCB			16
     72#define ORC_MAX_SCBS		    250
     73#define MAX_CHANNELS       2
     74#define MAX_ESCB_ELE				64
     75#define TCF_DRV_255_63     0x0400
     76
     77/********************************************************/
     78/*      Orchid Host Command Set                         */
     79/********************************************************/
     80#define ORC_CMD_NOP		0x00	/* Host command - NOP             */
     81#define ORC_CMD_VERSION		0x01	/* Host command - Get F/W version */
     82#define ORC_CMD_ECHO		0x02	/* Host command - ECHO            */
     83#define ORC_CMD_SET_NVM		0x03	/* Host command - Set NVRAM       */
     84#define ORC_CMD_GET_NVM		0x04	/* Host command - Get NVRAM       */
     85#define ORC_CMD_GET_BUS_STATUS	0x05	/* Host command - Get SCSI bus status */
     86#define ORC_CMD_ABORT_SCB	0x06	/* Host command - Abort SCB       */
     87#define ORC_CMD_ISSUE_SCB	0x07	/* Host command - Issue SCB       */
     88
     89/********************************************************/
     90/*              Orchid Register Set                     */
     91/********************************************************/
     92#define ORC_GINTS	0xA0	/* Global Interrupt Status        */
     93#define QINT		0x04	/* Reply Queue Interrupt  */
     94#define ORC_GIMSK	0xA1	/* Global Interrupt MASK  */
     95#define MQINT		0x04	/* Mask Reply Queue Interrupt     */
     96#define	ORC_GCFG	0xA2	/* Global Configure               */
     97#define EEPRG		0x01	/* Enable EEPROM programming */
     98#define	ORC_GSTAT	0xA3	/* Global status          */
     99#define WIDEBUS		0x10	/* Wide SCSI Devices connected    */
    100#define ORC_HDATA	0xA4	/* Host Data                      */
    101#define ORC_HCTRL	0xA5	/* Host Control                   */
    102#define SCSIRST		0x80	/* SCSI bus reset         */
    103#define HDO			0x40	/* Host data out          */
    104#define HOSTSTOP		0x02	/* Host stop RISC engine  */
    105#define DEVRST		0x01	/* Device reset                   */
    106#define ORC_HSTUS	0xA6	/* Host Status                    */
    107#define HDI			0x02	/* Host data in                   */
    108#define RREADY		0x01	/* RISC engine is ready to receive */
    109#define	ORC_NVRAM	0xA7	/* Nvram port address             */
    110#define SE2CS		0x008
    111#define SE2CLK		0x004
    112#define SE2DO		0x002
    113#define SE2DI		0x001
    114#define ORC_PQUEUE	0xA8	/* Posting queue FIFO             */
    115#define ORC_PQCNT	0xA9	/* Posting queue FIFO Cnt */
    116#define ORC_RQUEUE	0xAA	/* Reply queue FIFO               */
    117#define ORC_RQUEUECNT	0xAB	/* Reply queue FIFO Cnt           */
    118#define	ORC_FWBASEADR	0xAC	/* Firmware base address  */
    119
    120#define	ORC_EBIOSADR0 0xB0	/* External Bios address */
    121#define	ORC_EBIOSADR1 0xB1	/* External Bios address */
    122#define	ORC_EBIOSADR2 0xB2	/* External Bios address */
    123#define	ORC_EBIOSDATA 0xB3	/* External Bios address */
    124
    125#define	ORC_SCBSIZE	0xB7	/* SCB size register              */
    126#define	ORC_SCBBASE0	0xB8	/* SCB base address 0             */
    127#define	ORC_SCBBASE1	0xBC	/* SCB base address 1             */
    128
    129#define	ORC_RISCCTL	0xE0	/* RISC Control                   */
    130#define PRGMRST		0x002
    131#define DOWNLOAD		0x001
    132#define	ORC_PRGMCTR0	0xE2	/* RISC program counter           */
    133#define	ORC_PRGMCTR1	0xE3	/* RISC program counter           */
    134#define	ORC_RISCRAM	0xEC	/* RISC RAM data port 4 bytes     */
    135
    136struct orc_extended_scb {	/* Extended SCB                 */
    137	struct orc_sgent sglist[TOTAL_SG_ENTRY];	/*0 Start of SG list              */
    138	struct scsi_cmnd *srb;	/*50 SRB Pointer */
    139};
    140
    141/***********************************************************************
    142		SCSI Control Block
    143
    144		0x40 bytes long, the last 8 are user bytes
    145************************************************************************/
    146struct orc_scb {	/* Scsi_Ctrl_Blk                */
    147	u8 opcode;	/*00 SCB command code&residual  */
    148	u8 flags;	/*01 SCB Flags                  */
    149	u8 target;	/*02 Target Id                  */
    150	u8 lun;		/*03 Lun                        */
    151	u32 reserved0;	/*04 Reserved for ORCHID must 0 */
    152	u32 xferlen;	/*08 Data Transfer Length       */
    153	u32 reserved1;	/*0C Reserved for ORCHID must 0 */
    154	u32 sg_len;		/*10 SG list # * 8              */
    155	u32 sg_addr;	/*14 SG List Buf physical Addr  */
    156	u32 sg_addrhigh;	/*18 SG Buffer high physical Addr */
    157	u8 hastat;	/*1C Host Status                */
    158	u8 tastat;	/*1D Target Status              */
    159	u8 status;	/*1E SCB status                 */
    160	u8 link;		/*1F Link pointer, default 0xFF */
    161	u8 sense_len;	/*20 Sense Allocation Length    */
    162	u8 cdb_len;	/*21 CDB Length                 */
    163	u8 ident;	/*22 Identify                   */
    164	u8 tag_msg;	/*23 Tag Message                */
    165	u8 cdb[IMAX_CDB];	/*24 SCSI CDBs                  */
    166	u8 scbidx;	/*3C Index for this ORCSCB      */
    167	u32 sense_addr;	/*34 Sense Buffer physical Addr */
    168
    169	struct orc_extended_scb *escb; /*38 Extended SCB Pointer       */
    170        /* 64bit pointer or 32bit pointer + reserved ? */
    171#ifndef CONFIG_64BIT
    172	u8 reserved2[4];	/*3E Reserved for Driver use    */
    173#endif
    174};
    175
    176/* Opcodes of ORCSCB_Opcode */
    177#define ORC_EXECSCSI	0x00	/* SCSI initiator command with residual */
    178#define ORC_BUSDEVRST	0x01	/* SCSI Bus Device Reset  */
    179
    180/* Status of ORCSCB_Status */
    181#define ORCSCB_COMPLETE	0x00	/* SCB request completed  */
    182#define ORCSCB_POST	0x01	/* SCB is posted by the HOST      */
    183
    184/* Bit Definition for ORCSCB_Flags */
    185#define SCF_DISINT	0x01	/* Disable HOST interrupt */
    186#define SCF_DIR		0x18	/* Direction bits         */
    187#define SCF_NO_DCHK	0x00	/* Direction determined by SCSI   */
    188#define SCF_DIN		0x08	/* From Target to Initiator       */
    189#define SCF_DOUT	0x10	/* From Initiator to Target       */
    190#define SCF_NO_XF	0x18	/* No data transfer               */
    191#define SCF_POLL   0x40
    192
    193/* Error Codes for ORCSCB_HaStat */
    194#define HOST_SEL_TOUT	0x11
    195#define HOST_DO_DU	0x12
    196#define HOST_BUS_FREE	0x13
    197#define HOST_BAD_PHAS	0x14
    198#define HOST_INV_CMD	0x16
    199#define HOST_SCSI_RST	0x1B
    200#define HOST_DEV_RST	0x1C
    201
    202
    203/* Error Codes for ORCSCB_TaStat */
    204#define TARGET_CHK_COND	0x02
    205#define TARGET_BUSY	0x08
    206#define TARGET_TAG_FULL	0x28
    207
    208
    209/***********************************************************************
    210		Target Device Control Structure
    211**********************************************************************/
    212
    213struct orc_target {
    214	u8 TCS_DrvDASD;	/* 6 */
    215	u8 TCS_DrvSCSI;	/* 7 */
    216	u8 TCS_DrvHead;	/* 8 */
    217	u16 TCS_DrvFlags;	/* 4 */
    218	u8 TCS_DrvSector;	/* 7 */
    219};
    220
    221/* Bit Definition for TCF_DrvFlags */
    222#define	TCS_DF_NODASD_SUPT	0x20	/* Suppress OS/2 DASD Mgr support */
    223#define	TCS_DF_NOSCSI_SUPT	0x40	/* Suppress OS/2 SCSI Mgr support */
    224
    225
    226/***********************************************************************
    227              Host Adapter Control Structure
    228************************************************************************/
    229struct orc_host {
    230	unsigned long base;	/* Base address */
    231	u8 index;		/* Index (Channel)*/
    232	u8 scsi_id;		/* H/A SCSI ID */
    233	u8 BIOScfg;		/*BIOS configuration */
    234	u8 flags;
    235	u8 max_targets;		/* SCSI0MAXTags */
    236	struct orc_scb *scb_virt;	/* Virtual Pointer to SCB array */
    237	dma_addr_t scb_phys;	/* Scb Physical address */
    238	struct orc_extended_scb *escb_virt; /* Virtual pointer to ESCB Scatter list */
    239	dma_addr_t escb_phys;	/* scatter list Physical address */
    240	u8 target_flag[16];	/* target configuration, TCF_EN_TAG */
    241	u8 max_tags[16];	/* ORC_MAX_SCBS */
    242	u32 allocation_map[MAX_CHANNELS][8];	/* Max STB is 256, So 256/32 */
    243	spinlock_t allocation_lock;
    244	struct pci_dev *pdev;
    245};
    246
    247/* Bit Definition for HCS_Flags */
    248
    249#define HCF_SCSI_RESET	0x01	/* SCSI BUS RESET         */
    250#define HCF_PARITY    	0x02	/* parity card                    */
    251#define HCF_LVDS     	0x10	/* parity card                    */
    252
    253/* Bit Definition for TargetFlag */
    254
    255#define TCF_EN_255	    0x08
    256#define TCF_EN_TAG	    0x10
    257#define TCF_BUSY	      0x20
    258#define TCF_DISCONNECT	0x40
    259#define TCF_SPIN_UP	  0x80
    260
    261/* Bit Definition for HCS_AFlags */
    262#define	HCS_AF_IGNORE		0x01	/* Adapter ignore         */
    263#define	HCS_AF_DISABLE_RESET	0x10	/* Adapter disable reset  */
    264#define	HCS_AF_DISABLE_ADPT	0x80	/* Adapter disable                */
    265
    266struct orc_nvram {
    267/*----------header ---------------*/
    268        u8 SubVendorID0;     /* 00 - Sub Vendor ID           */
    269        u8 SubVendorID1;     /* 00 - Sub Vendor ID           */
    270        u8 SubSysID0;        /* 02 - Sub System ID           */
    271        u8 SubSysID1;        /* 02 - Sub System ID           */
    272        u8 SubClass;         /* 04 - Sub Class               */
    273        u8 VendorID0;        /* 05 - Vendor ID               */
    274        u8 VendorID1;        /* 05 - Vendor ID               */
    275        u8 DeviceID0;        /* 07 - Device ID               */
    276        u8 DeviceID1;        /* 07 - Device ID               */
    277        u8 Reserved0[2];     /* 09 - Reserved                */
    278        u8 revision;         /* 0B - revision of data structure */
    279        /* ----Host Adapter Structure ---- */
    280        u8 NumOfCh;          /* 0C - Number of SCSI channel  */
    281        u8 BIOSConfig1;      /* 0D - BIOS configuration 1    */
    282        u8 BIOSConfig2;      /* 0E - BIOS boot channel&target ID */
    283        u8 BIOSConfig3;      /* 0F - BIOS configuration 3    */
    284        /* ----SCSI channel Structure ---- */
    285        /* from "CTRL-I SCSI Host Adapter SetUp menu "  */
    286        u8 scsi_id;          /* 10 - Channel 0 SCSI ID       */
    287        u8 SCSI0Config;      /* 11 - Channel 0 SCSI configuration */
    288        u8 SCSI0MaxTags;     /* 12 - Channel 0 Maximum tags  */
    289        u8 SCSI0ResetTime;   /* 13 - Channel 0 Reset recovering time */
    290        u8 ReservedforChannel0[2];   /* 14 - Reserved                */
    291
    292        /* ----SCSI target Structure ----  */
    293        /* from "CTRL-I SCSI device SetUp menu "                        */
    294        u8 Target00Config;   /* 16 - Channel 0 Target 0 config */
    295        u8 Target01Config;   /* 17 - Channel 0 Target 1 config */
    296        u8 Target02Config;   /* 18 - Channel 0 Target 2 config */
    297        u8 Target03Config;   /* 19 - Channel 0 Target 3 config */
    298        u8 Target04Config;   /* 1A - Channel 0 Target 4 config */
    299        u8 Target05Config;   /* 1B - Channel 0 Target 5 config */
    300        u8 Target06Config;   /* 1C - Channel 0 Target 6 config */
    301        u8 Target07Config;   /* 1D - Channel 0 Target 7 config */
    302        u8 Target08Config;   /* 1E - Channel 0 Target 8 config */
    303        u8 Target09Config;   /* 1F - Channel 0 Target 9 config */
    304        u8 Target0AConfig;   /* 20 - Channel 0 Target A config */
    305        u8 Target0BConfig;   /* 21 - Channel 0 Target B config */
    306        u8 Target0CConfig;   /* 22 - Channel 0 Target C config */
    307        u8 Target0DConfig;   /* 23 - Channel 0 Target D config */
    308        u8 Target0EConfig;   /* 24 - Channel 0 Target E config */
    309        u8 Target0FConfig;   /* 25 - Channel 0 Target F config */
    310
    311        u8 SCSI1Id;          /* 26 - Channel 1 SCSI ID       */
    312        u8 SCSI1Config;      /* 27 - Channel 1 SCSI configuration */
    313        u8 SCSI1MaxTags;     /* 28 - Channel 1 Maximum tags  */
    314        u8 SCSI1ResetTime;   /* 29 - Channel 1 Reset recovering time */
    315        u8 ReservedforChannel1[2];   /* 2A - Reserved                */
    316
    317        /* ----SCSI target Structure ----  */
    318        /* from "CTRL-I SCSI device SetUp menu "                                          */
    319        u8 Target10Config;   /* 2C - Channel 1 Target 0 config */
    320        u8 Target11Config;   /* 2D - Channel 1 Target 1 config */
    321        u8 Target12Config;   /* 2E - Channel 1 Target 2 config */
    322        u8 Target13Config;   /* 2F - Channel 1 Target 3 config */
    323        u8 Target14Config;   /* 30 - Channel 1 Target 4 config */
    324        u8 Target15Config;   /* 31 - Channel 1 Target 5 config */
    325        u8 Target16Config;   /* 32 - Channel 1 Target 6 config */
    326        u8 Target17Config;   /* 33 - Channel 1 Target 7 config */
    327        u8 Target18Config;   /* 34 - Channel 1 Target 8 config */
    328        u8 Target19Config;   /* 35 - Channel 1 Target 9 config */
    329        u8 Target1AConfig;   /* 36 - Channel 1 Target A config */
    330        u8 Target1BConfig;   /* 37 - Channel 1 Target B config */
    331        u8 Target1CConfig;   /* 38 - Channel 1 Target C config */
    332        u8 Target1DConfig;   /* 39 - Channel 1 Target D config */
    333        u8 Target1EConfig;   /* 3A - Channel 1 Target E config */
    334        u8 Target1FConfig;   /* 3B - Channel 1 Target F config */
    335        u8 reserved[3];      /* 3C - Reserved                */
    336        /* ---------- CheckSum ----------       */
    337        u8 CheckSum;         /* 3F - Checksum of NVRam       */
    338};
    339
    340/* Bios Configuration for nvram->BIOSConfig1                            */
    341#define NBC_BIOSENABLE  0x01    /* BIOS enable                    */
    342#define NBC_CDROM       0x02    /* Support bootable CDROM */
    343#define NBC_REMOVABLE   0x04    /* Support removable drive        */
    344
    345/* Bios Configuration for nvram->BIOSConfig2                            */
    346#define NBB_TARGET_MASK 0x0F    /* Boot SCSI target ID number     */
    347#define NBB_CHANL_MASK  0xF0    /* Boot SCSI channel number       */
    348
    349/* Bit definition for nvram->SCSIConfig                                 */
    350#define NCC_BUSRESET    0x01    /* Reset SCSI bus at power up     */
    351#define NCC_PARITYCHK   0x02    /* SCSI parity enable             */
    352#define NCC_LVDS        0x10    /* Enable LVDS                    */
    353#define NCC_ACTTERM1    0x20    /* Enable active terminator 1     */
    354#define NCC_ACTTERM2    0x40    /* Enable active terminator 2     */
    355#define NCC_AUTOTERM    0x80    /* Enable auto termination        */
    356
    357/* Bit definition for nvram->TargetxConfig                              */
    358#define NTC_PERIOD      0x07    /* Maximum Sync. Speed            */
    359#define NTC_1GIGA       0x08    /* 255 head / 63 sectors (64/32) */
    360#define NTC_NO_SYNC     0x10    /* NO SYNC. NEGO          */
    361#define NTC_NO_WIDESYNC 0x20    /* NO WIDE SYNC. NEGO             */
    362#define NTC_DISC_ENABLE 0x40    /* Enable SCSI disconnect */
    363#define NTC_SPINUP      0x80    /* Start disk drive               */
    364
    365/* Default NVRam values                                                 */
    366#define NBC_DEFAULT     (NBC_ENABLE)
    367#define NCC_DEFAULT     (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK)
    368#define NCC_MAX_TAGS    0x20    /* Maximum tags per target        */
    369#define NCC_RESET_TIME  0x0A    /* SCSI RESET recovering time     */
    370#define NTC_DEFAULT     (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE)
    371