cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aic7xxx_osm_pci.c (11955B)


      1/*
      2 * Linux driver attachment glue for PCI based controllers.
      3 *
      4 * Copyright (c) 2000-2001 Adaptec Inc.
      5 * All rights reserved.
      6 *
      7 * Redistribution and use in source and binary forms, with or without
      8 * modification, are permitted provided that the following conditions
      9 * are met:
     10 * 1. Redistributions of source code must retain the above copyright
     11 *    notice, this list of conditions, and the following disclaimer,
     12 *    without modification.
     13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
     14 *    substantially similar to the "NO WARRANTY" disclaimer below
     15 *    ("Disclaimer") and any redistribution must be conditioned upon
     16 *    including a substantially similar Disclaimer requirement for further
     17 *    binary redistribution.
     18 * 3. Neither the names of the above-listed copyright holders nor the names
     19 *    of any contributors may be used to endorse or promote products derived
     20 *    from this software without specific prior written permission.
     21 *
     22 * Alternatively, this software may be distributed under the terms of the
     23 * GNU General Public License ("GPL") version 2 as published by the Free
     24 * Software Foundation.
     25 *
     26 * NO WARRANTY
     27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
     30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
     36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37 * POSSIBILITY OF SUCH DAMAGES.
     38 *
     39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
     40 */
     41
     42#include "aic7xxx_osm.h"
     43#include "aic7xxx_pci.h"
     44
     45/* Define the macro locally since it's different for different class of chips.
     46*/
     47#define ID(x)	ID_C(x, PCI_CLASS_STORAGE_SCSI)
     48
     49static const struct pci_device_id ahc_linux_pci_id_table[] = {
     50	/* aic7850 based controllers */
     51	ID(ID_AHA_2902_04_10_15_20C_30C),
     52	/* aic7860 based controllers */
     53	ID(ID_AHA_2930CU),
     54	ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
     55	ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
     56	ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
     57	ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
     58	/* aic7870 based controllers */
     59	ID(ID_AHA_2940),
     60	ID(ID_AHA_3940),
     61	ID(ID_AHA_398X),
     62	ID(ID_AHA_2944),
     63	ID(ID_AHA_3944),
     64	ID(ID_AHA_4944),
     65	/* aic7880 based controllers */
     66	ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK),
     67	ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK),
     68	ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK),
     69	ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK),
     70	ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK),
     71	ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK),
     72	ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK),
     73	ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK),
     74	ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK),
     75	/* aic7890 based controllers */
     76	ID(ID_AHA_2930U2),
     77	ID(ID_AHA_2940U2B),
     78	ID(ID_AHA_2940U2_OEM),
     79	ID(ID_AHA_2940U2),
     80	ID(ID_AHA_2950U2B),
     81	ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK),
     82	ID(ID_AAA_131U2),
     83	/* aic7890 based controllers */
     84	ID(ID_AHA_29160),
     85	ID(ID_AHA_29160_CPQ),
     86	ID(ID_AHA_29160N),
     87	ID(ID_AHA_29160C),
     88	ID(ID_AHA_29160B),
     89	ID(ID_AHA_19160B),
     90	ID(ID_AIC7892_ARO),
     91	/* aic7892 based controllers */
     92	ID(ID_AHA_2940U_DUAL),
     93	ID(ID_AHA_3940AU),
     94	ID(ID_AHA_3944AU),
     95	ID(ID_AIC7895_ARO),
     96	ID(ID_AHA_3950U2B_0),
     97	ID(ID_AHA_3950U2B_1),
     98	ID(ID_AHA_3950U2D_0),
     99	ID(ID_AHA_3950U2D_1),
    100	ID(ID_AIC7896_ARO),
    101	/* aic7899 based controllers */
    102	ID(ID_AHA_3960D),
    103	ID(ID_AHA_3960D_CPQ),
    104	ID(ID_AIC7899_ARO),
    105	/* Generic chip probes for devices we don't know exactly. */
    106	ID(ID_AIC7850 & ID_DEV_VENDOR_MASK),
    107	ID(ID_AIC7855 & ID_DEV_VENDOR_MASK),
    108	ID(ID_AIC7859 & ID_DEV_VENDOR_MASK),
    109	ID(ID_AIC7860 & ID_DEV_VENDOR_MASK),
    110	ID(ID_AIC7870 & ID_DEV_VENDOR_MASK),
    111	ID(ID_AIC7880 & ID_DEV_VENDOR_MASK),
    112 	ID16(ID_AIC7890 & ID_9005_GENERIC_MASK),
    113 	ID16(ID_AIC7892 & ID_9005_GENERIC_MASK),
    114	ID(ID_AIC7895 & ID_DEV_VENDOR_MASK),
    115	ID16(ID_AIC7896 & ID_9005_GENERIC_MASK),
    116	ID16(ID_AIC7899 & ID_9005_GENERIC_MASK),
    117	ID(ID_AIC7810 & ID_DEV_VENDOR_MASK),
    118	ID(ID_AIC7815 & ID_DEV_VENDOR_MASK),
    119	{ 0 }
    120};
    121
    122MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table);
    123
    124static int __maybe_unused
    125ahc_linux_pci_dev_suspend(struct device *dev)
    126{
    127	struct ahc_softc *ahc = dev_get_drvdata(dev);
    128
    129	return ahc_suspend(ahc);
    130}
    131
    132static int __maybe_unused
    133ahc_linux_pci_dev_resume(struct device *dev)
    134{
    135	struct ahc_softc *ahc = dev_get_drvdata(dev);
    136
    137	ahc_pci_resume(ahc);
    138
    139	return (ahc_resume(ahc));
    140}
    141
    142static void
    143ahc_linux_pci_dev_remove(struct pci_dev *pdev)
    144{
    145	struct ahc_softc *ahc = pci_get_drvdata(pdev);
    146	u_long s;
    147
    148	if (ahc->platform_data && ahc->platform_data->host)
    149			scsi_remove_host(ahc->platform_data->host);
    150
    151	ahc_lock(ahc, &s);
    152	ahc_intr_enable(ahc, FALSE);
    153	ahc_unlock(ahc, &s);
    154	ahc_free(ahc);
    155}
    156
    157static void
    158ahc_linux_pci_inherit_flags(struct ahc_softc *ahc)
    159{
    160	struct pci_dev *pdev = ahc->dev_softc, *master_pdev;
    161	unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
    162
    163	master_pdev = pci_get_slot(pdev->bus, master_devfn);
    164	if (master_pdev) {
    165		struct ahc_softc *master = pci_get_drvdata(master_pdev);
    166		if (master) {
    167			ahc->flags &= ~AHC_BIOS_ENABLED; 
    168			ahc->flags |= master->flags & AHC_BIOS_ENABLED;
    169
    170			ahc->flags &= ~AHC_PRIMARY_CHANNEL; 
    171			ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL;
    172		} else
    173			printk(KERN_ERR "aic7xxx: no multichannel peer found!\n");
    174		pci_dev_put(master_pdev);
    175	} 
    176}
    177
    178static int
    179ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
    180{
    181	char		 buf[80];
    182	const uint64_t	 mask_39bit = 0x7FFFFFFFFFULL;
    183	struct		 ahc_softc *ahc;
    184	ahc_dev_softc_t	 pci;
    185	const struct ahc_pci_identity *entry;
    186	char		*name;
    187	int		 error;
    188	struct device	*dev = &pdev->dev;
    189
    190	pci = pdev;
    191	entry = ahc_find_pci_device(pci);
    192	if (entry == NULL)
    193		return (-ENODEV);
    194
    195	/*
    196	 * Allocate a softc for this card and
    197	 * set it up for attachment by our
    198	 * common detect routine.
    199	 */
    200	sprintf(buf, "ahc_pci:%d:%d:%d",
    201		ahc_get_pci_bus(pci),
    202		ahc_get_pci_slot(pci),
    203		ahc_get_pci_function(pci));
    204	name = kstrdup(buf, GFP_ATOMIC);
    205	if (name == NULL)
    206		return (-ENOMEM);
    207	ahc = ahc_alloc(NULL, name);
    208	if (ahc == NULL)
    209		return (-ENOMEM);
    210	if (pci_enable_device(pdev)) {
    211		ahc_free(ahc);
    212		return (-ENODEV);
    213	}
    214	pci_set_master(pdev);
    215
    216	if (sizeof(dma_addr_t) > 4
    217	    && ahc->features & AHC_LARGE_SCBS
    218	    && dma_set_mask(dev, mask_39bit) == 0
    219	    && dma_get_required_mask(dev) > DMA_BIT_MASK(32)) {
    220		ahc->flags |= AHC_39BIT_ADDRESSING;
    221	} else {
    222		if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
    223			ahc_free(ahc);
    224			printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n");
    225                	return (-ENODEV);
    226		}
    227	}
    228	ahc->dev_softc = pci;
    229	ahc->dev = &pci->dev;
    230	error = ahc_pci_config(ahc, entry);
    231	if (error != 0) {
    232		ahc_free(ahc);
    233		return (-error);
    234	}
    235
    236	/*
    237	 * Second Function PCI devices need to inherit some
    238	 * settings from function 0.
    239	 */
    240	if ((ahc->features & AHC_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
    241		ahc_linux_pci_inherit_flags(ahc);
    242
    243	pci_set_drvdata(pdev, ahc);
    244	ahc_linux_register_host(ahc, &aic7xxx_driver_template);
    245	return (0);
    246}
    247
    248/******************************* PCI Routines *********************************/
    249uint32_t
    250ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
    251{
    252	switch (width) {
    253	case 1:
    254	{
    255		uint8_t retval;
    256
    257		pci_read_config_byte(pci, reg, &retval);
    258		return (retval);
    259	}
    260	case 2:
    261	{
    262		uint16_t retval;
    263		pci_read_config_word(pci, reg, &retval);
    264		return (retval);
    265	}
    266	case 4:
    267	{
    268		uint32_t retval;
    269		pci_read_config_dword(pci, reg, &retval);
    270		return (retval);
    271	}
    272	default:
    273		panic("ahc_pci_read_config: Read size too big");
    274		/* NOTREACHED */
    275		return (0);
    276	}
    277}
    278
    279void
    280ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
    281{
    282	switch (width) {
    283	case 1:
    284		pci_write_config_byte(pci, reg, value);
    285		break;
    286	case 2:
    287		pci_write_config_word(pci, reg, value);
    288		break;
    289	case 4:
    290		pci_write_config_dword(pci, reg, value);
    291		break;
    292	default:
    293		panic("ahc_pci_write_config: Write size too big");
    294		/* NOTREACHED */
    295	}
    296}
    297
    298static SIMPLE_DEV_PM_OPS(ahc_linux_pci_dev_pm_ops,
    299			 ahc_linux_pci_dev_suspend,
    300			 ahc_linux_pci_dev_resume);
    301
    302static struct pci_driver aic7xxx_pci_driver = {
    303	.name		= "aic7xxx",
    304	.probe		= ahc_linux_pci_dev_probe,
    305	.driver.pm	= &ahc_linux_pci_dev_pm_ops,
    306	.remove		= ahc_linux_pci_dev_remove,
    307	.id_table	= ahc_linux_pci_id_table
    308};
    309
    310int
    311ahc_linux_pci_init(void)
    312{
    313	return pci_register_driver(&aic7xxx_pci_driver);
    314}
    315
    316void
    317ahc_linux_pci_exit(void)
    318{
    319	pci_unregister_driver(&aic7xxx_pci_driver);
    320}
    321
    322static int
    323ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, resource_size_t *base)
    324{
    325	if (aic7xxx_allow_memio == 0)
    326		return (ENOMEM);
    327
    328	*base = pci_resource_start(ahc->dev_softc, 0);
    329	if (*base == 0)
    330		return (ENOMEM);
    331	if (!request_region(*base, 256, "aic7xxx"))
    332		return (ENOMEM);
    333	return (0);
    334}
    335
    336static int
    337ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
    338				 resource_size_t *bus_addr,
    339				 uint8_t __iomem **maddr)
    340{
    341	resource_size_t	start;
    342	int	error;
    343
    344	error = 0;
    345	start = pci_resource_start(ahc->dev_softc, 1);
    346	if (start != 0) {
    347		*bus_addr = start;
    348		if (!request_mem_region(start, 0x1000, "aic7xxx"))
    349			error = ENOMEM;
    350		if (error == 0) {
    351			*maddr = ioremap(start, 256);
    352			if (*maddr == NULL) {
    353				error = ENOMEM;
    354				release_mem_region(start, 0x1000);
    355			}
    356		}
    357	} else
    358		error = ENOMEM;
    359	return (error);
    360}
    361
    362int
    363ahc_pci_map_registers(struct ahc_softc *ahc)
    364{
    365	uint32_t command;
    366	resource_size_t	base;
    367	uint8_t	__iomem *maddr;
    368	int	 error;
    369
    370	/*
    371	 * If its allowed, we prefer memory mapped access.
    372	 */
    373	command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4);
    374	command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
    375	base = 0;
    376	maddr = NULL;
    377	error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr);
    378	if (error == 0) {
    379		ahc->platform_data->mem_busaddr = base;
    380		ahc->tag = BUS_SPACE_MEMIO;
    381		ahc->bsh.maddr = maddr;
    382		ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
    383				     command | PCIM_CMD_MEMEN, 4);
    384
    385		/*
    386		 * Do a quick test to see if memory mapped
    387		 * I/O is functioning correctly.
    388		 */
    389		if (ahc_pci_test_register_access(ahc) != 0) {
    390
    391			printk("aic7xxx: PCI Device %d:%d:%d "
    392			       "failed memory mapped test.  Using PIO.\n",
    393			       ahc_get_pci_bus(ahc->dev_softc),
    394			       ahc_get_pci_slot(ahc->dev_softc),
    395			       ahc_get_pci_function(ahc->dev_softc));
    396			iounmap(maddr);
    397			release_mem_region(ahc->platform_data->mem_busaddr,
    398					   0x1000);
    399			ahc->bsh.maddr = NULL;
    400			maddr = NULL;
    401		} else
    402			command |= PCIM_CMD_MEMEN;
    403	} else {
    404		printk("aic7xxx: PCI%d:%d:%d MEM region 0x%llx "
    405		       "unavailable. Cannot memory map device.\n",
    406		       ahc_get_pci_bus(ahc->dev_softc),
    407		       ahc_get_pci_slot(ahc->dev_softc),
    408		       ahc_get_pci_function(ahc->dev_softc),
    409		       (unsigned long long)base);
    410	}
    411
    412	/*
    413	 * We always prefer memory mapped access.
    414	 */
    415	if (maddr == NULL) {
    416
    417		error = ahc_linux_pci_reserve_io_region(ahc, &base);
    418		if (error == 0) {
    419			ahc->tag = BUS_SPACE_PIO;
    420			ahc->bsh.ioport = (u_long)base;
    421			command |= PCIM_CMD_PORTEN;
    422		} else {
    423			printk("aic7xxx: PCI%d:%d:%d IO region 0x%llx[0..255] "
    424			       "unavailable. Cannot map device.\n",
    425			       ahc_get_pci_bus(ahc->dev_softc),
    426			       ahc_get_pci_slot(ahc->dev_softc),
    427			       ahc_get_pci_function(ahc->dev_softc),
    428			       (unsigned long long)base);
    429		}
    430	}
    431	ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4);
    432	return (error);
    433}
    434
    435int
    436ahc_pci_map_int(struct ahc_softc *ahc)
    437{
    438	int error;
    439
    440	error = request_irq(ahc->dev_softc->irq, ahc_linux_isr,
    441			    IRQF_SHARED, "aic7xxx", ahc);
    442	if (error == 0)
    443		ahc->platform_data->irq = ahc->dev_softc->irq;
    444	
    445	return (-error);
    446}
    447