cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cq_desc.h (2507B)

      1/*
      2 * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
      3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
      4 *
      5 * This program is free software; you may redistribute it and/or modify
      6 * it under the terms of the GNU General Public License as published by
      7 * the Free Software Foundation; version 2 of the License.
      8 *
      9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     16 * SOFTWARE.
     17 */
     18#ifndef _CQ_DESC_H_
     19#define _CQ_DESC_H_
     20
     21/*
     22 * Completion queue descriptor types
     23 */
     24enum cq_desc_types {
     25	CQ_DESC_TYPE_WQ_ENET = 0,
     26	CQ_DESC_TYPE_DESC_COPY = 1,
     27	CQ_DESC_TYPE_WQ_EXCH = 2,
     28	CQ_DESC_TYPE_RQ_ENET = 3,
     29	CQ_DESC_TYPE_RQ_FCP = 4,
     30};
     31
     32/* Completion queue descriptor: 16B
     33 *
     34 * All completion queues have this basic layout.  The
     35 * type_specfic area is unique for each completion
     36 * queue type.
     37 */
     38struct cq_desc {
     39	__le16 completed_index;
     40	__le16 q_number;
     41	u8 type_specfic[11];
     42	u8 type_color;
     43};
     44
     45#define CQ_DESC_TYPE_BITS        4
     46#define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)
     47#define CQ_DESC_COLOR_MASK       1
     48#define CQ_DESC_COLOR_SHIFT      7
     49#define CQ_DESC_Q_NUM_BITS       10
     50#define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)
     51#define CQ_DESC_COMP_NDX_BITS    12
     52#define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
     53
     54static inline void cq_desc_dec(const struct cq_desc *desc_arg,
     55	u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
     56{
     57	const struct cq_desc *desc = desc_arg;
     58	const u8 type_color = desc->type_color;
     59
     60	*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
     61
     62	/*
     63	 * Make sure color bit is read from desc *before* other fields
     64	 * are read from desc.  Hardware guarantees color bit is last
     65	 * bit (byte) written.  Adding the rmb() prevents the compiler
     66	 * and/or CPU from reordering the reads which would potentially
     67	 * result in reading stale values.
     68	 */
     69
     70	rmb();
     71
     72	*type = type_color & CQ_DESC_TYPE_MASK;
     73	*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
     74	*completed_index = le16_to_cpu(desc->completed_index) &
     75		CQ_DESC_COMP_NDX_MASK;
     76}
     77
     78#endif /* _CQ_DESC_H_ */