cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cq_enet_desc.h (6342B)


      1/*
      2 * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
      3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
      4 *
      5 * This program is free software; you may redistribute it and/or modify
      6 * it under the terms of the GNU General Public License as published by
      7 * the Free Software Foundation; version 2 of the License.
      8 *
      9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     16 * SOFTWARE.
     17 */
     18#ifndef _CQ_ENET_DESC_H_
     19#define _CQ_ENET_DESC_H_
     20
     21#include "cq_desc.h"
     22
     23/* Ethernet completion queue descriptor: 16B */
     24struct cq_enet_wq_desc {
     25	__le16 completed_index;
     26	__le16 q_number;
     27	u8 reserved[11];
     28	u8 type_color;
     29};
     30
     31static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
     32	u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
     33{
     34	cq_desc_dec((struct cq_desc *)desc, type,
     35		color, q_number, completed_index);
     36}
     37
     38/* Completion queue descriptor: Ethernet receive queue, 16B */
     39struct cq_enet_rq_desc {
     40	__le16 completed_index_flags;
     41	__le16 q_number_rss_type_flags;
     42	__le32 rss_hash;
     43	__le16 bytes_written_flags;
     44	__le16 vlan;
     45	__le16 checksum_fcoe;
     46	u8 flags;
     47	u8 type_color;
     48};
     49
     50#define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)
     51#define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)
     52#define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)
     53#define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)
     54
     55#define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4
     56#define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
     57	((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
     58#define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0
     59#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1
     60#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2
     61#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3
     62#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4
     63#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5
     64#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6
     65
     66#define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)
     67
     68#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14
     69#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
     70	((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
     71#define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)
     72#define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)
     73
     74#define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               4
     75#define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
     76	((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
     77#define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8
     78#define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
     79	((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
     80#define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8
     81
     82#define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)
     83#define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)
     84#define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)
     85#define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)
     86#define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)
     87#define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)
     88#define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)
     89#define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)
     90#define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)
     91#define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)
     92
     93static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
     94	u8 *type, u8 *color, u16 *q_number, u16 *completed_index,
     95	u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,
     96	u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,
     97	u8 *vlan_stripped, u16 *vlan, u16 *checksum, u8 *fcoe_sof,
     98	u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,
     99	u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,
    100	u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)
    101{
    102	u16 completed_index_flags = le16_to_cpu(desc->completed_index_flags);
    103	u16 q_number_rss_type_flags =
    104		le16_to_cpu(desc->q_number_rss_type_flags);
    105	u16 bytes_written_flags = le16_to_cpu(desc->bytes_written_flags);
    106
    107	cq_desc_dec((struct cq_desc *)desc, type,
    108		color, q_number, completed_index);
    109
    110	*ingress_port = (completed_index_flags &
    111		CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
    112	*fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
    113		1 : 0;
    114	*eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
    115		1 : 0;
    116	*sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
    117		1 : 0;
    118
    119	*rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
    120		CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
    121	*csum_not_calc = (q_number_rss_type_flags &
    122		CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
    123
    124	*rss_hash = le32_to_cpu(desc->rss_hash);
    125
    126	*bytes_written = bytes_written_flags &
    127		CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
    128	*packet_error = (bytes_written_flags &
    129		CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
    130	*vlan_stripped = (bytes_written_flags &
    131		CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
    132
    133	*vlan = le16_to_cpu(desc->vlan);
    134
    135	if (*fcoe) {
    136		*fcoe_sof = (u8)(le16_to_cpu(desc->checksum_fcoe) &
    137			CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
    138		*fcoe_fc_crc_ok = (desc->flags &
    139			CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
    140		*fcoe_enc_error = (desc->flags &
    141			CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
    142		*fcoe_eof = (u8)((desc->checksum_fcoe >>
    143			CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
    144			CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
    145		*checksum = 0;
    146	} else {
    147		*fcoe_sof = 0;
    148		*fcoe_fc_crc_ok = 0;
    149		*fcoe_enc_error = 0;
    150		*fcoe_eof = 0;
    151		*checksum = le16_to_cpu(desc->checksum_fcoe);
    152	}
    153
    154	*tcp_udp_csum_ok =
    155		(desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
    156	*udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
    157	*tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
    158	*ipv4_csum_ok =
    159		(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
    160	*ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
    161	*ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
    162	*ipv4_fragment =
    163		(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
    164	*fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
    165}
    166
    167#endif /* _CQ_ENET_DESC_H_ */