ql4_nvram.h (6930B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * QLogic iSCSI HBA Driver 4 * Copyright (c) 2003-2013 QLogic Corporation 5 */ 6 7#ifndef _QL4XNVRM_H_ 8#define _QL4XNVRM_H_ 9 10/** 11 * AM29LV Flash definitions 12 **/ 13#define FM93C56A_SIZE_8 0x100 14#define FM93C56A_SIZE_16 0x80 15#define FM93C66A_SIZE_8 0x200 16#define FM93C66A_SIZE_16 0x100/* 4010 */ 17#define FM93C86A_SIZE_16 0x400/* 4022 */ 18 19#define FM93C56A_START 0x1 20 21/* Commands */ 22#define FM93C56A_READ 0x2 23#define FM93C56A_WEN 0x0 24#define FM93C56A_WRITE 0x1 25#define FM93C56A_WRITE_ALL 0x0 26#define FM93C56A_WDS 0x0 27#define FM93C56A_ERASE 0x3 28#define FM93C56A_ERASE_ALL 0x0 29 30/* Command Extensions */ 31#define FM93C56A_WEN_EXT 0x3 32#define FM93C56A_WRITE_ALL_EXT 0x1 33#define FM93C56A_WDS_EXT 0x0 34#define FM93C56A_ERASE_ALL_EXT 0x2 35 36/* Address Bits */ 37#define FM93C56A_NO_ADDR_BITS_16 8 /* 4010 */ 38#define FM93C56A_NO_ADDR_BITS_8 9 /* 4010 */ 39#define FM93C86A_NO_ADDR_BITS_16 10 /* 4022 */ 40 41/* Data Bits */ 42#define FM93C56A_DATA_BITS_16 16 43#define FM93C56A_DATA_BITS_8 8 44 45/* Special Bits */ 46#define FM93C56A_READ_DUMMY_BITS 1 47#define FM93C56A_READY 0 48#define FM93C56A_BUSY 1 49#define FM93C56A_CMD_BITS 2 50 51/* Auburn Bits */ 52#define AUBURN_EEPROM_DI 0x8 53#define AUBURN_EEPROM_DI_0 0x0 54#define AUBURN_EEPROM_DI_1 0x8 55#define AUBURN_EEPROM_DO 0x4 56#define AUBURN_EEPROM_DO_0 0x0 57#define AUBURN_EEPROM_DO_1 0x4 58#define AUBURN_EEPROM_CS 0x2 59#define AUBURN_EEPROM_CS_0 0x0 60#define AUBURN_EEPROM_CS_1 0x2 61#define AUBURN_EEPROM_CLK_RISE 0x1 62#define AUBURN_EEPROM_CLK_FALL 0x0 63 64/**/ 65/* EEPROM format */ 66/**/ 67struct bios_params { 68 uint16_t SpinUpDelay:1; 69 uint16_t BIOSDisable:1; 70 uint16_t MMAPEnable:1; 71 uint16_t BootEnable:1; 72 uint16_t Reserved0:12; 73 uint8_t bootID0:7; 74 uint8_t bootID0Valid:1; 75 uint8_t bootLUN0[8]; 76 uint8_t bootID1:7; 77 uint8_t bootID1Valid:1; 78 uint8_t bootLUN1[8]; 79 uint16_t MaxLunsPerTarget; 80 uint8_t Reserved1[10]; 81}; 82 83struct eeprom_port_cfg { 84 85 /* MTU MAC 0 */ 86 u16 etherMtu_mac; 87 88 /* Flow Control MAC 0 */ 89 u16 pauseThreshold_mac; 90 u16 resumeThreshold_mac; 91 u16 reserved[13]; 92}; 93 94struct eeprom_function_cfg { 95 u8 reserved[30]; 96 97 /* MAC ADDR */ 98 u8 macAddress[6]; 99 u8 macAddressSecondary[6]; 100 u16 subsysVendorId; 101 u16 subsysDeviceId; 102}; 103 104struct eeprom_data { 105 union { 106 struct { /* isp4010 */ 107 u8 asic_id[4]; /* x00 */ 108 u8 version; /* x04 */ 109 u8 reserved; /* x05 */ 110 u16 board_id; /* x06 */ 111#define EEPROM_BOARDID_ELDORADO 1 112#define EEPROM_BOARDID_PLACER 2 113 114#define EEPROM_SERIAL_NUM_SIZE 16 115 u8 serial_number[EEPROM_SERIAL_NUM_SIZE]; /* x08 */ 116 117 /* ExtHwConfig: */ 118 /* Offset = 24bytes 119 * 120 * | SSRAM Size| |ST|PD|SDRAM SZ| W| B| SP | | 121 * |15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0| 122 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ 123 */ 124 u16 ext_hw_conf; /* x18 */ 125 u8 mac0[6]; /* x1A */ 126 u8 mac1[6]; /* x20 */ 127 u8 mac2[6]; /* x26 */ 128 u8 mac3[6]; /* x2C */ 129 u16 etherMtu; /* x32 */ 130 u16 macConfig; /* x34 */ 131#define MAC_CONFIG_ENABLE_ANEG 0x0001 132#define MAC_CONFIG_ENABLE_PAUSE 0x0002 133 u16 phyConfig; /* x36 */ 134#define PHY_CONFIG_PHY_ADDR_MASK 0x1f 135#define PHY_CONFIG_ENABLE_FW_MANAGEMENT_MASK 0x20 136 u16 reserved_56; /* x38 */ 137 138#define EEPROM_UNUSED_1_SIZE 2 139 u8 unused_1[EEPROM_UNUSED_1_SIZE]; /* x3A */ 140 u16 bufletSize; /* x3C */ 141 u16 bufletCount; /* x3E */ 142 u16 bufletPauseThreshold; /* x40 */ 143 u16 tcpWindowThreshold50; /* x42 */ 144 u16 tcpWindowThreshold25; /* x44 */ 145 u16 tcpWindowThreshold0; /* x46 */ 146 u16 ipHashTableBaseHi; /* x48 */ 147 u16 ipHashTableBaseLo; /* x4A */ 148 u16 ipHashTableSize; /* x4C */ 149 u16 tcpHashTableBaseHi; /* x4E */ 150 u16 tcpHashTableBaseLo; /* x50 */ 151 u16 tcpHashTableSize; /* x52 */ 152 u16 ncbTableBaseHi; /* x54 */ 153 u16 ncbTableBaseLo; /* x56 */ 154 u16 ncbTableSize; /* x58 */ 155 u16 drbTableBaseHi; /* x5A */ 156 u16 drbTableBaseLo; /* x5C */ 157 u16 drbTableSize; /* x5E */ 158 159#define EEPROM_UNUSED_2_SIZE 4 160 u8 unused_2[EEPROM_UNUSED_2_SIZE]; /* x60 */ 161 u16 ipReassemblyTimeout; /* x64 */ 162 u16 tcpMaxWindowSizeHi; /* x66 */ 163 u16 tcpMaxWindowSizeLo; /* x68 */ 164 u32 net_ip_addr0; /* x6A Added for TOE 165 * functionality. */ 166 u32 net_ip_addr1; /* x6E */ 167 u32 scsi_ip_addr0; /* x72 */ 168 u32 scsi_ip_addr1; /* x76 */ 169#define EEPROM_UNUSED_3_SIZE 128 /* changed from 144 to account 170 * for ip addresses */ 171 u8 unused_3[EEPROM_UNUSED_3_SIZE]; /* x7A */ 172 u16 subsysVendorId_f0; /* xFA */ 173 u16 subsysDeviceId_f0; /* xFC */ 174 175 /* Address = 0x7F */ 176#define FM93C56A_SIGNATURE 0x9356 177#define FM93C66A_SIGNATURE 0x9366 178 u16 signature; /* xFE */ 179 180#define EEPROM_UNUSED_4_SIZE 250 181 u8 unused_4[EEPROM_UNUSED_4_SIZE]; /* x100 */ 182 u16 subsysVendorId_f1; /* x1FA */ 183 u16 subsysDeviceId_f1; /* x1FC */ 184 u16 checksum; /* x1FE */ 185 } __attribute__ ((packed)) isp4010; 186 struct { /* isp4022 */ 187 u8 asicId[4]; /* x00 */ 188 u8 version; /* x04 */ 189 u8 reserved_5; /* x05 */ 190 u16 boardId; /* x06 */ 191 u8 boardIdStr[16]; /* x08 */ 192 u8 serialNumber[16]; /* x18 */ 193 194 /* External Hardware Configuration */ 195 u16 ext_hw_conf; /* x28 */ 196 197 /* MAC 0 CONFIGURATION */ 198 struct eeprom_port_cfg macCfg_port0; /* x2A */ 199 200 /* MAC 1 CONFIGURATION */ 201 struct eeprom_port_cfg macCfg_port1; /* x4A */ 202 203 /* DDR SDRAM Configuration */ 204 u16 bufletSize; /* x6A */ 205 u16 bufletCount; /* x6C */ 206 u16 tcpWindowThreshold50; /* x6E */ 207 u16 tcpWindowThreshold25; /* x70 */ 208 u16 tcpWindowThreshold0; /* x72 */ 209 u16 ipHashTableBaseHi; /* x74 */ 210 u16 ipHashTableBaseLo; /* x76 */ 211 u16 ipHashTableSize; /* x78 */ 212 u16 tcpHashTableBaseHi; /* x7A */ 213 u16 tcpHashTableBaseLo; /* x7C */ 214 u16 tcpHashTableSize; /* x7E */ 215 u16 ncbTableBaseHi; /* x80 */ 216 u16 ncbTableBaseLo; /* x82 */ 217 u16 ncbTableSize; /* x84 */ 218 u16 drbTableBaseHi; /* x86 */ 219 u16 drbTableBaseLo; /* x88 */ 220 u16 drbTableSize; /* x8A */ 221 u16 reserved_142[4]; /* x8C */ 222 223 /* TCP/IP Parameters */ 224 u16 ipReassemblyTimeout; /* x94 */ 225 u16 tcpMaxWindowSize; /* x96 */ 226 u16 ipSecurity; /* x98 */ 227 u8 reserved_156[294]; /* x9A */ 228 u16 qDebug[8]; /* QLOGIC USE ONLY x1C0 */ 229 struct eeprom_function_cfg funcCfg_fn0; /* x1D0 */ 230 u16 reserved_510; /* x1FE */ 231 232 /* Address = 512 */ 233 u8 oemSpace[432]; /* x200 */ 234 struct bios_params sBIOSParams_fn1; /* x3B0 */ 235 struct eeprom_function_cfg funcCfg_fn1; /* x3D0 */ 236 u16 reserved_1022; /* x3FE */ 237 238 /* Address = 1024 */ 239 u8 reserved_1024[464]; /* x400 */ 240 struct eeprom_function_cfg funcCfg_fn2; /* x5D0 */ 241 u16 reserved_1534; /* x5FE */ 242 243 /* Address = 1536 */ 244 u8 reserved_1536[432]; /* x600 */ 245 struct bios_params sBIOSParams_fn3; /* x7B0 */ 246 struct eeprom_function_cfg funcCfg_fn3; /* x7D0 */ 247 u16 checksum; /* x7FE */ 248 } __attribute__ ((packed)) isp4022; 249 }; 250}; 251 252 253#endif /* _QL4XNVRM_H_ */