cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom-ngd-ctrl.c (42420B)


      1// SPDX-License-Identifier: GPL-2.0
      2// Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
      3// Copyright (c) 2018, Linaro Limited
      4
      5#include <linux/irq.h>
      6#include <linux/kernel.h>
      7#include <linux/init.h>
      8#include <linux/slab.h>
      9#include <linux/interrupt.h>
     10#include <linux/platform_device.h>
     11#include <linux/dma-mapping.h>
     12#include <linux/dmaengine.h>
     13#include <linux/slimbus.h>
     14#include <linux/delay.h>
     15#include <linux/pm_runtime.h>
     16#include <linux/mutex.h>
     17#include <linux/notifier.h>
     18#include <linux/remoteproc/qcom_rproc.h>
     19#include <linux/of.h>
     20#include <linux/io.h>
     21#include <linux/soc/qcom/qmi.h>
     22#include <linux/soc/qcom/pdr.h>
     23#include <net/sock.h>
     24#include "slimbus.h"
     25
     26/* NGD (Non-ported Generic Device) registers */
     27#define	NGD_CFG			0x0
     28#define	NGD_CFG_ENABLE		BIT(0)
     29#define	NGD_CFG_RX_MSGQ_EN	BIT(1)
     30#define	NGD_CFG_TX_MSGQ_EN	BIT(2)
     31#define	NGD_STATUS		0x4
     32#define NGD_LADDR		BIT(1)
     33#define	NGD_RX_MSGQ_CFG		0x8
     34#define	NGD_INT_EN		0x10
     35#define	NGD_INT_RECFG_DONE	BIT(24)
     36#define	NGD_INT_TX_NACKED_2	BIT(25)
     37#define	NGD_INT_MSG_BUF_CONTE	BIT(26)
     38#define	NGD_INT_MSG_TX_INVAL	BIT(27)
     39#define	NGD_INT_IE_VE_CHG	BIT(28)
     40#define	NGD_INT_DEV_ERR		BIT(29)
     41#define	NGD_INT_RX_MSG_RCVD	BIT(30)
     42#define	NGD_INT_TX_MSG_SENT	BIT(31)
     43#define	NGD_INT_STAT		0x14
     44#define	NGD_INT_CLR		0x18
     45#define DEF_NGD_INT_MASK (NGD_INT_TX_NACKED_2 | NGD_INT_MSG_BUF_CONTE | \
     46				NGD_INT_MSG_TX_INVAL | NGD_INT_IE_VE_CHG | \
     47				NGD_INT_DEV_ERR | NGD_INT_TX_MSG_SENT | \
     48				NGD_INT_RX_MSG_RCVD)
     49
     50/* Slimbus QMI service */
     51#define SLIMBUS_QMI_SVC_ID	0x0301
     52#define SLIMBUS_QMI_SVC_V1	1
     53#define SLIMBUS_QMI_INS_ID	0
     54#define SLIMBUS_QMI_SELECT_INSTANCE_REQ_V01	0x0020
     55#define SLIMBUS_QMI_SELECT_INSTANCE_RESP_V01	0x0020
     56#define SLIMBUS_QMI_POWER_REQ_V01		0x0021
     57#define SLIMBUS_QMI_POWER_RESP_V01		0x0021
     58#define SLIMBUS_QMI_CHECK_FRAMER_STATUS_REQ	0x0022
     59#define SLIMBUS_QMI_CHECK_FRAMER_STATUS_RESP	0x0022
     60#define SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN	14
     61#define SLIMBUS_QMI_POWER_RESP_MAX_MSG_LEN	7
     62#define SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN	14
     63#define SLIMBUS_QMI_SELECT_INSTANCE_RESP_MAX_MSG_LEN	7
     64#define SLIMBUS_QMI_CHECK_FRAMER_STAT_RESP_MAX_MSG_LEN	7
     65/* QMI response timeout of 500ms */
     66#define SLIMBUS_QMI_RESP_TOUT	1000
     67
     68/* User defined commands */
     69#define SLIM_USR_MC_GENERIC_ACK	0x25
     70#define SLIM_USR_MC_MASTER_CAPABILITY	0x0
     71#define SLIM_USR_MC_REPORT_SATELLITE	0x1
     72#define SLIM_USR_MC_ADDR_QUERY		0xD
     73#define SLIM_USR_MC_ADDR_REPLY		0xE
     74#define SLIM_USR_MC_DEFINE_CHAN		0x20
     75#define SLIM_USR_MC_DEF_ACT_CHAN	0x21
     76#define SLIM_USR_MC_CHAN_CTRL		0x23
     77#define SLIM_USR_MC_RECONFIG_NOW	0x24
     78#define SLIM_USR_MC_REQ_BW		0x28
     79#define SLIM_USR_MC_CONNECT_SRC		0x2C
     80#define SLIM_USR_MC_CONNECT_SINK	0x2D
     81#define SLIM_USR_MC_DISCONNECT_PORT	0x2E
     82#define SLIM_USR_MC_REPEAT_CHANGE_VALUE	0x0
     83
     84#define QCOM_SLIM_NGD_AUTOSUSPEND	MSEC_PER_SEC
     85#define SLIM_RX_MSGQ_TIMEOUT_VAL	0x10000
     86
     87#define SLIM_LA_MGR	0xFF
     88#define SLIM_ROOT_FREQ	24576000
     89#define LADDR_RETRY	5
     90
     91/* Per spec.max 40 bytes per received message */
     92#define SLIM_MSGQ_BUF_LEN	40
     93#define QCOM_SLIM_NGD_DESC_NUM	32
     94
     95#define SLIM_MSG_ASM_FIRST_WORD(l, mt, mc, dt, ad) \
     96		((l) | ((mt) << 5) | ((mc) << 8) | ((dt) << 15) | ((ad) << 16))
     97
     98#define INIT_MX_RETRIES 10
     99#define DEF_RETRY_MS	10
    100#define SAT_MAGIC_LSB	0xD9
    101#define SAT_MAGIC_MSB	0xC5
    102#define SAT_MSG_VER	0x1
    103#define SAT_MSG_PROT	0x1
    104#define to_ngd(d)	container_of(d, struct qcom_slim_ngd, dev)
    105
    106struct ngd_reg_offset_data {
    107	u32 offset, size;
    108};
    109
    110static const struct ngd_reg_offset_data ngd_v1_5_offset_info = {
    111	.offset = 0x1000,
    112	.size = 0x1000,
    113};
    114
    115enum qcom_slim_ngd_state {
    116	QCOM_SLIM_NGD_CTRL_AWAKE,
    117	QCOM_SLIM_NGD_CTRL_IDLE,
    118	QCOM_SLIM_NGD_CTRL_ASLEEP,
    119	QCOM_SLIM_NGD_CTRL_DOWN,
    120};
    121
    122struct qcom_slim_ngd_qmi {
    123	struct qmi_handle qmi;
    124	struct sockaddr_qrtr svc_info;
    125	struct qmi_handle svc_event_hdl;
    126	struct qmi_response_type_v01 resp;
    127	struct qmi_handle *handle;
    128	struct completion qmi_comp;
    129};
    130
    131struct qcom_slim_ngd_ctrl;
    132struct qcom_slim_ngd;
    133
    134struct qcom_slim_ngd_dma_desc {
    135	struct dma_async_tx_descriptor *desc;
    136	struct qcom_slim_ngd_ctrl *ctrl;
    137	struct completion *comp;
    138	dma_cookie_t cookie;
    139	dma_addr_t phys;
    140	void *base;
    141};
    142
    143struct qcom_slim_ngd {
    144	struct platform_device *pdev;
    145	void __iomem *base;
    146	int id;
    147};
    148
    149struct qcom_slim_ngd_ctrl {
    150	struct slim_framer framer;
    151	struct slim_controller ctrl;
    152	struct qcom_slim_ngd_qmi qmi;
    153	struct qcom_slim_ngd *ngd;
    154	struct device *dev;
    155	void __iomem *base;
    156	struct dma_chan *dma_rx_channel;
    157	struct dma_chan	*dma_tx_channel;
    158	struct qcom_slim_ngd_dma_desc rx_desc[QCOM_SLIM_NGD_DESC_NUM];
    159	struct qcom_slim_ngd_dma_desc txdesc[QCOM_SLIM_NGD_DESC_NUM];
    160	struct completion reconf;
    161	struct work_struct m_work;
    162	struct work_struct ngd_up_work;
    163	struct workqueue_struct *mwq;
    164	struct completion qmi_up;
    165	spinlock_t tx_buf_lock;
    166	struct mutex tx_lock;
    167	struct mutex ssr_lock;
    168	struct notifier_block nb;
    169	void *notifier;
    170	struct pdr_handle *pdr;
    171	enum qcom_slim_ngd_state state;
    172	dma_addr_t rx_phys_base;
    173	dma_addr_t tx_phys_base;
    174	void *rx_base;
    175	void *tx_base;
    176	int tx_tail;
    177	int tx_head;
    178	u32 ver;
    179};
    180
    181enum slimbus_mode_enum_type_v01 {
    182	/* To force a 32 bit signed enum. Do not change or use*/
    183	SLIMBUS_MODE_ENUM_TYPE_MIN_ENUM_VAL_V01 = INT_MIN,
    184	SLIMBUS_MODE_SATELLITE_V01 = 1,
    185	SLIMBUS_MODE_MASTER_V01 = 2,
    186	SLIMBUS_MODE_ENUM_TYPE_MAX_ENUM_VAL_V01 = INT_MAX,
    187};
    188
    189enum slimbus_pm_enum_type_v01 {
    190	/* To force a 32 bit signed enum. Do not change or use*/
    191	SLIMBUS_PM_ENUM_TYPE_MIN_ENUM_VAL_V01 = INT_MIN,
    192	SLIMBUS_PM_INACTIVE_V01 = 1,
    193	SLIMBUS_PM_ACTIVE_V01 = 2,
    194	SLIMBUS_PM_ENUM_TYPE_MAX_ENUM_VAL_V01 = INT_MAX,
    195};
    196
    197enum slimbus_resp_enum_type_v01 {
    198	SLIMBUS_RESP_ENUM_TYPE_MIN_VAL_V01 = INT_MIN,
    199	SLIMBUS_RESP_SYNCHRONOUS_V01 = 1,
    200	SLIMBUS_RESP_ENUM_TYPE_MAX_VAL_V01 = INT_MAX,
    201};
    202
    203struct slimbus_select_inst_req_msg_v01 {
    204	uint32_t instance;
    205	uint8_t mode_valid;
    206	enum slimbus_mode_enum_type_v01 mode;
    207};
    208
    209struct slimbus_select_inst_resp_msg_v01 {
    210	struct qmi_response_type_v01 resp;
    211};
    212
    213struct slimbus_power_req_msg_v01 {
    214	enum slimbus_pm_enum_type_v01 pm_req;
    215	uint8_t resp_type_valid;
    216	enum slimbus_resp_enum_type_v01 resp_type;
    217};
    218
    219struct slimbus_power_resp_msg_v01 {
    220	struct qmi_response_type_v01 resp;
    221};
    222
    223static struct qmi_elem_info slimbus_select_inst_req_msg_v01_ei[] = {
    224	{
    225		.data_type  = QMI_UNSIGNED_4_BYTE,
    226		.elem_len   = 1,
    227		.elem_size  = sizeof(uint32_t),
    228		.array_type = NO_ARRAY,
    229		.tlv_type   = 0x01,
    230		.offset     = offsetof(struct slimbus_select_inst_req_msg_v01,
    231				       instance),
    232		.ei_array   = NULL,
    233	},
    234	{
    235		.data_type  = QMI_OPT_FLAG,
    236		.elem_len   = 1,
    237		.elem_size  = sizeof(uint8_t),
    238		.array_type = NO_ARRAY,
    239		.tlv_type   = 0x10,
    240		.offset     = offsetof(struct slimbus_select_inst_req_msg_v01,
    241				       mode_valid),
    242		.ei_array   = NULL,
    243	},
    244	{
    245		.data_type  = QMI_UNSIGNED_4_BYTE,
    246		.elem_len   = 1,
    247		.elem_size  = sizeof(enum slimbus_mode_enum_type_v01),
    248		.array_type = NO_ARRAY,
    249		.tlv_type   = 0x10,
    250		.offset     = offsetof(struct slimbus_select_inst_req_msg_v01,
    251				       mode),
    252		.ei_array   = NULL,
    253	},
    254	{
    255		.data_type  = QMI_EOTI,
    256		.elem_len   = 0,
    257		.elem_size  = 0,
    258		.array_type = NO_ARRAY,
    259		.tlv_type   = 0x00,
    260		.offset     = 0,
    261		.ei_array   = NULL,
    262	},
    263};
    264
    265static struct qmi_elem_info slimbus_select_inst_resp_msg_v01_ei[] = {
    266	{
    267		.data_type  = QMI_STRUCT,
    268		.elem_len   = 1,
    269		.elem_size  = sizeof(struct qmi_response_type_v01),
    270		.array_type = NO_ARRAY,
    271		.tlv_type   = 0x02,
    272		.offset     = offsetof(struct slimbus_select_inst_resp_msg_v01,
    273				       resp),
    274		.ei_array   = qmi_response_type_v01_ei,
    275	},
    276	{
    277		.data_type  = QMI_EOTI,
    278		.elem_len   = 0,
    279		.elem_size  = 0,
    280		.array_type = NO_ARRAY,
    281		.tlv_type   = 0x00,
    282		.offset     = 0,
    283		.ei_array   = NULL,
    284	},
    285};
    286
    287static struct qmi_elem_info slimbus_power_req_msg_v01_ei[] = {
    288	{
    289		.data_type  = QMI_UNSIGNED_4_BYTE,
    290		.elem_len   = 1,
    291		.elem_size  = sizeof(enum slimbus_pm_enum_type_v01),
    292		.array_type = NO_ARRAY,
    293		.tlv_type   = 0x01,
    294		.offset     = offsetof(struct slimbus_power_req_msg_v01,
    295				       pm_req),
    296		.ei_array   = NULL,
    297	},
    298	{
    299		.data_type  = QMI_OPT_FLAG,
    300		.elem_len   = 1,
    301		.elem_size  = sizeof(uint8_t),
    302		.array_type = NO_ARRAY,
    303		.tlv_type   = 0x10,
    304		.offset     = offsetof(struct slimbus_power_req_msg_v01,
    305				       resp_type_valid),
    306	},
    307	{
    308		.data_type  = QMI_SIGNED_4_BYTE_ENUM,
    309		.elem_len   = 1,
    310		.elem_size  = sizeof(enum slimbus_resp_enum_type_v01),
    311		.array_type = NO_ARRAY,
    312		.tlv_type   = 0x10,
    313		.offset     = offsetof(struct slimbus_power_req_msg_v01,
    314				       resp_type),
    315	},
    316	{
    317		.data_type  = QMI_EOTI,
    318		.elem_len   = 0,
    319		.elem_size  = 0,
    320		.array_type = NO_ARRAY,
    321		.tlv_type   = 0x00,
    322		.offset     = 0,
    323		.ei_array   = NULL,
    324	},
    325};
    326
    327static struct qmi_elem_info slimbus_power_resp_msg_v01_ei[] = {
    328	{
    329		.data_type  = QMI_STRUCT,
    330		.elem_len   = 1,
    331		.elem_size  = sizeof(struct qmi_response_type_v01),
    332		.array_type = NO_ARRAY,
    333		.tlv_type   = 0x02,
    334		.offset     = offsetof(struct slimbus_power_resp_msg_v01, resp),
    335		.ei_array   = qmi_response_type_v01_ei,
    336	},
    337	{
    338		.data_type  = QMI_EOTI,
    339		.elem_len   = 0,
    340		.elem_size  = 0,
    341		.array_type = NO_ARRAY,
    342		.tlv_type   = 0x00,
    343		.offset     = 0,
    344		.ei_array   = NULL,
    345	},
    346};
    347
    348static int qcom_slim_qmi_send_select_inst_req(struct qcom_slim_ngd_ctrl *ctrl,
    349				struct slimbus_select_inst_req_msg_v01 *req)
    350{
    351	struct slimbus_select_inst_resp_msg_v01 resp = { { 0, 0 } };
    352	struct qmi_txn txn;
    353	int rc;
    354
    355	rc = qmi_txn_init(ctrl->qmi.handle, &txn,
    356				slimbus_select_inst_resp_msg_v01_ei, &resp);
    357	if (rc < 0) {
    358		dev_err(ctrl->dev, "QMI TXN init fail: %d\n", rc);
    359		return rc;
    360	}
    361
    362	rc = qmi_send_request(ctrl->qmi.handle, NULL, &txn,
    363				SLIMBUS_QMI_SELECT_INSTANCE_REQ_V01,
    364				SLIMBUS_QMI_SELECT_INSTANCE_REQ_MAX_MSG_LEN,
    365				slimbus_select_inst_req_msg_v01_ei, req);
    366	if (rc < 0) {
    367		dev_err(ctrl->dev, "QMI send req fail %d\n", rc);
    368		qmi_txn_cancel(&txn);
    369		return rc;
    370	}
    371
    372	rc = qmi_txn_wait(&txn, SLIMBUS_QMI_RESP_TOUT);
    373	if (rc < 0) {
    374		dev_err(ctrl->dev, "QMI TXN wait fail: %d\n", rc);
    375		return rc;
    376	}
    377	/* Check the response */
    378	if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
    379		dev_err(ctrl->dev, "QMI request failed 0x%x\n",
    380			resp.resp.result);
    381		return -EREMOTEIO;
    382	}
    383
    384	return 0;
    385}
    386
    387static void qcom_slim_qmi_power_resp_cb(struct qmi_handle *handle,
    388					struct sockaddr_qrtr *sq,
    389					struct qmi_txn *txn, const void *data)
    390{
    391	struct slimbus_power_resp_msg_v01 *resp;
    392
    393	resp = (struct slimbus_power_resp_msg_v01 *)data;
    394	if (resp->resp.result != QMI_RESULT_SUCCESS_V01)
    395		pr_err("QMI power request failed 0x%x\n",
    396				resp->resp.result);
    397
    398	complete(&txn->completion);
    399}
    400
    401static int qcom_slim_qmi_send_power_request(struct qcom_slim_ngd_ctrl *ctrl,
    402					struct slimbus_power_req_msg_v01 *req)
    403{
    404	struct slimbus_power_resp_msg_v01 resp = { { 0, 0 } };
    405	struct qmi_txn txn;
    406	int rc;
    407
    408	rc = qmi_txn_init(ctrl->qmi.handle, &txn,
    409				slimbus_power_resp_msg_v01_ei, &resp);
    410
    411	rc = qmi_send_request(ctrl->qmi.handle, NULL, &txn,
    412				SLIMBUS_QMI_POWER_REQ_V01,
    413				SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN,
    414				slimbus_power_req_msg_v01_ei, req);
    415	if (rc < 0) {
    416		dev_err(ctrl->dev, "QMI send req fail %d\n", rc);
    417		qmi_txn_cancel(&txn);
    418		return rc;
    419	}
    420
    421	rc = qmi_txn_wait(&txn, SLIMBUS_QMI_RESP_TOUT);
    422	if (rc < 0) {
    423		dev_err(ctrl->dev, "QMI TXN wait fail: %d\n", rc);
    424		return rc;
    425	}
    426
    427	/* Check the response */
    428	if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
    429		dev_err(ctrl->dev, "QMI request failed 0x%x\n",
    430			resp.resp.result);
    431		return -EREMOTEIO;
    432	}
    433
    434	return 0;
    435}
    436
    437static const struct qmi_msg_handler qcom_slim_qmi_msg_handlers[] = {
    438	{
    439		.type = QMI_RESPONSE,
    440		.msg_id = SLIMBUS_QMI_POWER_RESP_V01,
    441		.ei = slimbus_power_resp_msg_v01_ei,
    442		.decoded_size = sizeof(struct slimbus_power_resp_msg_v01),
    443		.fn = qcom_slim_qmi_power_resp_cb,
    444	},
    445	{}
    446};
    447
    448static int qcom_slim_qmi_init(struct qcom_slim_ngd_ctrl *ctrl,
    449			      bool apps_is_master)
    450{
    451	struct slimbus_select_inst_req_msg_v01 req;
    452	struct qmi_handle *handle;
    453	int rc;
    454
    455	handle = devm_kzalloc(ctrl->dev, sizeof(*handle), GFP_KERNEL);
    456	if (!handle)
    457		return -ENOMEM;
    458
    459	rc = qmi_handle_init(handle, SLIMBUS_QMI_POWER_REQ_MAX_MSG_LEN,
    460				NULL, qcom_slim_qmi_msg_handlers);
    461	if (rc < 0) {
    462		dev_err(ctrl->dev, "QMI client init failed: %d\n", rc);
    463		goto qmi_handle_init_failed;
    464	}
    465
    466	rc = kernel_connect(handle->sock,
    467				(struct sockaddr *)&ctrl->qmi.svc_info,
    468				sizeof(ctrl->qmi.svc_info), 0);
    469	if (rc < 0) {
    470		dev_err(ctrl->dev, "Remote Service connect failed: %d\n", rc);
    471		goto qmi_connect_to_service_failed;
    472	}
    473
    474	/* Instance is 0 based */
    475	req.instance = (ctrl->ngd->id >> 1);
    476	req.mode_valid = 1;
    477
    478	/* Mode indicates the role of the ADSP */
    479	if (apps_is_master)
    480		req.mode = SLIMBUS_MODE_SATELLITE_V01;
    481	else
    482		req.mode = SLIMBUS_MODE_MASTER_V01;
    483
    484	ctrl->qmi.handle = handle;
    485
    486	rc = qcom_slim_qmi_send_select_inst_req(ctrl, &req);
    487	if (rc) {
    488		dev_err(ctrl->dev, "failed to select h/w instance\n");
    489		goto qmi_select_instance_failed;
    490	}
    491
    492	return 0;
    493
    494qmi_select_instance_failed:
    495	ctrl->qmi.handle = NULL;
    496qmi_connect_to_service_failed:
    497	qmi_handle_release(handle);
    498qmi_handle_init_failed:
    499	devm_kfree(ctrl->dev, handle);
    500	return rc;
    501}
    502
    503static void qcom_slim_qmi_exit(struct qcom_slim_ngd_ctrl *ctrl)
    504{
    505	if (!ctrl->qmi.handle)
    506		return;
    507
    508	qmi_handle_release(ctrl->qmi.handle);
    509	devm_kfree(ctrl->dev, ctrl->qmi.handle);
    510	ctrl->qmi.handle = NULL;
    511}
    512
    513static int qcom_slim_qmi_power_request(struct qcom_slim_ngd_ctrl *ctrl,
    514				       bool active)
    515{
    516	struct slimbus_power_req_msg_v01 req;
    517
    518	if (active)
    519		req.pm_req = SLIMBUS_PM_ACTIVE_V01;
    520	else
    521		req.pm_req = SLIMBUS_PM_INACTIVE_V01;
    522
    523	req.resp_type_valid = 0;
    524
    525	return qcom_slim_qmi_send_power_request(ctrl, &req);
    526}
    527
    528static u32 *qcom_slim_ngd_tx_msg_get(struct qcom_slim_ngd_ctrl *ctrl, int len,
    529				     struct completion *comp)
    530{
    531	struct qcom_slim_ngd_dma_desc *desc;
    532	unsigned long flags;
    533
    534	spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
    535
    536	if ((ctrl->tx_tail + 1) % QCOM_SLIM_NGD_DESC_NUM == ctrl->tx_head) {
    537		spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
    538		return NULL;
    539	}
    540	desc  = &ctrl->txdesc[ctrl->tx_tail];
    541	desc->base = ctrl->tx_base + ctrl->tx_tail * SLIM_MSGQ_BUF_LEN;
    542	desc->comp = comp;
    543	ctrl->tx_tail = (ctrl->tx_tail + 1) % QCOM_SLIM_NGD_DESC_NUM;
    544
    545	spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
    546
    547	return desc->base;
    548}
    549
    550static void qcom_slim_ngd_tx_msg_dma_cb(void *args)
    551{
    552	struct qcom_slim_ngd_dma_desc *desc = args;
    553	struct qcom_slim_ngd_ctrl *ctrl = desc->ctrl;
    554	unsigned long flags;
    555
    556	spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
    557
    558	if (desc->comp) {
    559		complete(desc->comp);
    560		desc->comp = NULL;
    561	}
    562
    563	ctrl->tx_head = (ctrl->tx_head + 1) % QCOM_SLIM_NGD_DESC_NUM;
    564	spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
    565}
    566
    567static int qcom_slim_ngd_tx_msg_post(struct qcom_slim_ngd_ctrl *ctrl,
    568				     void *buf, int len)
    569{
    570	struct qcom_slim_ngd_dma_desc *desc;
    571	unsigned long flags;
    572	int index, offset;
    573
    574	spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
    575	offset = buf - ctrl->tx_base;
    576	index = offset/SLIM_MSGQ_BUF_LEN;
    577
    578	desc = &ctrl->txdesc[index];
    579	desc->phys = ctrl->tx_phys_base + offset;
    580	desc->base = ctrl->tx_base + offset;
    581	desc->ctrl = ctrl;
    582	len = (len + 3) & 0xfc;
    583
    584	desc->desc = dmaengine_prep_slave_single(ctrl->dma_tx_channel,
    585						desc->phys, len,
    586						DMA_MEM_TO_DEV,
    587						DMA_PREP_INTERRUPT);
    588	if (!desc->desc) {
    589		dev_err(ctrl->dev, "unable to prepare channel\n");
    590		spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
    591		return -EINVAL;
    592	}
    593
    594	desc->desc->callback = qcom_slim_ngd_tx_msg_dma_cb;
    595	desc->desc->callback_param = desc;
    596	desc->desc->cookie = dmaengine_submit(desc->desc);
    597	dma_async_issue_pending(ctrl->dma_tx_channel);
    598	spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
    599
    600	return 0;
    601}
    602
    603static void qcom_slim_ngd_rx(struct qcom_slim_ngd_ctrl *ctrl, u8 *buf)
    604{
    605	u8 mc, mt, len;
    606
    607	mt = SLIM_HEADER_GET_MT(buf[0]);
    608	len = SLIM_HEADER_GET_RL(buf[0]);
    609	mc = SLIM_HEADER_GET_MC(buf[1]);
    610
    611	if (mc == SLIM_USR_MC_MASTER_CAPABILITY &&
    612		mt == SLIM_MSG_MT_SRC_REFERRED_USER)
    613		queue_work(ctrl->mwq, &ctrl->m_work);
    614
    615	if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||
    616	    mc == SLIM_MSG_MC_REPLY_VALUE || (mc == SLIM_USR_MC_ADDR_REPLY &&
    617	    mt == SLIM_MSG_MT_SRC_REFERRED_USER) ||
    618		(mc == SLIM_USR_MC_GENERIC_ACK &&
    619		 mt == SLIM_MSG_MT_SRC_REFERRED_USER)) {
    620		slim_msg_response(&ctrl->ctrl, &buf[4], buf[3], len - 4);
    621		pm_runtime_mark_last_busy(ctrl->ctrl.dev);
    622	}
    623}
    624
    625static void qcom_slim_ngd_rx_msgq_cb(void *args)
    626{
    627	struct qcom_slim_ngd_dma_desc *desc = args;
    628	struct qcom_slim_ngd_ctrl *ctrl = desc->ctrl;
    629
    630	qcom_slim_ngd_rx(ctrl, (u8 *)desc->base);
    631	/* Add descriptor back to the queue */
    632	desc->desc = dmaengine_prep_slave_single(ctrl->dma_rx_channel,
    633					desc->phys, SLIM_MSGQ_BUF_LEN,
    634					DMA_DEV_TO_MEM,
    635					DMA_PREP_INTERRUPT);
    636	if (!desc->desc) {
    637		dev_err(ctrl->dev, "Unable to prepare rx channel\n");
    638		return;
    639	}
    640
    641	desc->desc->callback = qcom_slim_ngd_rx_msgq_cb;
    642	desc->desc->callback_param = desc;
    643	desc->desc->cookie = dmaengine_submit(desc->desc);
    644	dma_async_issue_pending(ctrl->dma_rx_channel);
    645}
    646
    647static int qcom_slim_ngd_post_rx_msgq(struct qcom_slim_ngd_ctrl *ctrl)
    648{
    649	struct qcom_slim_ngd_dma_desc *desc;
    650	int i;
    651
    652	for (i = 0; i < QCOM_SLIM_NGD_DESC_NUM; i++) {
    653		desc = &ctrl->rx_desc[i];
    654		desc->phys = ctrl->rx_phys_base + i * SLIM_MSGQ_BUF_LEN;
    655		desc->ctrl = ctrl;
    656		desc->base = ctrl->rx_base + i * SLIM_MSGQ_BUF_LEN;
    657		desc->desc = dmaengine_prep_slave_single(ctrl->dma_rx_channel,
    658						desc->phys, SLIM_MSGQ_BUF_LEN,
    659						DMA_DEV_TO_MEM,
    660						DMA_PREP_INTERRUPT);
    661		if (!desc->desc) {
    662			dev_err(ctrl->dev, "Unable to prepare rx channel\n");
    663			return -EINVAL;
    664		}
    665
    666		desc->desc->callback = qcom_slim_ngd_rx_msgq_cb;
    667		desc->desc->callback_param = desc;
    668		desc->desc->cookie = dmaengine_submit(desc->desc);
    669	}
    670	dma_async_issue_pending(ctrl->dma_rx_channel);
    671
    672	return 0;
    673}
    674
    675static int qcom_slim_ngd_init_rx_msgq(struct qcom_slim_ngd_ctrl *ctrl)
    676{
    677	struct device *dev = ctrl->dev;
    678	int ret, size;
    679
    680	ctrl->dma_rx_channel = dma_request_chan(dev, "rx");
    681	if (IS_ERR(ctrl->dma_rx_channel)) {
    682		dev_err(dev, "Failed to request RX dma channel");
    683		ret = PTR_ERR(ctrl->dma_rx_channel);
    684		ctrl->dma_rx_channel = NULL;
    685		return ret;
    686	}
    687
    688	size = QCOM_SLIM_NGD_DESC_NUM * SLIM_MSGQ_BUF_LEN;
    689	ctrl->rx_base = dma_alloc_coherent(dev, size, &ctrl->rx_phys_base,
    690					   GFP_KERNEL);
    691	if (!ctrl->rx_base) {
    692		ret = -ENOMEM;
    693		goto rel_rx;
    694	}
    695
    696	ret = qcom_slim_ngd_post_rx_msgq(ctrl);
    697	if (ret) {
    698		dev_err(dev, "post_rx_msgq() failed 0x%x\n", ret);
    699		goto rx_post_err;
    700	}
    701
    702	return 0;
    703
    704rx_post_err:
    705	dma_free_coherent(dev, size, ctrl->rx_base, ctrl->rx_phys_base);
    706rel_rx:
    707	dma_release_channel(ctrl->dma_rx_channel);
    708	return ret;
    709}
    710
    711static int qcom_slim_ngd_init_tx_msgq(struct qcom_slim_ngd_ctrl *ctrl)
    712{
    713	struct device *dev = ctrl->dev;
    714	unsigned long flags;
    715	int ret = 0;
    716	int size;
    717
    718	ctrl->dma_tx_channel = dma_request_chan(dev, "tx");
    719	if (IS_ERR(ctrl->dma_tx_channel)) {
    720		dev_err(dev, "Failed to request TX dma channel");
    721		ret = PTR_ERR(ctrl->dma_tx_channel);
    722		ctrl->dma_tx_channel = NULL;
    723		return ret;
    724	}
    725
    726	size = ((QCOM_SLIM_NGD_DESC_NUM + 1) * SLIM_MSGQ_BUF_LEN);
    727	ctrl->tx_base = dma_alloc_coherent(dev, size, &ctrl->tx_phys_base,
    728					   GFP_KERNEL);
    729	if (!ctrl->tx_base) {
    730		ret = -EINVAL;
    731		goto rel_tx;
    732	}
    733
    734	spin_lock_irqsave(&ctrl->tx_buf_lock, flags);
    735	ctrl->tx_tail = 0;
    736	ctrl->tx_head = 0;
    737	spin_unlock_irqrestore(&ctrl->tx_buf_lock, flags);
    738
    739	return 0;
    740rel_tx:
    741	dma_release_channel(ctrl->dma_tx_channel);
    742	return ret;
    743}
    744
    745static int qcom_slim_ngd_init_dma(struct qcom_slim_ngd_ctrl *ctrl)
    746{
    747	int ret = 0;
    748
    749	ret = qcom_slim_ngd_init_rx_msgq(ctrl);
    750	if (ret) {
    751		dev_err(ctrl->dev, "rx dma init failed\n");
    752		return ret;
    753	}
    754
    755	ret = qcom_slim_ngd_init_tx_msgq(ctrl);
    756	if (ret)
    757		dev_err(ctrl->dev, "tx dma init failed\n");
    758
    759	return ret;
    760}
    761
    762static irqreturn_t qcom_slim_ngd_interrupt(int irq, void *d)
    763{
    764	struct qcom_slim_ngd_ctrl *ctrl = d;
    765	void __iomem *base = ctrl->ngd->base;
    766	u32 stat = readl(base + NGD_INT_STAT);
    767
    768	if ((stat & NGD_INT_MSG_BUF_CONTE) ||
    769		(stat & NGD_INT_MSG_TX_INVAL) || (stat & NGD_INT_DEV_ERR) ||
    770		(stat & NGD_INT_TX_NACKED_2)) {
    771		dev_err(ctrl->dev, "Error Interrupt received 0x%x\n", stat);
    772	}
    773
    774	writel(stat, base + NGD_INT_CLR);
    775
    776	return IRQ_HANDLED;
    777}
    778
    779static int qcom_slim_ngd_xfer_msg(struct slim_controller *sctrl,
    780				  struct slim_msg_txn *txn)
    781{
    782	struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(sctrl->dev);
    783	DECLARE_COMPLETION_ONSTACK(tx_sent);
    784	DECLARE_COMPLETION_ONSTACK(done);
    785	int ret, timeout, i;
    786	u8 wbuf[SLIM_MSGQ_BUF_LEN];
    787	u8 rbuf[SLIM_MSGQ_BUF_LEN];
    788	u32 *pbuf;
    789	u8 *puc;
    790	u8 la = txn->la;
    791	bool usr_msg = false;
    792
    793	if (txn->mt == SLIM_MSG_MT_CORE &&
    794		(txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
    795		 txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW))
    796		return 0;
    797
    798	if (txn->dt == SLIM_MSG_DEST_ENUMADDR)
    799		return -EPROTONOSUPPORT;
    800
    801	if (txn->msg->num_bytes > SLIM_MSGQ_BUF_LEN ||
    802			txn->rl > SLIM_MSGQ_BUF_LEN) {
    803		dev_err(ctrl->dev, "msg exceeds HW limit\n");
    804		return -EINVAL;
    805	}
    806
    807	pbuf = qcom_slim_ngd_tx_msg_get(ctrl, txn->rl, &tx_sent);
    808	if (!pbuf) {
    809		dev_err(ctrl->dev, "Message buffer unavailable\n");
    810		return -ENOMEM;
    811	}
    812
    813	if (txn->mt == SLIM_MSG_MT_CORE &&
    814		(txn->mc == SLIM_MSG_MC_CONNECT_SOURCE ||
    815		txn->mc == SLIM_MSG_MC_CONNECT_SINK ||
    816		txn->mc == SLIM_MSG_MC_DISCONNECT_PORT)) {
    817		txn->mt = SLIM_MSG_MT_DEST_REFERRED_USER;
    818		switch (txn->mc) {
    819		case SLIM_MSG_MC_CONNECT_SOURCE:
    820			txn->mc = SLIM_USR_MC_CONNECT_SRC;
    821			break;
    822		case SLIM_MSG_MC_CONNECT_SINK:
    823			txn->mc = SLIM_USR_MC_CONNECT_SINK;
    824			break;
    825		case SLIM_MSG_MC_DISCONNECT_PORT:
    826			txn->mc = SLIM_USR_MC_DISCONNECT_PORT;
    827			break;
    828		default:
    829			return -EINVAL;
    830		}
    831
    832		usr_msg = true;
    833		i = 0;
    834		wbuf[i++] = txn->la;
    835		la = SLIM_LA_MGR;
    836		wbuf[i++] = txn->msg->wbuf[0];
    837		if (txn->mc != SLIM_USR_MC_DISCONNECT_PORT)
    838			wbuf[i++] = txn->msg->wbuf[1];
    839
    840		txn->comp = &done;
    841		ret = slim_alloc_txn_tid(sctrl, txn);
    842		if (ret) {
    843			dev_err(ctrl->dev, "Unable to allocate TID\n");
    844			return ret;
    845		}
    846
    847		wbuf[i++] = txn->tid;
    848
    849		txn->msg->num_bytes = i;
    850		txn->msg->wbuf = wbuf;
    851		txn->msg->rbuf = rbuf;
    852		txn->rl = txn->msg->num_bytes + 4;
    853	}
    854
    855	/* HW expects length field to be excluded */
    856	txn->rl--;
    857	puc = (u8 *)pbuf;
    858	*pbuf = 0;
    859	if (txn->dt == SLIM_MSG_DEST_LOGICALADDR) {
    860		*pbuf = SLIM_MSG_ASM_FIRST_WORD(txn->rl, txn->mt, txn->mc, 0,
    861				la);
    862		puc += 3;
    863	} else {
    864		*pbuf = SLIM_MSG_ASM_FIRST_WORD(txn->rl, txn->mt, txn->mc, 1,
    865				la);
    866		puc += 2;
    867	}
    868
    869	if (slim_tid_txn(txn->mt, txn->mc))
    870		*(puc++) = txn->tid;
    871
    872	if (slim_ec_txn(txn->mt, txn->mc)) {
    873		*(puc++) = (txn->ec & 0xFF);
    874		*(puc++) = (txn->ec >> 8) & 0xFF;
    875	}
    876
    877	if (txn->msg && txn->msg->wbuf)
    878		memcpy(puc, txn->msg->wbuf, txn->msg->num_bytes);
    879
    880	mutex_lock(&ctrl->tx_lock);
    881	ret = qcom_slim_ngd_tx_msg_post(ctrl, pbuf, txn->rl);
    882	if (ret) {
    883		mutex_unlock(&ctrl->tx_lock);
    884		return ret;
    885	}
    886
    887	timeout = wait_for_completion_timeout(&tx_sent, HZ);
    888	if (!timeout) {
    889		dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
    890					txn->mt);
    891		mutex_unlock(&ctrl->tx_lock);
    892		return -ETIMEDOUT;
    893	}
    894
    895	if (usr_msg) {
    896		timeout = wait_for_completion_timeout(&done, HZ);
    897		if (!timeout) {
    898			dev_err(sctrl->dev, "TX timed out:MC:0x%x,mt:0x%x",
    899				txn->mc, txn->mt);
    900			mutex_unlock(&ctrl->tx_lock);
    901			return -ETIMEDOUT;
    902		}
    903	}
    904
    905	mutex_unlock(&ctrl->tx_lock);
    906	return 0;
    907}
    908
    909static int qcom_slim_ngd_xfer_msg_sync(struct slim_controller *ctrl,
    910				       struct slim_msg_txn *txn)
    911{
    912	DECLARE_COMPLETION_ONSTACK(done);
    913	int ret, timeout;
    914
    915	pm_runtime_get_sync(ctrl->dev);
    916
    917	txn->comp = &done;
    918
    919	ret = qcom_slim_ngd_xfer_msg(ctrl, txn);
    920	if (ret)
    921		return ret;
    922
    923	timeout = wait_for_completion_timeout(&done, HZ);
    924	if (!timeout) {
    925		dev_err(ctrl->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
    926				txn->mt);
    927		return -ETIMEDOUT;
    928	}
    929	return 0;
    930}
    931
    932static int qcom_slim_ngd_enable_stream(struct slim_stream_runtime *rt)
    933{
    934	struct slim_device *sdev = rt->dev;
    935	struct slim_controller *ctrl = sdev->ctrl;
    936	struct slim_val_inf msg =  {0};
    937	u8 wbuf[SLIM_MSGQ_BUF_LEN];
    938	u8 rbuf[SLIM_MSGQ_BUF_LEN];
    939	struct slim_msg_txn txn = {0,};
    940	int i, ret;
    941
    942	txn.mt = SLIM_MSG_MT_DEST_REFERRED_USER;
    943	txn.dt = SLIM_MSG_DEST_LOGICALADDR;
    944	txn.la = SLIM_LA_MGR;
    945	txn.ec = 0;
    946	txn.msg = &msg;
    947	txn.msg->num_bytes = 0;
    948	txn.msg->wbuf = wbuf;
    949	txn.msg->rbuf = rbuf;
    950
    951	for (i = 0; i < rt->num_ports; i++) {
    952		struct slim_port *port = &rt->ports[i];
    953
    954		if (txn.msg->num_bytes == 0) {
    955			int seg_interval = SLIM_SLOTS_PER_SUPERFRAME/rt->ratem;
    956			int exp;
    957
    958			wbuf[txn.msg->num_bytes++] = sdev->laddr;
    959			wbuf[txn.msg->num_bytes] = rt->bps >> 2 |
    960						   (port->ch.aux_fmt << 6);
    961
    962			/* Data channel segment interval not multiple of 3 */
    963			exp = seg_interval % 3;
    964			if (exp)
    965				wbuf[txn.msg->num_bytes] |= BIT(5);
    966
    967			txn.msg->num_bytes++;
    968			wbuf[txn.msg->num_bytes++] = exp << 4 | rt->prot;
    969
    970			if (rt->prot == SLIM_PROTO_ISO)
    971				wbuf[txn.msg->num_bytes++] =
    972						port->ch.prrate |
    973						SLIM_CHANNEL_CONTENT_FL;
    974			else
    975				wbuf[txn.msg->num_bytes++] =  port->ch.prrate;
    976
    977			ret = slim_alloc_txn_tid(ctrl, &txn);
    978			if (ret) {
    979				dev_err(&sdev->dev, "Fail to allocate TID\n");
    980				return -ENXIO;
    981			}
    982			wbuf[txn.msg->num_bytes++] = txn.tid;
    983		}
    984		wbuf[txn.msg->num_bytes++] = port->ch.id;
    985	}
    986
    987	txn.mc = SLIM_USR_MC_DEF_ACT_CHAN;
    988	txn.rl = txn.msg->num_bytes + 4;
    989	ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);
    990	if (ret) {
    991		slim_free_txn_tid(ctrl, &txn);
    992		dev_err(&sdev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn.mc,
    993				txn.mt);
    994		return ret;
    995	}
    996
    997	txn.mc = SLIM_USR_MC_RECONFIG_NOW;
    998	txn.msg->num_bytes = 2;
    999	wbuf[1] = sdev->laddr;
   1000	txn.rl = txn.msg->num_bytes + 4;
   1001
   1002	ret = slim_alloc_txn_tid(ctrl, &txn);
   1003	if (ret) {
   1004		dev_err(ctrl->dev, "Fail to allocate TID\n");
   1005		return ret;
   1006	}
   1007
   1008	wbuf[0] = txn.tid;
   1009	ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);
   1010	if (ret) {
   1011		slim_free_txn_tid(ctrl, &txn);
   1012		dev_err(&sdev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn.mc,
   1013				txn.mt);
   1014	}
   1015
   1016	return ret;
   1017}
   1018
   1019static int qcom_slim_ngd_get_laddr(struct slim_controller *ctrl,
   1020				   struct slim_eaddr *ea, u8 *laddr)
   1021{
   1022	struct slim_val_inf msg =  {0};
   1023	u8 failed_ea[6] = {0, 0, 0, 0, 0, 0};
   1024	struct slim_msg_txn txn;
   1025	u8 wbuf[10] = {0};
   1026	u8 rbuf[10] = {0};
   1027	int ret;
   1028
   1029	txn.mt = SLIM_MSG_MT_DEST_REFERRED_USER;
   1030	txn.dt = SLIM_MSG_DEST_LOGICALADDR;
   1031	txn.la = SLIM_LA_MGR;
   1032	txn.ec = 0;
   1033
   1034	txn.mc = SLIM_USR_MC_ADDR_QUERY;
   1035	txn.rl = 11;
   1036	txn.msg = &msg;
   1037	txn.msg->num_bytes = 7;
   1038	txn.msg->wbuf = wbuf;
   1039	txn.msg->rbuf = rbuf;
   1040
   1041	ret = slim_alloc_txn_tid(ctrl, &txn);
   1042	if (ret < 0)
   1043		return ret;
   1044
   1045	wbuf[0] = (u8)txn.tid;
   1046	memcpy(&wbuf[1], ea, sizeof(*ea));
   1047
   1048	ret = qcom_slim_ngd_xfer_msg_sync(ctrl, &txn);
   1049	if (ret) {
   1050		slim_free_txn_tid(ctrl, &txn);
   1051		return ret;
   1052	}
   1053
   1054	if (!memcmp(rbuf, failed_ea, 6))
   1055		return -ENXIO;
   1056
   1057	*laddr = rbuf[6];
   1058
   1059	return ret;
   1060}
   1061
   1062static int qcom_slim_ngd_exit_dma(struct qcom_slim_ngd_ctrl *ctrl)
   1063{
   1064	if (ctrl->dma_rx_channel) {
   1065		dmaengine_terminate_sync(ctrl->dma_rx_channel);
   1066		dma_release_channel(ctrl->dma_rx_channel);
   1067	}
   1068
   1069	if (ctrl->dma_tx_channel) {
   1070		dmaengine_terminate_sync(ctrl->dma_tx_channel);
   1071		dma_release_channel(ctrl->dma_tx_channel);
   1072	}
   1073
   1074	ctrl->dma_tx_channel = ctrl->dma_rx_channel = NULL;
   1075
   1076	return 0;
   1077}
   1078
   1079static void qcom_slim_ngd_setup(struct qcom_slim_ngd_ctrl *ctrl)
   1080{
   1081	u32 cfg = readl_relaxed(ctrl->ngd->base);
   1082
   1083	if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN ||
   1084		ctrl->state == QCOM_SLIM_NGD_CTRL_ASLEEP)
   1085		qcom_slim_ngd_init_dma(ctrl);
   1086
   1087	/* By default enable message queues */
   1088	cfg |= NGD_CFG_RX_MSGQ_EN;
   1089	cfg |= NGD_CFG_TX_MSGQ_EN;
   1090
   1091	/* Enable NGD if it's not already enabled*/
   1092	if (!(cfg & NGD_CFG_ENABLE))
   1093		cfg |= NGD_CFG_ENABLE;
   1094
   1095	writel_relaxed(cfg, ctrl->ngd->base);
   1096}
   1097
   1098static int qcom_slim_ngd_power_up(struct qcom_slim_ngd_ctrl *ctrl)
   1099{
   1100	enum qcom_slim_ngd_state cur_state = ctrl->state;
   1101	struct qcom_slim_ngd *ngd = ctrl->ngd;
   1102	u32 laddr, rx_msgq;
   1103	int timeout, ret = 0;
   1104
   1105	if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN) {
   1106		timeout = wait_for_completion_timeout(&ctrl->qmi.qmi_comp, HZ);
   1107		if (!timeout)
   1108			return -EREMOTEIO;
   1109	}
   1110
   1111	if (ctrl->state == QCOM_SLIM_NGD_CTRL_ASLEEP ||
   1112		ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN) {
   1113		ret = qcom_slim_qmi_power_request(ctrl, true);
   1114		if (ret) {
   1115			dev_err(ctrl->dev, "SLIM QMI power request failed:%d\n",
   1116					ret);
   1117			return ret;
   1118		}
   1119	}
   1120
   1121	ctrl->ver = readl_relaxed(ctrl->base);
   1122	/* Version info in 16 MSbits */
   1123	ctrl->ver >>= 16;
   1124
   1125	laddr = readl_relaxed(ngd->base + NGD_STATUS);
   1126	if (laddr & NGD_LADDR) {
   1127		/*
   1128		 * external MDM restart case where ADSP itself was active framer
   1129		 * For example, modem restarted when playback was active
   1130		 */
   1131		if (cur_state == QCOM_SLIM_NGD_CTRL_AWAKE) {
   1132			dev_info(ctrl->dev, "Subsys restart: ADSP active framer\n");
   1133			return 0;
   1134		}
   1135		qcom_slim_ngd_setup(ctrl);
   1136		return 0;
   1137	}
   1138
   1139	writel_relaxed(DEF_NGD_INT_MASK, ngd->base + NGD_INT_EN);
   1140	rx_msgq = readl_relaxed(ngd->base + NGD_RX_MSGQ_CFG);
   1141
   1142	writel_relaxed(rx_msgq|SLIM_RX_MSGQ_TIMEOUT_VAL,
   1143				ngd->base + NGD_RX_MSGQ_CFG);
   1144	qcom_slim_ngd_setup(ctrl);
   1145
   1146	timeout = wait_for_completion_timeout(&ctrl->reconf, HZ);
   1147	if (!timeout) {
   1148		dev_err(ctrl->dev, "capability exchange timed-out\n");
   1149		return -ETIMEDOUT;
   1150	}
   1151
   1152	return 0;
   1153}
   1154
   1155static void qcom_slim_ngd_notify_slaves(struct qcom_slim_ngd_ctrl *ctrl)
   1156{
   1157	struct slim_device *sbdev;
   1158	struct device_node *node;
   1159
   1160	for_each_child_of_node(ctrl->ngd->pdev->dev.of_node, node) {
   1161		sbdev = of_slim_get_device(&ctrl->ctrl, node);
   1162		if (!sbdev)
   1163			continue;
   1164
   1165		if (slim_get_logical_addr(sbdev))
   1166			dev_err(ctrl->dev, "Failed to get logical address\n");
   1167	}
   1168}
   1169
   1170static void qcom_slim_ngd_master_worker(struct work_struct *work)
   1171{
   1172	struct qcom_slim_ngd_ctrl *ctrl;
   1173	struct slim_msg_txn txn;
   1174	struct slim_val_inf msg = {0};
   1175	int retries = 0;
   1176	u8 wbuf[8];
   1177	int ret = 0;
   1178
   1179	ctrl = container_of(work, struct qcom_slim_ngd_ctrl, m_work);
   1180	txn.dt = SLIM_MSG_DEST_LOGICALADDR;
   1181	txn.ec = 0;
   1182	txn.mc = SLIM_USR_MC_REPORT_SATELLITE;
   1183	txn.mt = SLIM_MSG_MT_SRC_REFERRED_USER;
   1184	txn.la = SLIM_LA_MGR;
   1185	wbuf[0] = SAT_MAGIC_LSB;
   1186	wbuf[1] = SAT_MAGIC_MSB;
   1187	wbuf[2] = SAT_MSG_VER;
   1188	wbuf[3] = SAT_MSG_PROT;
   1189	txn.msg = &msg;
   1190	txn.msg->wbuf = wbuf;
   1191	txn.msg->num_bytes = 4;
   1192	txn.rl = 8;
   1193
   1194	dev_info(ctrl->dev, "SLIM SAT: Rcvd master capability\n");
   1195
   1196capability_retry:
   1197	ret = qcom_slim_ngd_xfer_msg(&ctrl->ctrl, &txn);
   1198	if (!ret) {
   1199		if (ctrl->state >= QCOM_SLIM_NGD_CTRL_ASLEEP)
   1200			complete(&ctrl->reconf);
   1201		else
   1202			dev_err(ctrl->dev, "unexpected state:%d\n",
   1203						ctrl->state);
   1204
   1205		if (ctrl->state == QCOM_SLIM_NGD_CTRL_DOWN)
   1206			qcom_slim_ngd_notify_slaves(ctrl);
   1207
   1208	} else if (ret == -EIO) {
   1209		dev_err(ctrl->dev, "capability message NACKed, retrying\n");
   1210		if (retries < INIT_MX_RETRIES) {
   1211			msleep(DEF_RETRY_MS);
   1212			retries++;
   1213			goto capability_retry;
   1214		}
   1215	} else {
   1216		dev_err(ctrl->dev, "SLIM: capability TX failed:%d\n", ret);
   1217	}
   1218}
   1219
   1220static int qcom_slim_ngd_update_device_status(struct device *dev, void *null)
   1221{
   1222	slim_report_absent(to_slim_device(dev));
   1223
   1224	return 0;
   1225}
   1226
   1227static int qcom_slim_ngd_runtime_resume(struct device *dev)
   1228{
   1229	struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);
   1230	int ret = 0;
   1231
   1232	if (!ctrl->qmi.handle)
   1233		return 0;
   1234
   1235	if (ctrl->state >= QCOM_SLIM_NGD_CTRL_ASLEEP)
   1236		ret = qcom_slim_ngd_power_up(ctrl);
   1237	if (ret) {
   1238		/* Did SSR cause this power up failure */
   1239		if (ctrl->state != QCOM_SLIM_NGD_CTRL_DOWN)
   1240			ctrl->state = QCOM_SLIM_NGD_CTRL_ASLEEP;
   1241		else
   1242			dev_err(ctrl->dev, "HW wakeup attempt during SSR\n");
   1243	} else {
   1244		ctrl->state = QCOM_SLIM_NGD_CTRL_AWAKE;
   1245	}
   1246
   1247	return 0;
   1248}
   1249
   1250static int qcom_slim_ngd_enable(struct qcom_slim_ngd_ctrl *ctrl, bool enable)
   1251{
   1252	if (enable) {
   1253		int ret = qcom_slim_qmi_init(ctrl, false);
   1254
   1255		if (ret) {
   1256			dev_err(ctrl->dev, "qmi init fail, ret:%d, state:%d\n",
   1257				ret, ctrl->state);
   1258			return ret;
   1259		}
   1260		/* controller state should be in sync with framework state */
   1261		complete(&ctrl->qmi.qmi_comp);
   1262		if (!pm_runtime_enabled(ctrl->ctrl.dev) ||
   1263			 !pm_runtime_suspended(ctrl->ctrl.dev))
   1264			qcom_slim_ngd_runtime_resume(ctrl->ctrl.dev);
   1265		else
   1266			pm_runtime_resume(ctrl->ctrl.dev);
   1267
   1268		pm_runtime_mark_last_busy(ctrl->ctrl.dev);
   1269		pm_runtime_put(ctrl->ctrl.dev);
   1270
   1271		ret = slim_register_controller(&ctrl->ctrl);
   1272		if (ret) {
   1273			dev_err(ctrl->dev, "error adding slim controller\n");
   1274			return ret;
   1275		}
   1276
   1277		dev_info(ctrl->dev, "SLIM controller Registered\n");
   1278	} else {
   1279		qcom_slim_qmi_exit(ctrl);
   1280		slim_unregister_controller(&ctrl->ctrl);
   1281	}
   1282
   1283	return 0;
   1284}
   1285
   1286static int qcom_slim_ngd_qmi_new_server(struct qmi_handle *hdl,
   1287					struct qmi_service *service)
   1288{
   1289	struct qcom_slim_ngd_qmi *qmi =
   1290		container_of(hdl, struct qcom_slim_ngd_qmi, svc_event_hdl);
   1291	struct qcom_slim_ngd_ctrl *ctrl =
   1292		container_of(qmi, struct qcom_slim_ngd_ctrl, qmi);
   1293
   1294	qmi->svc_info.sq_family = AF_QIPCRTR;
   1295	qmi->svc_info.sq_node = service->node;
   1296	qmi->svc_info.sq_port = service->port;
   1297
   1298	complete(&ctrl->qmi_up);
   1299
   1300	return 0;
   1301}
   1302
   1303static void qcom_slim_ngd_qmi_del_server(struct qmi_handle *hdl,
   1304					 struct qmi_service *service)
   1305{
   1306	struct qcom_slim_ngd_qmi *qmi =
   1307		container_of(hdl, struct qcom_slim_ngd_qmi, svc_event_hdl);
   1308	struct qcom_slim_ngd_ctrl *ctrl =
   1309		container_of(qmi, struct qcom_slim_ngd_ctrl, qmi);
   1310
   1311	reinit_completion(&ctrl->qmi_up);
   1312	qmi->svc_info.sq_node = 0;
   1313	qmi->svc_info.sq_port = 0;
   1314}
   1315
   1316static const struct qmi_ops qcom_slim_ngd_qmi_svc_event_ops = {
   1317	.new_server = qcom_slim_ngd_qmi_new_server,
   1318	.del_server = qcom_slim_ngd_qmi_del_server,
   1319};
   1320
   1321static int qcom_slim_ngd_qmi_svc_event_init(struct qcom_slim_ngd_ctrl *ctrl)
   1322{
   1323	struct qcom_slim_ngd_qmi *qmi = &ctrl->qmi;
   1324	int ret;
   1325
   1326	ret = qmi_handle_init(&qmi->svc_event_hdl, 0,
   1327				&qcom_slim_ngd_qmi_svc_event_ops, NULL);
   1328	if (ret < 0) {
   1329		dev_err(ctrl->dev, "qmi_handle_init failed: %d\n", ret);
   1330		return ret;
   1331	}
   1332
   1333	ret = qmi_add_lookup(&qmi->svc_event_hdl, SLIMBUS_QMI_SVC_ID,
   1334			SLIMBUS_QMI_SVC_V1, SLIMBUS_QMI_INS_ID);
   1335	if (ret < 0) {
   1336		dev_err(ctrl->dev, "qmi_add_lookup failed: %d\n", ret);
   1337		qmi_handle_release(&qmi->svc_event_hdl);
   1338	}
   1339	return ret;
   1340}
   1341
   1342static void qcom_slim_ngd_qmi_svc_event_deinit(struct qcom_slim_ngd_qmi *qmi)
   1343{
   1344	qmi_handle_release(&qmi->svc_event_hdl);
   1345}
   1346
   1347static struct platform_driver qcom_slim_ngd_driver;
   1348#define QCOM_SLIM_NGD_DRV_NAME	"qcom,slim-ngd"
   1349
   1350static const struct of_device_id qcom_slim_ngd_dt_match[] = {
   1351	{
   1352		.compatible = "qcom,slim-ngd-v1.5.0",
   1353		.data = &ngd_v1_5_offset_info,
   1354	},{
   1355		.compatible = "qcom,slim-ngd-v2.1.0",
   1356		.data = &ngd_v1_5_offset_info,
   1357	},
   1358	{}
   1359};
   1360
   1361MODULE_DEVICE_TABLE(of, qcom_slim_ngd_dt_match);
   1362
   1363static void qcom_slim_ngd_down(struct qcom_slim_ngd_ctrl *ctrl)
   1364{
   1365	mutex_lock(&ctrl->ssr_lock);
   1366	device_for_each_child(ctrl->ctrl.dev, NULL,
   1367			      qcom_slim_ngd_update_device_status);
   1368	qcom_slim_ngd_enable(ctrl, false);
   1369	mutex_unlock(&ctrl->ssr_lock);
   1370}
   1371
   1372static void qcom_slim_ngd_up_worker(struct work_struct *work)
   1373{
   1374	struct qcom_slim_ngd_ctrl *ctrl;
   1375
   1376	ctrl = container_of(work, struct qcom_slim_ngd_ctrl, ngd_up_work);
   1377
   1378	/* Make sure qmi service is up before continuing */
   1379	wait_for_completion_interruptible(&ctrl->qmi_up);
   1380
   1381	mutex_lock(&ctrl->ssr_lock);
   1382	qcom_slim_ngd_enable(ctrl, true);
   1383	mutex_unlock(&ctrl->ssr_lock);
   1384}
   1385
   1386static int qcom_slim_ngd_ssr_pdr_notify(struct qcom_slim_ngd_ctrl *ctrl,
   1387					unsigned long action)
   1388{
   1389	switch (action) {
   1390	case QCOM_SSR_BEFORE_SHUTDOWN:
   1391	case SERVREG_SERVICE_STATE_DOWN:
   1392		/* Make sure the last dma xfer is finished */
   1393		mutex_lock(&ctrl->tx_lock);
   1394		if (ctrl->state != QCOM_SLIM_NGD_CTRL_DOWN) {
   1395			pm_runtime_get_noresume(ctrl->ctrl.dev);
   1396			ctrl->state = QCOM_SLIM_NGD_CTRL_DOWN;
   1397			qcom_slim_ngd_down(ctrl);
   1398			qcom_slim_ngd_exit_dma(ctrl);
   1399		}
   1400		mutex_unlock(&ctrl->tx_lock);
   1401		break;
   1402	case QCOM_SSR_AFTER_POWERUP:
   1403	case SERVREG_SERVICE_STATE_UP:
   1404		schedule_work(&ctrl->ngd_up_work);
   1405		break;
   1406	default:
   1407		break;
   1408	}
   1409
   1410	return NOTIFY_OK;
   1411}
   1412
   1413static int qcom_slim_ngd_ssr_notify(struct notifier_block *nb,
   1414				    unsigned long action,
   1415				    void *data)
   1416{
   1417	struct qcom_slim_ngd_ctrl *ctrl = container_of(nb,
   1418					       struct qcom_slim_ngd_ctrl, nb);
   1419
   1420	return qcom_slim_ngd_ssr_pdr_notify(ctrl, action);
   1421}
   1422
   1423static void slim_pd_status(int state, char *svc_path, void *priv)
   1424{
   1425	struct qcom_slim_ngd_ctrl *ctrl = (struct qcom_slim_ngd_ctrl *)priv;
   1426
   1427	qcom_slim_ngd_ssr_pdr_notify(ctrl, state);
   1428}
   1429static int of_qcom_slim_ngd_register(struct device *parent,
   1430				     struct qcom_slim_ngd_ctrl *ctrl)
   1431{
   1432	const struct ngd_reg_offset_data *data;
   1433	struct qcom_slim_ngd *ngd;
   1434	const struct of_device_id *match;
   1435	struct device_node *node;
   1436	u32 id;
   1437	int ret;
   1438
   1439	match = of_match_node(qcom_slim_ngd_dt_match, parent->of_node);
   1440	data = match->data;
   1441	for_each_available_child_of_node(parent->of_node, node) {
   1442		if (of_property_read_u32(node, "reg", &id))
   1443			continue;
   1444
   1445		ngd = kzalloc(sizeof(*ngd), GFP_KERNEL);
   1446		if (!ngd) {
   1447			of_node_put(node);
   1448			return -ENOMEM;
   1449		}
   1450
   1451		ngd->pdev = platform_device_alloc(QCOM_SLIM_NGD_DRV_NAME, id);
   1452		if (!ngd->pdev) {
   1453			kfree(ngd);
   1454			of_node_put(node);
   1455			return -ENOMEM;
   1456		}
   1457		ngd->id = id;
   1458		ngd->pdev->dev.parent = parent;
   1459
   1460		ret = driver_set_override(&ngd->pdev->dev,
   1461					  &ngd->pdev->driver_override,
   1462					  QCOM_SLIM_NGD_DRV_NAME,
   1463					  strlen(QCOM_SLIM_NGD_DRV_NAME));
   1464		if (ret) {
   1465			platform_device_put(ngd->pdev);
   1466			kfree(ngd);
   1467			of_node_put(node);
   1468			return ret;
   1469		}
   1470		ngd->pdev->dev.of_node = node;
   1471		ctrl->ngd = ngd;
   1472
   1473		platform_device_add(ngd->pdev);
   1474		ngd->base = ctrl->base + ngd->id * data->offset +
   1475					(ngd->id - 1) * data->size;
   1476
   1477		return 0;
   1478	}
   1479
   1480	return -ENODEV;
   1481}
   1482
   1483static int qcom_slim_ngd_probe(struct platform_device *pdev)
   1484{
   1485	struct device *dev = &pdev->dev;
   1486	struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev->parent);
   1487	int ret;
   1488
   1489	ctrl->ctrl.dev = dev;
   1490
   1491	platform_set_drvdata(pdev, ctrl);
   1492	pm_runtime_use_autosuspend(dev);
   1493	pm_runtime_set_autosuspend_delay(dev, QCOM_SLIM_NGD_AUTOSUSPEND);
   1494	pm_runtime_set_suspended(dev);
   1495	pm_runtime_enable(dev);
   1496	pm_runtime_get_noresume(dev);
   1497	ret = qcom_slim_ngd_qmi_svc_event_init(ctrl);
   1498	if (ret) {
   1499		dev_err(&pdev->dev, "QMI service registration failed:%d", ret);
   1500		return ret;
   1501	}
   1502
   1503	INIT_WORK(&ctrl->m_work, qcom_slim_ngd_master_worker);
   1504	INIT_WORK(&ctrl->ngd_up_work, qcom_slim_ngd_up_worker);
   1505	ctrl->mwq = create_singlethread_workqueue("ngd_master");
   1506	if (!ctrl->mwq) {
   1507		dev_err(&pdev->dev, "Failed to start master worker\n");
   1508		ret = -ENOMEM;
   1509		goto wq_err;
   1510	}
   1511
   1512	return 0;
   1513wq_err:
   1514	qcom_slim_ngd_qmi_svc_event_deinit(&ctrl->qmi);
   1515	if (ctrl->mwq)
   1516		destroy_workqueue(ctrl->mwq);
   1517
   1518	return ret;
   1519}
   1520
   1521static int qcom_slim_ngd_ctrl_probe(struct platform_device *pdev)
   1522{
   1523	struct device *dev = &pdev->dev;
   1524	struct qcom_slim_ngd_ctrl *ctrl;
   1525	struct resource *res;
   1526	int ret;
   1527	struct pdr_service *pds;
   1528
   1529	ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
   1530	if (!ctrl)
   1531		return -ENOMEM;
   1532
   1533	dev_set_drvdata(dev, ctrl);
   1534
   1535	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
   1536	ctrl->base = devm_ioremap_resource(dev, res);
   1537	if (IS_ERR(ctrl->base))
   1538		return PTR_ERR(ctrl->base);
   1539
   1540	ret = platform_get_irq(pdev, 0);
   1541	if (ret < 0)
   1542		return ret;
   1543
   1544	ret = devm_request_irq(dev, ret, qcom_slim_ngd_interrupt,
   1545			       IRQF_TRIGGER_HIGH, "slim-ngd", ctrl);
   1546	if (ret) {
   1547		dev_err(&pdev->dev, "request IRQ failed\n");
   1548		return ret;
   1549	}
   1550
   1551	ctrl->nb.notifier_call = qcom_slim_ngd_ssr_notify;
   1552	ctrl->notifier = qcom_register_ssr_notifier("lpass", &ctrl->nb);
   1553	if (IS_ERR(ctrl->notifier))
   1554		return PTR_ERR(ctrl->notifier);
   1555
   1556	ctrl->dev = dev;
   1557	ctrl->framer.rootfreq = SLIM_ROOT_FREQ >> 3;
   1558	ctrl->framer.superfreq =
   1559		ctrl->framer.rootfreq / SLIM_CL_PER_SUPERFRAME_DIV8;
   1560
   1561	ctrl->ctrl.a_framer = &ctrl->framer;
   1562	ctrl->ctrl.clkgear = SLIM_MAX_CLK_GEAR;
   1563	ctrl->ctrl.get_laddr = qcom_slim_ngd_get_laddr;
   1564	ctrl->ctrl.enable_stream = qcom_slim_ngd_enable_stream;
   1565	ctrl->ctrl.xfer_msg = qcom_slim_ngd_xfer_msg;
   1566	ctrl->ctrl.wakeup = NULL;
   1567	ctrl->state = QCOM_SLIM_NGD_CTRL_DOWN;
   1568
   1569	mutex_init(&ctrl->tx_lock);
   1570	mutex_init(&ctrl->ssr_lock);
   1571	spin_lock_init(&ctrl->tx_buf_lock);
   1572	init_completion(&ctrl->reconf);
   1573	init_completion(&ctrl->qmi.qmi_comp);
   1574	init_completion(&ctrl->qmi_up);
   1575
   1576	ctrl->pdr = pdr_handle_alloc(slim_pd_status, ctrl);
   1577	if (IS_ERR(ctrl->pdr)) {
   1578		dev_err(dev, "Failed to init PDR handle\n");
   1579		return PTR_ERR(ctrl->pdr);
   1580	}
   1581
   1582	pds = pdr_add_lookup(ctrl->pdr, "avs/audio", "msm/adsp/audio_pd");
   1583	if (IS_ERR(pds) && PTR_ERR(pds) != -EALREADY) {
   1584		dev_err(dev, "pdr add lookup failed: %d\n", ret);
   1585		return PTR_ERR(pds);
   1586	}
   1587
   1588	platform_driver_register(&qcom_slim_ngd_driver);
   1589	return of_qcom_slim_ngd_register(dev, ctrl);
   1590}
   1591
   1592static int qcom_slim_ngd_ctrl_remove(struct platform_device *pdev)
   1593{
   1594	platform_driver_unregister(&qcom_slim_ngd_driver);
   1595
   1596	return 0;
   1597}
   1598
   1599static int qcom_slim_ngd_remove(struct platform_device *pdev)
   1600{
   1601	struct qcom_slim_ngd_ctrl *ctrl = platform_get_drvdata(pdev);
   1602
   1603	pm_runtime_disable(&pdev->dev);
   1604	pdr_handle_release(ctrl->pdr);
   1605	qcom_unregister_ssr_notifier(ctrl->notifier, &ctrl->nb);
   1606	qcom_slim_ngd_enable(ctrl, false);
   1607	qcom_slim_ngd_exit_dma(ctrl);
   1608	qcom_slim_ngd_qmi_svc_event_deinit(&ctrl->qmi);
   1609	if (ctrl->mwq)
   1610		destroy_workqueue(ctrl->mwq);
   1611
   1612	kfree(ctrl->ngd);
   1613	ctrl->ngd = NULL;
   1614	return 0;
   1615}
   1616
   1617static int __maybe_unused qcom_slim_ngd_runtime_idle(struct device *dev)
   1618{
   1619	struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);
   1620
   1621	if (ctrl->state == QCOM_SLIM_NGD_CTRL_AWAKE)
   1622		ctrl->state = QCOM_SLIM_NGD_CTRL_IDLE;
   1623	pm_request_autosuspend(dev);
   1624	return -EAGAIN;
   1625}
   1626
   1627static int __maybe_unused qcom_slim_ngd_runtime_suspend(struct device *dev)
   1628{
   1629	struct qcom_slim_ngd_ctrl *ctrl = dev_get_drvdata(dev);
   1630	int ret = 0;
   1631
   1632	qcom_slim_ngd_exit_dma(ctrl);
   1633	if (!ctrl->qmi.handle)
   1634		return 0;
   1635
   1636	ret = qcom_slim_qmi_power_request(ctrl, false);
   1637	if (ret && ret != -EBUSY)
   1638		dev_info(ctrl->dev, "slim resource not idle:%d\n", ret);
   1639	if (!ret || ret == -ETIMEDOUT)
   1640		ctrl->state = QCOM_SLIM_NGD_CTRL_ASLEEP;
   1641
   1642	return ret;
   1643}
   1644
   1645static const struct dev_pm_ops qcom_slim_ngd_dev_pm_ops = {
   1646	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
   1647				pm_runtime_force_resume)
   1648	SET_RUNTIME_PM_OPS(
   1649		qcom_slim_ngd_runtime_suspend,
   1650		qcom_slim_ngd_runtime_resume,
   1651		qcom_slim_ngd_runtime_idle
   1652	)
   1653};
   1654
   1655static struct platform_driver qcom_slim_ngd_ctrl_driver = {
   1656	.probe = qcom_slim_ngd_ctrl_probe,
   1657	.remove = qcom_slim_ngd_ctrl_remove,
   1658	.driver	= {
   1659		.name = "qcom,slim-ngd-ctrl",
   1660		.of_match_table = qcom_slim_ngd_dt_match,
   1661	},
   1662};
   1663
   1664static struct platform_driver qcom_slim_ngd_driver = {
   1665	.probe = qcom_slim_ngd_probe,
   1666	.remove = qcom_slim_ngd_remove,
   1667	.driver	= {
   1668		.name = QCOM_SLIM_NGD_DRV_NAME,
   1669		.pm = &qcom_slim_ngd_dev_pm_ops,
   1670	},
   1671};
   1672
   1673module_platform_driver(qcom_slim_ngd_ctrl_driver);
   1674MODULE_LICENSE("GPL v2");
   1675MODULE_DESCRIPTION("Qualcomm SLIMBus NGD controller");