soc.h (4401B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2015 Atmel 4 * 5 * Boris Brezillon <boris.brezillon@free-electrons.com 6 */ 7 8#ifndef __AT91_SOC_H 9#define __AT91_SOC_H 10 11#include <linux/sys_soc.h> 12 13struct at91_soc { 14 u32 cidr_match; 15 u32 cidr_mask; 16 u32 version_mask; 17 u32 exid_match; 18 const char *name; 19 const char *family; 20}; 21 22#define AT91_SOC(__cidr, __cidr_mask, __version_mask, __exid, \ 23 __name, __family) \ 24 { \ 25 .cidr_match = (__cidr), \ 26 .cidr_mask = (__cidr_mask), \ 27 .version_mask = (__version_mask), \ 28 .exid_match = (__exid), \ 29 .name = (__name), \ 30 .family = (__family), \ 31 } 32 33struct soc_device * __init 34at91_soc_init(const struct at91_soc *socs); 35 36#define AT91RM9200_CIDR_MATCH 0x09290780 37 38#define AT91SAM9260_CIDR_MATCH 0x019803a0 39#define AT91SAM9261_CIDR_MATCH 0x019703a0 40#define AT91SAM9263_CIDR_MATCH 0x019607a0 41#define AT91SAM9G20_CIDR_MATCH 0x019905a0 42#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0 43#define AT91SAM9G45_CIDR_MATCH 0x019b05a0 44#define AT91SAM9X5_CIDR_MATCH 0x019a05a0 45#define AT91SAM9N12_CIDR_MATCH 0x019a07a0 46#define SAM9X60_CIDR_MATCH 0x019b35a0 47#define SAMA7G5_CIDR_MATCH 0x00162100 48 49#define AT91SAM9M11_EXID_MATCH 0x00000001 50#define AT91SAM9M10_EXID_MATCH 0x00000002 51#define AT91SAM9G46_EXID_MATCH 0x00000003 52#define AT91SAM9G45_EXID_MATCH 0x00000004 53 54#define AT91SAM9G15_EXID_MATCH 0x00000000 55#define AT91SAM9G35_EXID_MATCH 0x00000001 56#define AT91SAM9X35_EXID_MATCH 0x00000002 57#define AT91SAM9G25_EXID_MATCH 0x00000003 58#define AT91SAM9X25_EXID_MATCH 0x00000004 59 60#define AT91SAM9CN12_EXID_MATCH 0x00000005 61#define AT91SAM9N12_EXID_MATCH 0x00000006 62#define AT91SAM9CN11_EXID_MATCH 0x00000009 63 64#define SAM9X60_EXID_MATCH 0x00000000 65#define SAM9X60_D5M_EXID_MATCH 0x00000001 66#define SAM9X60_D1G_EXID_MATCH 0x00000010 67#define SAM9X60_D6K_EXID_MATCH 0x00000011 68 69#define SAMA7G51_EXID_MATCH 0x3 70#define SAMA7G52_EXID_MATCH 0x2 71#define SAMA7G53_EXID_MATCH 0x1 72#define SAMA7G54_EXID_MATCH 0x0 73 74#define AT91SAM9XE128_CIDR_MATCH 0x329973a0 75#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0 76#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0 77 78#define SAMA5D2_CIDR_MATCH 0x0a5c08c0 79#define SAMA5D21CU_EXID_MATCH 0x0000005a 80#define SAMA5D225C_D1M_EXID_MATCH 0x00000053 81#define SAMA5D22CU_EXID_MATCH 0x00000059 82#define SAMA5D22CN_EXID_MATCH 0x00000069 83#define SAMA5D23CU_EXID_MATCH 0x00000058 84#define SAMA5D24CX_EXID_MATCH 0x00000004 85#define SAMA5D24CU_EXID_MATCH 0x00000014 86#define SAMA5D26CU_EXID_MATCH 0x00000012 87#define SAMA5D27C_D1G_EXID_MATCH 0x00000033 88#define SAMA5D27C_D5M_EXID_MATCH 0x00000032 89#define SAMA5D27C_LD1G_EXID_MATCH 0x00000061 90#define SAMA5D27C_LD2G_EXID_MATCH 0x00000062 91#define SAMA5D27CU_EXID_MATCH 0x00000011 92#define SAMA5D27CN_EXID_MATCH 0x00000021 93#define SAMA5D28C_D1G_EXID_MATCH 0x00000013 94#define SAMA5D28C_LD1G_EXID_MATCH 0x00000071 95#define SAMA5D28C_LD2G_EXID_MATCH 0x00000072 96#define SAMA5D28CU_EXID_MATCH 0x00000010 97#define SAMA5D28CN_EXID_MATCH 0x00000020 98#define SAMA5D29CN_EXID_MATCH 0x00000023 99 100#define SAMA5D3_CIDR_MATCH 0x0a5c07c0 101#define SAMA5D31_EXID_MATCH 0x00444300 102#define SAMA5D33_EXID_MATCH 0x00414300 103#define SAMA5D34_EXID_MATCH 0x00414301 104#define SAMA5D35_EXID_MATCH 0x00584300 105#define SAMA5D36_EXID_MATCH 0x00004301 106 107#define SAMA5D4_CIDR_MATCH 0x0a5c07c0 108#define SAMA5D41_EXID_MATCH 0x00000001 109#define SAMA5D42_EXID_MATCH 0x00000002 110#define SAMA5D43_EXID_MATCH 0x00000003 111#define SAMA5D44_EXID_MATCH 0x00000004 112 113#define SAME70Q21_CIDR_MATCH 0x21020e00 114#define SAME70Q21_EXID_MATCH 0x00000002 115#define SAME70Q20_CIDR_MATCH 0x21020c00 116#define SAME70Q20_EXID_MATCH 0x00000002 117#define SAME70Q19_CIDR_MATCH 0x210d0a00 118#define SAME70Q19_EXID_MATCH 0x00000002 119 120#define SAMS70Q21_CIDR_MATCH 0x21120e00 121#define SAMS70Q21_EXID_MATCH 0x00000002 122#define SAMS70Q20_CIDR_MATCH 0x21120c00 123#define SAMS70Q20_EXID_MATCH 0x00000002 124#define SAMS70Q19_CIDR_MATCH 0x211d0a00 125#define SAMS70Q19_EXID_MATCH 0x00000002 126 127#define SAMV71Q21_CIDR_MATCH 0x21220e00 128#define SAMV71Q21_EXID_MATCH 0x00000002 129#define SAMV71Q20_CIDR_MATCH 0x21220c00 130#define SAMV71Q20_EXID_MATCH 0x00000002 131#define SAMV71Q19_CIDR_MATCH 0x212d0a00 132#define SAMV71Q19_EXID_MATCH 0x00000002 133 134#define SAMV70Q20_CIDR_MATCH 0x21320c00 135#define SAMV70Q20_EXID_MATCH 0x00000002 136#define SAMV70Q19_CIDR_MATCH 0x213d0a00 137#define SAMV70Q19_EXID_MATCH 0x00000002 138 139#endif /* __AT91_SOC_H */