cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aon_defs.h (2796B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Always ON (AON) register interface between bootloader and Linux
      4 *
      5 * Copyright © 2014-2017 Broadcom
      6 */
      7
      8#ifndef __BRCMSTB_AON_DEFS_H__
      9#define __BRCMSTB_AON_DEFS_H__
     10
     11#include <linux/compiler.h>
     12
     13/* Magic number in upper 16-bits */
     14#define BRCMSTB_S3_MAGIC_MASK                   0xffff0000
     15#define BRCMSTB_S3_MAGIC_SHORT                  0x5AFE0000
     16
     17enum {
     18	/* Restore random key for AES memory verification (off = fixed key) */
     19	S3_FLAG_LOAD_RANDKEY		= (1 << 0),
     20
     21	/* Scratch buffer page table is present */
     22	S3_FLAG_SCRATCH_BUFFER_TABLE	= (1 << 1),
     23
     24	/* Skip all memory verification */
     25	S3_FLAG_NO_MEM_VERIFY		= (1 << 2),
     26
     27	/*
     28	 * Modification of this bit reserved for bootloader only.
     29	 * 1=PSCI started Linux, 0=Direct jump to Linux.
     30	 */
     31	S3_FLAG_PSCI_BOOT		= (1 << 3),
     32
     33	/*
     34	 * Modification of this bit reserved for bootloader only.
     35	 * 1=64 bit boot, 0=32 bit boot.
     36	 */
     37	S3_FLAG_BOOTED64		= (1 << 4),
     38};
     39
     40#define BRCMSTB_HASH_LEN			(128 / 8) /* 128-bit hash */
     41
     42#define AON_REG_MAGIC_FLAGS			0x00
     43#define AON_REG_CONTROL_LOW			0x04
     44#define AON_REG_CONTROL_HIGH			0x08
     45#define AON_REG_S3_HASH				0x0c /* hash of S3 params */
     46#define AON_REG_CONTROL_HASH_LEN		0x1c
     47#define AON_REG_PANIC				0x20
     48
     49#define BRCMSTB_S3_MAGIC		0x5AFEB007
     50#define BRCMSTB_PANIC_MAGIC		0x512E115E
     51#define BOOTLOADER_SCRATCH_SIZE		64
     52#define BRCMSTB_DTU_STATE_MAP_ENTRIES	(8*1024)
     53#define BRCMSTB_DTU_CONFIG_ENTRIES	(512)
     54#define BRCMSTB_DTU_COUNT		(2)
     55
     56#define IMAGE_DESCRIPTORS_BUFSIZE	(2 * 1024)
     57#define S3_BOOTLOADER_RESERVED		(S3_FLAG_PSCI_BOOT | S3_FLAG_BOOTED64)
     58
     59struct brcmstb_bootloader_dtu_table {
     60	uint32_t	dtu_state_map[BRCMSTB_DTU_STATE_MAP_ENTRIES];
     61	uint32_t	dtu_config[BRCMSTB_DTU_CONFIG_ENTRIES];
     62};
     63
     64/*
     65 * Bootloader utilizes a custom parameter block left in DRAM for handling S3
     66 * warm resume
     67 */
     68struct brcmstb_s3_params {
     69	/* scratch memory for bootloader */
     70	uint8_t scratch[BOOTLOADER_SCRATCH_SIZE];
     71
     72	uint32_t magic; /* BRCMSTB_S3_MAGIC */
     73	uint64_t reentry; /* PA */
     74
     75	/* descriptors */
     76	uint32_t hash[BRCMSTB_HASH_LEN / 4];
     77
     78	/*
     79	 * If 0, then ignore this parameter (there is only one set of
     80	 *   descriptors)
     81	 *
     82	 * If non-0, then a second set of descriptors is stored at:
     83	 *
     84	 *   descriptors + desc_offset_2
     85	 *
     86	 * The MAC result of both descriptors is XOR'd and stored in @hash
     87	 */
     88	uint32_t desc_offset_2;
     89
     90	/*
     91	 * (Physical) address of a brcmstb_bootloader_scratch_table, for
     92	 * providing a large DRAM buffer to the bootloader
     93	 */
     94	uint64_t buffer_table;
     95
     96	uint32_t spare[70];
     97
     98	uint8_t descriptors[IMAGE_DESCRIPTORS_BUFSIZE];
     99	/*
    100	 * Must be last member of struct. See brcmstb_pm_s3_finish() for reason.
    101	 */
    102	struct brcmstb_bootloader_dtu_table dtu[BRCMSTB_DTU_COUNT];
    103} __packed;
    104
    105#endif /* __BRCMSTB_AON_DEFS_H__ */