cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rpmh-internal.h (4703B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
      4 */
      5
      6
      7#ifndef __RPM_INTERNAL_H__
      8#define __RPM_INTERNAL_H__
      9
     10#include <linux/bitmap.h>
     11#include <linux/wait.h>
     12#include <soc/qcom/tcs.h>
     13
     14#define TCS_TYPE_NR			4
     15#define MAX_CMDS_PER_TCS		16
     16#define MAX_TCS_PER_TYPE		3
     17#define MAX_TCS_NR			(MAX_TCS_PER_TYPE * TCS_TYPE_NR)
     18#define MAX_TCS_SLOTS			(MAX_CMDS_PER_TCS * MAX_TCS_PER_TYPE)
     19
     20struct rsc_drv;
     21
     22/**
     23 * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests
     24 * to the controller
     25 *
     26 * @drv:       The controller.
     27 * @type:      Type of the TCS in this group - active, sleep, wake.
     28 * @mask:      Mask of the TCSes relative to all the TCSes in the RSC.
     29 * @offset:    Start of the TCS group relative to the TCSes in the RSC.
     30 * @num_tcs:   Number of TCSes in this type.
     31 * @ncpt:      Number of commands in each TCS.
     32 * @req:       Requests that are sent from the TCS; only used for ACTIVE_ONLY
     33 *             transfers (could be on a wake/sleep TCS if we are borrowing for
     34 *             an ACTIVE_ONLY transfer).
     35 *             Start: grab drv->lock, set req, set tcs_in_use, drop drv->lock,
     36 *                    trigger
     37 *             End: get irq, access req,
     38 *                  grab drv->lock, clear tcs_in_use, drop drv->lock
     39 * @slots:     Indicates which of @cmd_addr are occupied; only used for
     40 *             SLEEP / WAKE TCSs.  Things are tightly packed in the
     41 *             case that (ncpt < MAX_CMDS_PER_TCS).  That is if ncpt = 2 and
     42 *             MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS.
     43 */
     44struct tcs_group {
     45	struct rsc_drv *drv;
     46	int type;
     47	u32 mask;
     48	u32 offset;
     49	int num_tcs;
     50	int ncpt;
     51	const struct tcs_request *req[MAX_TCS_PER_TYPE];
     52	DECLARE_BITMAP(slots, MAX_TCS_SLOTS);
     53};
     54
     55/**
     56 * struct rpmh_request: the message to be sent to rpmh-rsc
     57 *
     58 * @msg: the request
     59 * @cmd: the payload that will be part of the @msg
     60 * @completion: triggered when request is done
     61 * @dev: the device making the request
     62 * @err: err return from the controller
     63 * @needs_free: check to free dynamically allocated request object
     64 */
     65struct rpmh_request {
     66	struct tcs_request msg;
     67	struct tcs_cmd cmd[MAX_RPMH_PAYLOAD];
     68	struct completion *completion;
     69	const struct device *dev;
     70	int err;
     71	bool needs_free;
     72};
     73
     74/**
     75 * struct rpmh_ctrlr: our representation of the controller
     76 *
     77 * @cache: the list of cached requests
     78 * @cache_lock: synchronize access to the cache data
     79 * @dirty: was the cache updated since flush
     80 * @batch_cache: Cache sleep and wake requests sent as batch
     81 */
     82struct rpmh_ctrlr {
     83	struct list_head cache;
     84	spinlock_t cache_lock;
     85	bool dirty;
     86	struct list_head batch_cache;
     87};
     88
     89/**
     90 * struct rsc_drv: the Direct Resource Voter (DRV) of the
     91 * Resource State Coordinator controller (RSC)
     92 *
     93 * @name:               Controller identifier.
     94 * @tcs_base:           Start address of the TCS registers in this controller.
     95 * @id:                 Instance id in the controller (Direct Resource Voter).
     96 * @num_tcs:            Number of TCSes in this DRV.
     97 * @rsc_pm:             CPU PM notifier for controller.
     98 *                      Used when solver mode is not present.
     99 * @cpus_in_pm:         Number of CPUs not in idle power collapse.
    100 *                      Used when solver mode is not present.
    101 * @tcs:                TCS groups.
    102 * @tcs_in_use:         S/W state of the TCS; only set for ACTIVE_ONLY
    103 *                      transfers, but might show a sleep/wake TCS in use if
    104 *                      it was borrowed for an active_only transfer.  You
    105 *                      must hold the lock in this struct (AKA drv->lock) in
    106 *                      order to update this.
    107 * @lock:               Synchronize state of the controller.  If RPMH's cache
    108 *                      lock will also be held, the order is: drv->lock then
    109 *                      cache_lock.
    110 * @tcs_wait:           Wait queue used to wait for @tcs_in_use to free up a
    111 *                      slot
    112 * @client:             Handle to the DRV's client.
    113 */
    114struct rsc_drv {
    115	const char *name;
    116	void __iomem *tcs_base;
    117	int id;
    118	int num_tcs;
    119	struct notifier_block rsc_pm;
    120	atomic_t cpus_in_pm;
    121	struct tcs_group tcs[TCS_TYPE_NR];
    122	DECLARE_BITMAP(tcs_in_use, MAX_TCS_NR);
    123	spinlock_t lock;
    124	wait_queue_head_t tcs_wait;
    125	struct rpmh_ctrlr client;
    126};
    127
    128int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg);
    129int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv,
    130			     const struct tcs_request *msg);
    131void rpmh_rsc_invalidate(struct rsc_drv *drv);
    132
    133void rpmh_tx_done(const struct tcs_request *msg, int r);
    134int rpmh_flush(struct rpmh_ctrlr *ctrlr);
    135
    136#endif /* __RPM_INTERNAL_H__ */