cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

s3c-pm-debug.c (1993B)

      1// SPDX-License-Identifier: GPL-2.0
      2//
      3// Copyright (C) 2013 Samsung Electronics Co., Ltd.
      4//	Tomasz Figa <t.figa@samsung.com>
      5// Copyright (C) 2008 Openmoko, Inc.
      6// Copyright (C) 2004-2008 Simtec Electronics
      7//	Ben Dooks <ben@simtec.co.uk>
      8//	http://armlinux.simtec.co.uk/
      9//
     10// Samsung common power management (suspend to RAM) debug support
     11
     12#include <linux/serial_core.h>
     13#include <linux/serial_s3c.h>
     14#include <linux/io.h>
     15
     16#include <asm/mach/map.h>
     17
     18#include <linux/soc/samsung/s3c-pm.h>
     19
     20static struct pm_uart_save uart_save;
     21
     22extern void printascii(const char *);
     23
     24void s3c_pm_dbg(const char *fmt, ...)
     25{
     26	va_list va;
     27	char buff[256];
     28
     29	va_start(va, fmt);
     30	vsnprintf(buff, sizeof(buff), fmt, va);
     31	va_end(va);
     32
     33	printascii(buff);
     34}
     35
     36static inline void __iomem *s3c_pm_uart_base(void)
     37{
     38	unsigned long paddr;
     39	unsigned long vaddr;
     40
     41	debug_ll_addr(&paddr, &vaddr);
     42
     43	return (void __iomem *)vaddr;
     44}
     45
     46void s3c_pm_save_uarts(bool is_s3c2410)
     47{
     48	void __iomem *regs = s3c_pm_uart_base();
     49	struct pm_uart_save *save = &uart_save;
     50
     51	save->ulcon = __raw_readl(regs + S3C2410_ULCON);
     52	save->ucon = __raw_readl(regs + S3C2410_UCON);
     53	save->ufcon = __raw_readl(regs + S3C2410_UFCON);
     54	save->umcon = __raw_readl(regs + S3C2410_UMCON);
     55	save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
     56
     57	if (!is_s3c2410)
     58		save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
     59
     60	S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
     61		  regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
     62}
     63
     64void s3c_pm_restore_uarts(bool is_s3c2410)
     65{
     66	void __iomem *regs = s3c_pm_uart_base();
     67	struct pm_uart_save *save = &uart_save;
     68
     69	s3c_pm_arch_update_uart(regs, save);
     70
     71	__raw_writel(save->ulcon, regs + S3C2410_ULCON);
     72	__raw_writel(save->ucon,  regs + S3C2410_UCON);
     73	__raw_writel(save->ufcon, regs + S3C2410_UFCON);
     74	__raw_writel(save->umcon, regs + S3C2410_UMCON);
     75	__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
     76
     77	if (!is_s3c2410)
     78		__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
     79}