fuse.h (3238B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2010 Google, Inc. 4 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 5 * 6 * Author: 7 * Colin Cross <ccross@android.com> 8 */ 9 10#ifndef __DRIVERS_MISC_TEGRA_FUSE_H 11#define __DRIVERS_MISC_TEGRA_FUSE_H 12 13#include <linux/dmaengine.h> 14#include <linux/types.h> 15 16struct nvmem_cell_lookup; 17struct nvmem_device; 18struct tegra_fuse; 19 20struct tegra_fuse_info { 21 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); 22 unsigned int size; 23 unsigned int spare; 24}; 25 26struct tegra_fuse_soc { 27 void (*init)(struct tegra_fuse *fuse); 28 void (*speedo_init)(struct tegra_sku_info *info); 29 int (*probe)(struct tegra_fuse *fuse); 30 31 const struct tegra_fuse_info *info; 32 33 const struct nvmem_cell_lookup *lookups; 34 unsigned int num_lookups; 35 36 const struct attribute_group *soc_attr_group; 37 38 bool clk_suspend_on; 39}; 40 41struct tegra_fuse { 42 struct device *dev; 43 void __iomem *base; 44 phys_addr_t phys; 45 struct clk *clk; 46 struct reset_control *rst; 47 48 u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); 49 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); 50 const struct tegra_fuse_soc *soc; 51 52 /* APBDMA on Tegra20 */ 53 struct { 54 struct mutex lock; 55 struct completion wait; 56 struct dma_chan *chan; 57 struct dma_slave_config config; 58 dma_addr_t phys; 59 u32 *virt; 60 } apbdma; 61 62 struct nvmem_device *nvmem; 63 struct nvmem_cell_lookup *lookups; 64}; 65 66void tegra_init_revision(void); 67void tegra_init_apbmisc(void); 68 69u32 __init tegra_fuse_read_spare(unsigned int spare); 70u32 __init tegra_fuse_read_early(unsigned int offset); 71 72u8 tegra_get_major_rev(void); 73u8 tegra_get_minor_rev(void); 74 75extern const struct attribute_group tegra_soc_attr_group; 76 77#ifdef CONFIG_ARCH_TEGRA_2x_SOC 78void tegra20_init_speedo_data(struct tegra_sku_info *sku_info); 79#endif 80 81#ifdef CONFIG_ARCH_TEGRA_3x_SOC 82void tegra30_init_speedo_data(struct tegra_sku_info *sku_info); 83#endif 84 85#ifdef CONFIG_ARCH_TEGRA_114_SOC 86void tegra114_init_speedo_data(struct tegra_sku_info *sku_info); 87#endif 88 89#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 90void tegra124_init_speedo_data(struct tegra_sku_info *sku_info); 91#endif 92 93#ifdef CONFIG_ARCH_TEGRA_210_SOC 94void tegra210_init_speedo_data(struct tegra_sku_info *sku_info); 95#endif 96 97#ifdef CONFIG_ARCH_TEGRA_2x_SOC 98extern const struct tegra_fuse_soc tegra20_fuse_soc; 99#endif 100 101#ifdef CONFIG_ARCH_TEGRA_3x_SOC 102extern const struct tegra_fuse_soc tegra30_fuse_soc; 103#endif 104 105#ifdef CONFIG_ARCH_TEGRA_114_SOC 106extern const struct tegra_fuse_soc tegra114_fuse_soc; 107#endif 108 109#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 110extern const struct tegra_fuse_soc tegra124_fuse_soc; 111#endif 112 113#ifdef CONFIG_ARCH_TEGRA_210_SOC 114extern const struct tegra_fuse_soc tegra210_fuse_soc; 115#endif 116 117#ifdef CONFIG_ARCH_TEGRA_186_SOC 118extern const struct tegra_fuse_soc tegra186_fuse_soc; 119#endif 120 121#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ 122 IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) 123extern const struct attribute_group tegra194_soc_attr_group; 124#endif 125 126#ifdef CONFIG_ARCH_TEGRA_194_SOC 127extern const struct tegra_fuse_soc tegra194_fuse_soc; 128#endif 129 130#ifdef CONFIG_ARCH_TEGRA_234_SOC 131extern const struct tegra_fuse_soc tegra234_fuse_soc; 132#endif 133 134#endif