cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-gpio.c (13992B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * SPI master driver using generic bitbanged GPIO
      4 *
      5 * Copyright (C) 2006,2008 David Brownell
      6 * Copyright (C) 2017 Linus Walleij
      7 */
      8#include <linux/kernel.h>
      9#include <linux/module.h>
     10#include <linux/platform_device.h>
     11#include <linux/gpio/consumer.h>
     12#include <linux/of.h>
     13#include <linux/of_device.h>
     14
     15#include <linux/spi/spi.h>
     16#include <linux/spi/spi_bitbang.h>
     17#include <linux/spi/spi_gpio.h>
     18
     19
     20/*
     21 * This bitbanging SPI master driver should help make systems usable
     22 * when a native hardware SPI engine is not available, perhaps because
     23 * its driver isn't yet working or because the I/O pins it requires
     24 * are used for other purposes.
     25 *
     26 * platform_device->driver_data ... points to spi_gpio
     27 *
     28 * spi->controller_state ... reserved for bitbang framework code
     29 *
     30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
     31 */
     32
     33struct spi_gpio {
     34	struct spi_bitbang		bitbang;
     35	struct gpio_desc		*sck;
     36	struct gpio_desc		*miso;
     37	struct gpio_desc		*mosi;
     38	struct gpio_desc		**cs_gpios;
     39};
     40
     41/*----------------------------------------------------------------------*/
     42
     43/*
     44 * Because the overhead of going through four GPIO procedure calls
     45 * per transferred bit can make performance a problem, this code
     46 * is set up so that you can use it in either of two ways:
     47 *
     48 *   - The slow generic way:  set up platform_data to hold the GPIO
     49 *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
     50 *     each of them.  This driver can handle several such busses.
     51 *
     52 *   - The quicker inlined way:  only helps with platform GPIO code
     53 *     that inlines operations for constant GPIOs.  This can give
     54 *     you tight (fast!) inner loops, but each such bus needs a
     55 *     new driver.  You'll define a new C file, with Makefile and
     56 *     Kconfig support; the C code can be a total of six lines:
     57 *
     58 *		#define DRIVER_NAME	"myboard_spi2"
     59 *		#define	SPI_MISO_GPIO	119
     60 *		#define	SPI_MOSI_GPIO	120
     61 *		#define	SPI_SCK_GPIO	121
     62 *		#define	SPI_N_CHIPSEL	4
     63 *		#include "spi-gpio.c"
     64 */
     65
     66#ifndef DRIVER_NAME
     67#define DRIVER_NAME	"spi_gpio"
     68
     69#define GENERIC_BITBANG	/* vs tight inlines */
     70
     71#endif
     72
     73/*----------------------------------------------------------------------*/
     74
     75static inline struct spi_gpio *__pure
     76spi_to_spi_gpio(const struct spi_device *spi)
     77{
     78	const struct spi_bitbang	*bang;
     79	struct spi_gpio			*spi_gpio;
     80
     81	bang = spi_master_get_devdata(spi->master);
     82	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
     83	return spi_gpio;
     84}
     85
     86/* These helpers are in turn called by the bitbang inlines */
     87static inline void setsck(const struct spi_device *spi, int is_on)
     88{
     89	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
     90
     91	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
     92}
     93
     94static inline void setmosi(const struct spi_device *spi, int is_on)
     95{
     96	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
     97
     98	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
     99}
    100
    101static inline int getmiso(const struct spi_device *spi)
    102{
    103	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
    104
    105	if (spi->mode & SPI_3WIRE)
    106		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
    107	else
    108		return !!gpiod_get_value_cansleep(spi_gpio->miso);
    109}
    110
    111/*
    112 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
    113 * requested device clock.  Software overhead means we usually have trouble
    114 * reaching even one Mbit/sec (except when we can inline bitops), so for now
    115 * we'll just assume we never need additional per-bit slowdowns.
    116 */
    117#define spidelay(nsecs)	do {} while (0)
    118
    119#include "spi-bitbang-txrx.h"
    120
    121/*
    122 * These functions can leverage inline expansion of GPIO calls to shrink
    123 * costs for a txrx bit, often by factors of around ten (by instruction
    124 * count).  That is particularly visible for larger word sizes, but helps
    125 * even with default 8-bit words.
    126 *
    127 * REVISIT overheads calling these functions for each word also have
    128 * significant performance costs.  Having txrx_bufs() calls that inline
    129 * the txrx_word() logic would help performance, e.g. on larger blocks
    130 * used with flash storage or MMC/SD.  There should also be ways to make
    131 * GCC be less stupid about reloading registers inside the I/O loops,
    132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
    133 */
    134
    135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
    136		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    137{
    138	if (unlikely(spi->mode & SPI_LSB_FIRST))
    139		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
    140	else
    141		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
    142}
    143
    144static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
    145		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    146{
    147	if (unlikely(spi->mode & SPI_LSB_FIRST))
    148		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
    149	else
    150		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
    151}
    152
    153static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
    154		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    155{
    156	if (unlikely(spi->mode & SPI_LSB_FIRST))
    157		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
    158	else
    159		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
    160}
    161
    162static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
    163		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    164{
    165	if (unlikely(spi->mode & SPI_LSB_FIRST))
    166		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
    167	else
    168		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
    169}
    170
    171/*
    172 * These functions do not call setmosi or getmiso if respective flag
    173 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
    174 * call when such pin is not present or defined in the controller.
    175 * A separate set of callbacks is defined to get highest possible
    176 * speed in the generic case (when both MISO and MOSI lines are
    177 * available), as optimiser will remove the checks when argument is
    178 * constant.
    179 */
    180
    181static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
    182		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    183{
    184	flags = spi->master->flags;
    185	if (unlikely(spi->mode & SPI_LSB_FIRST))
    186		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
    187	else
    188		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
    189}
    190
    191static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
    192		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    193{
    194	flags = spi->master->flags;
    195	if (unlikely(spi->mode & SPI_LSB_FIRST))
    196		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
    197	else
    198		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
    199}
    200
    201static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
    202		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    203{
    204	flags = spi->master->flags;
    205	if (unlikely(spi->mode & SPI_LSB_FIRST))
    206		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
    207	else
    208		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
    209}
    210
    211static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
    212		unsigned nsecs, u32 word, u8 bits, unsigned flags)
    213{
    214	flags = spi->master->flags;
    215	if (unlikely(spi->mode & SPI_LSB_FIRST))
    216		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
    217	else
    218		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
    219}
    220
    221/*----------------------------------------------------------------------*/
    222
    223static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
    224{
    225	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
    226
    227	/* set initial clock line level */
    228	if (is_active)
    229		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
    230
    231	/* Drive chip select line, if we have one */
    232	if (spi_gpio->cs_gpios) {
    233		struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
    234
    235		/* SPI chip selects are normally active-low */
    236		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
    237	}
    238}
    239
    240static int spi_gpio_setup(struct spi_device *spi)
    241{
    242	struct gpio_desc	*cs;
    243	int			status = 0;
    244	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
    245
    246	/*
    247	 * The CS GPIOs have already been
    248	 * initialized from the descriptor lookup.
    249	 */
    250	if (spi_gpio->cs_gpios) {
    251		cs = spi_gpio->cs_gpios[spi->chip_select];
    252		if (!spi->controller_state && cs)
    253			status = gpiod_direction_output(cs,
    254						  !(spi->mode & SPI_CS_HIGH));
    255	}
    256
    257	if (!status)
    258		status = spi_bitbang_setup(spi);
    259
    260	return status;
    261}
    262
    263static int spi_gpio_set_direction(struct spi_device *spi, bool output)
    264{
    265	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
    266	int ret;
    267
    268	if (output)
    269		return gpiod_direction_output(spi_gpio->mosi, 1);
    270
    271	ret = gpiod_direction_input(spi_gpio->mosi);
    272	if (ret)
    273		return ret;
    274	/*
    275	 * Send a turnaround high impedance cycle when switching
    276	 * from output to input. Theoretically there should be
    277	 * a clock delay here, but as has been noted above, the
    278	 * nsec delay function for bit-banged GPIO is simply
    279	 * {} because bit-banging just doesn't get fast enough
    280	 * anyway.
    281	 */
    282	if (spi->mode & SPI_3WIRE_HIZ) {
    283		gpiod_set_value_cansleep(spi_gpio->sck,
    284					 !(spi->mode & SPI_CPOL));
    285		gpiod_set_value_cansleep(spi_gpio->sck,
    286					 !!(spi->mode & SPI_CPOL));
    287	}
    288	return 0;
    289}
    290
    291static void spi_gpio_cleanup(struct spi_device *spi)
    292{
    293	spi_bitbang_cleanup(spi);
    294}
    295
    296/*
    297 * It can be convenient to use this driver with pins that have alternate
    298 * functions associated with a "native" SPI controller if a driver for that
    299 * controller is not available, or is missing important functionality.
    300 *
    301 * On platforms which can do so, configure MISO with a weak pullup unless
    302 * there's an external pullup on that signal.  That saves power by avoiding
    303 * floating signals.  (A weak pulldown would save power too, but many
    304 * drivers expect to see all-ones data as the no slave "response".)
    305 */
    306static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
    307{
    308	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
    309	if (IS_ERR(spi_gpio->mosi))
    310		return PTR_ERR(spi_gpio->mosi);
    311
    312	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
    313	if (IS_ERR(spi_gpio->miso))
    314		return PTR_ERR(spi_gpio->miso);
    315
    316	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
    317	return PTR_ERR_OR_ZERO(spi_gpio->sck);
    318}
    319
    320#ifdef CONFIG_OF
    321static const struct of_device_id spi_gpio_dt_ids[] = {
    322	{ .compatible = "spi-gpio" },
    323	{}
    324};
    325MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
    326
    327static int spi_gpio_probe_dt(struct platform_device *pdev,
    328			     struct spi_master *master)
    329{
    330	master->dev.of_node = pdev->dev.of_node;
    331	master->use_gpio_descriptors = true;
    332
    333	return 0;
    334}
    335#else
    336static inline int spi_gpio_probe_dt(struct platform_device *pdev,
    337				    struct spi_master *master)
    338{
    339	return 0;
    340}
    341#endif
    342
    343static int spi_gpio_probe_pdata(struct platform_device *pdev,
    344				struct spi_master *master)
    345{
    346	struct device *dev = &pdev->dev;
    347	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
    348	struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
    349	int i;
    350
    351#ifdef GENERIC_BITBANG
    352	if (!pdata || !pdata->num_chipselect)
    353		return -ENODEV;
    354#endif
    355	/*
    356	 * The master needs to think there is a chipselect even if not
    357	 * connected
    358	 */
    359	master->num_chipselect = pdata->num_chipselect ?: 1;
    360
    361	spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
    362					  sizeof(*spi_gpio->cs_gpios),
    363					  GFP_KERNEL);
    364	if (!spi_gpio->cs_gpios)
    365		return -ENOMEM;
    366
    367	for (i = 0; i < master->num_chipselect; i++) {
    368		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
    369							     GPIOD_OUT_HIGH);
    370		if (IS_ERR(spi_gpio->cs_gpios[i]))
    371			return PTR_ERR(spi_gpio->cs_gpios[i]);
    372	}
    373
    374	return 0;
    375}
    376
    377static int spi_gpio_probe(struct platform_device *pdev)
    378{
    379	int				status;
    380	struct spi_master		*master;
    381	struct spi_gpio			*spi_gpio;
    382	struct device			*dev = &pdev->dev;
    383	struct spi_bitbang		*bb;
    384
    385	master = devm_spi_alloc_master(dev, sizeof(*spi_gpio));
    386	if (!master)
    387		return -ENOMEM;
    388
    389	if (pdev->dev.of_node)
    390		status = spi_gpio_probe_dt(pdev, master);
    391	else
    392		status = spi_gpio_probe_pdata(pdev, master);
    393
    394	if (status)
    395		return status;
    396
    397	spi_gpio = spi_master_get_devdata(master);
    398
    399	status = spi_gpio_request(dev, spi_gpio);
    400	if (status)
    401		return status;
    402
    403	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
    404	master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
    405			    SPI_CS_HIGH | SPI_LSB_FIRST;
    406	if (!spi_gpio->mosi) {
    407		/* HW configuration without MOSI pin
    408		 *
    409		 * No setting SPI_MASTER_NO_RX here - if there is only
    410		 * a MOSI pin connected the host can still do RX by
    411		 * changing the direction of the line.
    412		 */
    413		master->flags = SPI_MASTER_NO_TX;
    414	}
    415
    416	master->bus_num = pdev->id;
    417	master->setup = spi_gpio_setup;
    418	master->cleanup = spi_gpio_cleanup;
    419
    420	bb = &spi_gpio->bitbang;
    421	bb->master = master;
    422	/*
    423	 * There is some additional business, apart from driving the CS GPIO
    424	 * line, that we need to do on selection. This makes the local
    425	 * callback for chipselect always get called.
    426	 */
    427	master->flags |= SPI_MASTER_GPIO_SS;
    428	bb->chipselect = spi_gpio_chipselect;
    429	bb->set_line_direction = spi_gpio_set_direction;
    430
    431	if (master->flags & SPI_MASTER_NO_TX) {
    432		bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
    433		bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
    434		bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
    435		bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
    436	} else {
    437		bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
    438		bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
    439		bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
    440		bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
    441	}
    442	bb->setup_transfer = spi_bitbang_setup_transfer;
    443
    444	status = spi_bitbang_init(&spi_gpio->bitbang);
    445	if (status)
    446		return status;
    447
    448	return devm_spi_register_master(&pdev->dev, master);
    449}
    450
    451MODULE_ALIAS("platform:" DRIVER_NAME);
    452
    453static struct platform_driver spi_gpio_driver = {
    454	.driver = {
    455		.name	= DRIVER_NAME,
    456		.of_match_table = of_match_ptr(spi_gpio_dt_ids),
    457	},
    458	.probe		= spi_gpio_probe,
    459};
    460module_platform_driver(spi_gpio_driver);
    461
    462MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
    463MODULE_AUTHOR("David Brownell");
    464MODULE_LICENSE("GPL");