cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

driver_chipcommon_sflash.c (4214B)

      1/*
      2 * Sonics Silicon Backplane
      3 * ChipCommon serial flash interface
      4 *
      5 * Licensed under the GNU/GPL. See COPYING for details.
      6 */
      7
      8#include "ssb_private.h"
      9
     10#include <linux/ssb/ssb.h>
     11
     12static struct resource ssb_sflash_resource = {
     13	.name	= "ssb_sflash",
     14	.start	= SSB_FLASH2,
     15	.end	= 0,
     16	.flags  = IORESOURCE_MEM | IORESOURCE_READONLY,
     17};
     18
     19struct platform_device ssb_sflash_dev = {
     20	.name		= "ssb_sflash",
     21	.resource	= &ssb_sflash_resource,
     22	.num_resources	= 1,
     23};
     24
     25struct ssb_sflash_tbl_e {
     26	char *name;
     27	u32 id;
     28	u32 blocksize;
     29	u16 numblocks;
     30};
     31
     32static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
     33	{ "M25P20", 0x11, 0x10000, 4, },
     34	{ "M25P40", 0x12, 0x10000, 8, },
     35
     36	{ "M25P16", 0x14, 0x10000, 32, },
     37	{ "M25P32", 0x15, 0x10000, 64, },
     38	{ "M25P64", 0x16, 0x10000, 128, },
     39	{ "M25FL128", 0x17, 0x10000, 256, },
     40	{ NULL },
     41};
     42
     43static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
     44	{ "SST25WF512", 1, 0x1000, 16, },
     45	{ "SST25VF512", 0x48, 0x1000, 16, },
     46	{ "SST25WF010", 2, 0x1000, 32, },
     47	{ "SST25VF010", 0x49, 0x1000, 32, },
     48	{ "SST25WF020", 3, 0x1000, 64, },
     49	{ "SST25VF020", 0x43, 0x1000, 64, },
     50	{ "SST25WF040", 4, 0x1000, 128, },
     51	{ "SST25VF040", 0x44, 0x1000, 128, },
     52	{ "SST25VF040B", 0x8d, 0x1000, 128, },
     53	{ "SST25WF080", 5, 0x1000, 256, },
     54	{ "SST25VF080B", 0x8e, 0x1000, 256, },
     55	{ "SST25VF016", 0x41, 0x1000, 512, },
     56	{ "SST25VF032", 0x4a, 0x1000, 1024, },
     57	{ "SST25VF064", 0x4b, 0x1000, 2048, },
     58	{ NULL },
     59};
     60
     61static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
     62	{ "AT45DB011", 0xc, 256, 512, },
     63	{ "AT45DB021", 0x14, 256, 1024, },
     64	{ "AT45DB041", 0x1c, 256, 2048, },
     65	{ "AT45DB081", 0x24, 256, 4096, },
     66	{ "AT45DB161", 0x2c, 512, 4096, },
     67	{ "AT45DB321", 0x34, 512, 8192, },
     68	{ "AT45DB642", 0x3c, 1024, 8192, },
     69	{ NULL },
     70};
     71
     72static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
     73{
     74	int i;
     75	chipco_write32(cc, SSB_CHIPCO_FLASHCTL,
     76		       SSB_CHIPCO_FLASHCTL_START | opcode);
     77	for (i = 0; i < 1000; i++) {
     78		if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) &
     79		      SSB_CHIPCO_FLASHCTL_BUSY))
     80			return;
     81		cpu_relax();
     82	}
     83	dev_err(cc->dev->dev, "SFLASH control command failed (timeout)!\n");
     84}
     85
     86/* Initialize serial flash access */
     87int ssb_sflash_init(struct ssb_chipcommon *cc)
     88{
     89	struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
     90	const struct ssb_sflash_tbl_e *e;
     91	u32 id, id2;
     92
     93	switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
     94	case SSB_CHIPCO_FLASHT_STSER:
     95		ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP);
     96
     97		chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0);
     98		ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
     99		id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
    100
    101		chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 1);
    102		ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
    103		id2 = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
    104
    105		switch (id) {
    106		case 0xbf:
    107			for (e = ssb_sflash_sst_tbl; e->name; e++) {
    108				if (e->id == id2)
    109					break;
    110			}
    111			break;
    112		case 0x13:
    113			return -ENOTSUPP;
    114		default:
    115			for (e = ssb_sflash_st_tbl; e->name; e++) {
    116				if (e->id == id)
    117					break;
    118			}
    119			break;
    120		}
    121		if (!e->name) {
    122			pr_err("Unsupported ST serial flash (id: 0x%X, id2: 0x%X)\n",
    123			       id, id2);
    124			return -ENOTSUPP;
    125		}
    126
    127		break;
    128	case SSB_CHIPCO_FLASHT_ATSER:
    129		ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_AT_STATUS);
    130		id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA) & 0x3c;
    131
    132		for (e = ssb_sflash_at_tbl; e->name; e++) {
    133			if (e->id == id)
    134				break;
    135		}
    136		if (!e->name) {
    137			pr_err("Unsupported Atmel serial flash (id: 0x%X)\n",
    138			       id);
    139			return -ENOTSUPP;
    140		}
    141
    142		break;
    143	default:
    144		pr_err("Unsupported flash type\n");
    145		return -ENOTSUPP;
    146	}
    147
    148	sflash->window = SSB_FLASH2;
    149	sflash->blocksize = e->blocksize;
    150	sflash->numblocks = e->numblocks;
    151	sflash->size = sflash->blocksize * sflash->numblocks;
    152	sflash->present = true;
    153
    154	pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
    155		e->name, sflash->size / 1024, e->blocksize, e->numblocks);
    156
    157	/* Prepare platform device, but don't register it yet. It's too early,
    158	 * malloc (required by device_private_init) is not available yet. */
    159	ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
    160					 sflash->size;
    161	ssb_sflash_dev.dev.platform_data = sflash;
    162
    163	return 0;
    164}