cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

fb_ili9486.c (2499B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * FB driver for the ILI9486 LCD Controller
      4 *
      5 * Copyright (C) 2014 Noralf Tronnes
      6 */
      7
      8#include <linux/module.h>
      9#include <linux/kernel.h>
     10#include <linux/init.h>
     11#include <video/mipi_display.h>
     12
     13#include "fbtft.h"
     14
     15#define DRVNAME		"fb_ili9486"
     16#define WIDTH		320
     17#define HEIGHT		480
     18
     19/* this init sequence matches PiScreen */
     20static const s16 default_init_sequence[] = {
     21	/* Interface Mode Control */
     22	-1, 0xb0, 0x0,
     23	-1, MIPI_DCS_EXIT_SLEEP_MODE,
     24	-2, 250,
     25	/* Interface Pixel Format */
     26	-1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55,
     27	/* Power Control 3 */
     28	-1, 0xC2, 0x44,
     29	/* VCOM Control 1 */
     30	-1, 0xC5, 0x00, 0x00, 0x00, 0x00,
     31	/* PGAMCTRL(Positive Gamma Control) */
     32	-1, 0xE0, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
     33		  0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
     34	/* NGAMCTRL(Negative Gamma Control) */
     35	-1, 0xE1, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
     36		  0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
     37	/* Digital Gamma Control 1 */
     38	-1, 0xE2, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
     39		  0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
     40	-1, MIPI_DCS_EXIT_SLEEP_MODE,
     41	-1, MIPI_DCS_SET_DISPLAY_ON,
     42	/* end marker */
     43	-3
     44};
     45
     46static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
     47{
     48	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
     49		  xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
     50
     51	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
     52		  ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
     53
     54	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
     55}
     56
     57static int set_var(struct fbtft_par *par)
     58{
     59	switch (par->info->var.rotate) {
     60	case 0:
     61		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
     62			  0x80 | (par->bgr << 3));
     63		break;
     64	case 90:
     65		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
     66			  0x20 | (par->bgr << 3));
     67		break;
     68	case 180:
     69		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
     70			  0x40 | (par->bgr << 3));
     71		break;
     72	case 270:
     73		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
     74			  0xE0 | (par->bgr << 3));
     75		break;
     76	default:
     77		break;
     78	}
     79
     80	return 0;
     81}
     82
     83static struct fbtft_display display = {
     84	.regwidth = 8,
     85	.width = WIDTH,
     86	.height = HEIGHT,
     87	.init_sequence = default_init_sequence,
     88	.fbtftops = {
     89		.set_addr_win = set_addr_win,
     90		.set_var = set_var,
     91	},
     92};
     93
     94FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9486", &display);
     95
     96MODULE_ALIAS("spi:" DRVNAME);
     97MODULE_ALIAS("platform:" DRVNAME);
     98MODULE_ALIAS("spi:ili9486");
     99MODULE_ALIAS("platform:ili9486");
    100
    101MODULE_DESCRIPTION("FB driver for the ILI9486 LCD Controller");
    102MODULE_AUTHOR("Noralf Tronnes");
    103MODULE_LICENSE("GPL");