cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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ad2s1210.c (17776B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
      4 *
      5 * Copyright (c) 2010-2010 Analog Devices Inc.
      6 */
      7#include <linux/types.h>
      8#include <linux/mutex.h>
      9#include <linux/device.h>
     10#include <linux/spi/spi.h>
     11#include <linux/slab.h>
     12#include <linux/sysfs.h>
     13#include <linux/delay.h>
     14#include <linux/gpio/consumer.h>
     15#include <linux/module.h>
     16
     17#include <linux/iio/iio.h>
     18#include <linux/iio/sysfs.h>
     19
     20#define DRV_NAME "ad2s1210"
     21
     22#define AD2S1210_DEF_CONTROL		0x7E
     23
     24#define AD2S1210_MSB_IS_HIGH		0x80
     25#define AD2S1210_MSB_IS_LOW		0x7F
     26#define AD2S1210_PHASE_LOCK_RANGE_44	0x20
     27#define AD2S1210_ENABLE_HYSTERESIS	0x10
     28#define AD2S1210_SET_ENRES1		0x08
     29#define AD2S1210_SET_ENRES0		0x04
     30#define AD2S1210_SET_RES1		0x02
     31#define AD2S1210_SET_RES0		0x01
     32
     33#define AD2S1210_SET_RESOLUTION		(AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
     34
     35#define AD2S1210_REG_POSITION		0x80
     36#define AD2S1210_REG_VELOCITY		0x82
     37#define AD2S1210_REG_LOS_THRD		0x88
     38#define AD2S1210_REG_DOS_OVR_THRD	0x89
     39#define AD2S1210_REG_DOS_MIS_THRD	0x8A
     40#define AD2S1210_REG_DOS_RST_MAX_THRD	0x8B
     41#define AD2S1210_REG_DOS_RST_MIN_THRD	0x8C
     42#define AD2S1210_REG_LOT_HIGH_THRD	0x8D
     43#define AD2S1210_REG_LOT_LOW_THRD	0x8E
     44#define AD2S1210_REG_EXCIT_FREQ		0x91
     45#define AD2S1210_REG_CONTROL		0x92
     46#define AD2S1210_REG_SOFT_RESET		0xF0
     47#define AD2S1210_REG_FAULT		0xFF
     48
     49#define AD2S1210_MIN_CLKIN	6144000
     50#define AD2S1210_MAX_CLKIN	10240000
     51#define AD2S1210_MIN_EXCIT	2000
     52#define AD2S1210_MAX_EXCIT	20000
     53#define AD2S1210_MIN_FCW	0x4
     54#define AD2S1210_MAX_FCW	0x50
     55
     56#define AD2S1210_DEF_EXCIT	10000
     57
     58enum ad2s1210_mode {
     59	MOD_POS = 0,
     60	MOD_VEL,
     61	MOD_CONFIG,
     62	MOD_RESERVED,
     63};
     64
     65enum ad2s1210_gpios {
     66	AD2S1210_SAMPLE,
     67	AD2S1210_A0,
     68	AD2S1210_A1,
     69	AD2S1210_RES0,
     70	AD2S1210_RES1,
     71};
     72
     73struct ad2s1210_gpio {
     74	const char *name;
     75	unsigned long flags;
     76};
     77
     78static const struct ad2s1210_gpio gpios[] = {
     79	[AD2S1210_SAMPLE] = { .name = "adi,sample", .flags = GPIOD_OUT_LOW },
     80	[AD2S1210_A0] = { .name = "adi,a0", .flags = GPIOD_OUT_LOW },
     81	[AD2S1210_A1] = { .name = "adi,a1", .flags = GPIOD_OUT_LOW },
     82	[AD2S1210_RES0] = { .name = "adi,res0", .flags = GPIOD_OUT_LOW },
     83	[AD2S1210_RES1] = { .name = "adi,res1", .flags = GPIOD_OUT_LOW },
     84};
     85
     86static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
     87
     88struct ad2s1210_state {
     89	struct mutex lock;
     90	struct spi_device *sdev;
     91	struct gpio_desc *gpios[5];
     92	unsigned int fclkin;
     93	unsigned int fexcit;
     94	bool hysteresis;
     95	u8 resolution;
     96	enum ad2s1210_mode mode;
     97	u8 rx[2] ____cacheline_aligned;
     98	u8 tx[2] ____cacheline_aligned;
     99};
    100
    101static const int ad2s1210_mode_vals[4][2] = {
    102	[MOD_POS] = { 0, 0 },
    103	[MOD_VEL] = { 0, 1 },
    104	[MOD_CONFIG] = { 1, 0 },
    105};
    106
    107static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
    108				     struct ad2s1210_state *st)
    109{
    110	gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]);
    111	gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]);
    112	st->mode = mode;
    113}
    114
    115/* write 1 bytes (address or data) to the chip */
    116static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
    117{
    118	int ret;
    119
    120	ad2s1210_set_mode(MOD_CONFIG, st);
    121	st->tx[0] = data;
    122	ret = spi_write(st->sdev, st->tx, 1);
    123	if (ret < 0)
    124		return ret;
    125
    126	return 0;
    127}
    128
    129/* read value from one of the registers */
    130static int ad2s1210_config_read(struct ad2s1210_state *st,
    131				unsigned char address)
    132{
    133	struct spi_transfer xfers[] = {
    134		{
    135			.len = 1,
    136			.rx_buf = &st->rx[0],
    137			.tx_buf = &st->tx[0],
    138			.cs_change = 1,
    139		}, {
    140			.len = 1,
    141			.rx_buf = &st->rx[1],
    142			.tx_buf = &st->tx[1],
    143		},
    144	};
    145	int ret = 0;
    146
    147	ad2s1210_set_mode(MOD_CONFIG, st);
    148	st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
    149	st->tx[1] = AD2S1210_REG_FAULT;
    150	ret = spi_sync_transfer(st->sdev, xfers, 2);
    151	if (ret < 0)
    152		return ret;
    153
    154	return st->rx[1];
    155}
    156
    157static inline
    158int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
    159{
    160	int ret;
    161	unsigned char fcw;
    162
    163	fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
    164	if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
    165		dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
    166		return -ERANGE;
    167	}
    168
    169	ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
    170	if (ret < 0)
    171		return ret;
    172
    173	return ad2s1210_config_write(st, fcw);
    174}
    175
    176static const int ad2s1210_res_pins[4][2] = {
    177	{ 0, 0 }, {0, 1}, {1, 0}, {1, 1}
    178};
    179
    180static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
    181{
    182	gpiod_set_value(st->gpios[AD2S1210_RES0],
    183			ad2s1210_res_pins[(st->resolution - 10) / 2][0]);
    184	gpiod_set_value(st->gpios[AD2S1210_RES1],
    185			ad2s1210_res_pins[(st->resolution - 10) / 2][1]);
    186}
    187
    188static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
    189{
    190	int ret;
    191
    192	ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
    193	if (ret < 0)
    194		return ret;
    195
    196	return ad2s1210_config_write(st, 0x0);
    197}
    198
    199static ssize_t ad2s1210_show_fclkin(struct device *dev,
    200				    struct device_attribute *attr,
    201				    char *buf)
    202{
    203	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    204
    205	return sprintf(buf, "%u\n", st->fclkin);
    206}
    207
    208static ssize_t ad2s1210_store_fclkin(struct device *dev,
    209				     struct device_attribute *attr,
    210				     const char *buf,
    211				     size_t len)
    212{
    213	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    214	unsigned int fclkin;
    215	int ret;
    216
    217	ret = kstrtouint(buf, 10, &fclkin);
    218	if (ret)
    219		return ret;
    220	if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
    221		dev_err(dev, "ad2s1210: fclkin out of range\n");
    222		return -EINVAL;
    223	}
    224
    225	mutex_lock(&st->lock);
    226	st->fclkin = fclkin;
    227
    228	ret = ad2s1210_update_frequency_control_word(st);
    229	if (ret < 0)
    230		goto error_ret;
    231	ret = ad2s1210_soft_reset(st);
    232error_ret:
    233	mutex_unlock(&st->lock);
    234
    235	return ret < 0 ? ret : len;
    236}
    237
    238static ssize_t ad2s1210_show_fexcit(struct device *dev,
    239				    struct device_attribute *attr,
    240				    char *buf)
    241{
    242	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    243
    244	return sprintf(buf, "%u\n", st->fexcit);
    245}
    246
    247static ssize_t ad2s1210_store_fexcit(struct device *dev,
    248				     struct device_attribute *attr,
    249				     const char *buf, size_t len)
    250{
    251	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    252	unsigned int fexcit;
    253	int ret;
    254
    255	ret = kstrtouint(buf, 10, &fexcit);
    256	if (ret < 0)
    257		return ret;
    258	if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
    259		dev_err(dev,
    260			"ad2s1210: excitation frequency out of range\n");
    261		return -EINVAL;
    262	}
    263	mutex_lock(&st->lock);
    264	st->fexcit = fexcit;
    265	ret = ad2s1210_update_frequency_control_word(st);
    266	if (ret < 0)
    267		goto error_ret;
    268	ret = ad2s1210_soft_reset(st);
    269error_ret:
    270	mutex_unlock(&st->lock);
    271
    272	return ret < 0 ? ret : len;
    273}
    274
    275static ssize_t ad2s1210_show_control(struct device *dev,
    276				     struct device_attribute *attr,
    277				     char *buf)
    278{
    279	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    280	int ret;
    281
    282	mutex_lock(&st->lock);
    283	ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
    284	mutex_unlock(&st->lock);
    285	return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
    286}
    287
    288static ssize_t ad2s1210_store_control(struct device *dev,
    289				      struct device_attribute *attr,
    290				      const char *buf, size_t len)
    291{
    292	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    293	unsigned char udata;
    294	unsigned char data;
    295	int ret;
    296
    297	ret = kstrtou8(buf, 16, &udata);
    298	if (ret)
    299		return -EINVAL;
    300
    301	mutex_lock(&st->lock);
    302	ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
    303	if (ret < 0)
    304		goto error_ret;
    305	data = udata & AD2S1210_MSB_IS_LOW;
    306	ret = ad2s1210_config_write(st, data);
    307	if (ret < 0)
    308		goto error_ret;
    309
    310	ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
    311	if (ret < 0)
    312		goto error_ret;
    313	if (ret & AD2S1210_MSB_IS_HIGH) {
    314		ret = -EIO;
    315		dev_err(dev,
    316			"ad2s1210: write control register fail\n");
    317		goto error_ret;
    318	}
    319	st->resolution =
    320		ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
    321	ad2s1210_set_resolution_pin(st);
    322	ret = len;
    323	st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
    324
    325error_ret:
    326	mutex_unlock(&st->lock);
    327	return ret;
    328}
    329
    330static ssize_t ad2s1210_show_resolution(struct device *dev,
    331					struct device_attribute *attr,
    332					char *buf)
    333{
    334	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    335
    336	return sprintf(buf, "%d\n", st->resolution);
    337}
    338
    339static ssize_t ad2s1210_store_resolution(struct device *dev,
    340					 struct device_attribute *attr,
    341					 const char *buf, size_t len)
    342{
    343	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    344	unsigned char data;
    345	unsigned char udata;
    346	int ret;
    347
    348	ret = kstrtou8(buf, 10, &udata);
    349	if (ret || udata < 10 || udata > 16) {
    350		dev_err(dev, "ad2s1210: resolution out of range\n");
    351		return -EINVAL;
    352	}
    353	mutex_lock(&st->lock);
    354	ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
    355	if (ret < 0)
    356		goto error_ret;
    357	data = ret;
    358	data &= ~AD2S1210_SET_RESOLUTION;
    359	data |= (udata - 10) >> 1;
    360	ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
    361	if (ret < 0)
    362		goto error_ret;
    363	ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
    364	if (ret < 0)
    365		goto error_ret;
    366	ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
    367	if (ret < 0)
    368		goto error_ret;
    369	data = ret;
    370	if (data & AD2S1210_MSB_IS_HIGH) {
    371		ret = -EIO;
    372		dev_err(dev, "ad2s1210: setting resolution fail\n");
    373		goto error_ret;
    374	}
    375	st->resolution =
    376		ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
    377	ad2s1210_set_resolution_pin(st);
    378	ret = len;
    379error_ret:
    380	mutex_unlock(&st->lock);
    381	return ret;
    382}
    383
    384/* read the fault register since last sample */
    385static ssize_t ad2s1210_show_fault(struct device *dev,
    386				   struct device_attribute *attr, char *buf)
    387{
    388	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    389	int ret;
    390
    391	mutex_lock(&st->lock);
    392	ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
    393	mutex_unlock(&st->lock);
    394
    395	return ret ? ret : sprintf(buf, "0x%x\n", ret);
    396}
    397
    398static ssize_t ad2s1210_clear_fault(struct device *dev,
    399				    struct device_attribute *attr,
    400				    const char *buf,
    401				    size_t len)
    402{
    403	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    404	int ret;
    405
    406	mutex_lock(&st->lock);
    407	gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
    408	/* delay (2 * tck + 20) nano seconds */
    409	udelay(1);
    410	gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
    411	ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
    412	if (ret < 0)
    413		goto error_ret;
    414	gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
    415	gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
    416error_ret:
    417	mutex_unlock(&st->lock);
    418
    419	return ret < 0 ? ret : len;
    420}
    421
    422static ssize_t ad2s1210_show_reg(struct device *dev,
    423				 struct device_attribute *attr,
    424				 char *buf)
    425{
    426	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    427	struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
    428	int ret;
    429
    430	mutex_lock(&st->lock);
    431	ret = ad2s1210_config_read(st, iattr->address);
    432	mutex_unlock(&st->lock);
    433
    434	return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
    435}
    436
    437static ssize_t ad2s1210_store_reg(struct device *dev,
    438				  struct device_attribute *attr,
    439				  const char *buf, size_t len)
    440{
    441	struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
    442	unsigned char data;
    443	int ret;
    444	struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
    445
    446	ret = kstrtou8(buf, 10, &data);
    447	if (ret)
    448		return -EINVAL;
    449	mutex_lock(&st->lock);
    450	ret = ad2s1210_config_write(st, iattr->address);
    451	if (ret < 0)
    452		goto error_ret;
    453	ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
    454error_ret:
    455	mutex_unlock(&st->lock);
    456	return ret < 0 ? ret : len;
    457}
    458
    459static int ad2s1210_read_raw(struct iio_dev *indio_dev,
    460			     struct iio_chan_spec const *chan,
    461			     int *val,
    462			     int *val2,
    463			     long m)
    464{
    465	struct ad2s1210_state *st = iio_priv(indio_dev);
    466	u16 negative;
    467	int ret = 0;
    468	u16 pos;
    469	s16 vel;
    470
    471	mutex_lock(&st->lock);
    472	gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
    473	/* delay (6 * tck + 20) nano seconds */
    474	udelay(1);
    475
    476	switch (chan->type) {
    477	case IIO_ANGL:
    478		ad2s1210_set_mode(MOD_POS, st);
    479		break;
    480	case IIO_ANGL_VEL:
    481		ad2s1210_set_mode(MOD_VEL, st);
    482		break;
    483	default:
    484		ret = -EINVAL;
    485		break;
    486	}
    487	if (ret < 0)
    488		goto error_ret;
    489	ret = spi_read(st->sdev, st->rx, 2);
    490	if (ret < 0)
    491		goto error_ret;
    492
    493	switch (chan->type) {
    494	case IIO_ANGL:
    495		pos = be16_to_cpup((__be16 *)st->rx);
    496		if (st->hysteresis)
    497			pos >>= 16 - st->resolution;
    498		*val = pos;
    499		ret = IIO_VAL_INT;
    500		break;
    501	case IIO_ANGL_VEL:
    502		vel = be16_to_cpup((__be16 *)st->rx);
    503		vel >>= 16 - st->resolution;
    504		if (vel & 0x8000) {
    505			negative = (0xffff >> st->resolution) << st->resolution;
    506			vel |= negative;
    507		}
    508		*val = vel;
    509		ret = IIO_VAL_INT;
    510		break;
    511	default:
    512		mutex_unlock(&st->lock);
    513		return -EINVAL;
    514	}
    515
    516error_ret:
    517	gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
    518	/* delay (2 * tck + 20) nano seconds */
    519	udelay(1);
    520	mutex_unlock(&st->lock);
    521	return ret;
    522}
    523
    524static IIO_DEVICE_ATTR(fclkin, 0644,
    525		       ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
    526static IIO_DEVICE_ATTR(fexcit, 0644,
    527		       ad2s1210_show_fexcit,	ad2s1210_store_fexcit, 0);
    528static IIO_DEVICE_ATTR(control, 0644,
    529		       ad2s1210_show_control, ad2s1210_store_control, 0);
    530static IIO_DEVICE_ATTR(bits, 0644,
    531		       ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
    532static IIO_DEVICE_ATTR(fault, 0644,
    533		       ad2s1210_show_fault, ad2s1210_clear_fault, 0);
    534
    535static IIO_DEVICE_ATTR(los_thrd, 0644,
    536		       ad2s1210_show_reg, ad2s1210_store_reg,
    537		       AD2S1210_REG_LOS_THRD);
    538static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644,
    539		       ad2s1210_show_reg, ad2s1210_store_reg,
    540		       AD2S1210_REG_DOS_OVR_THRD);
    541static IIO_DEVICE_ATTR(dos_mis_thrd, 0644,
    542		       ad2s1210_show_reg, ad2s1210_store_reg,
    543		       AD2S1210_REG_DOS_MIS_THRD);
    544static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644,
    545		       ad2s1210_show_reg, ad2s1210_store_reg,
    546		       AD2S1210_REG_DOS_RST_MAX_THRD);
    547static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644,
    548		       ad2s1210_show_reg, ad2s1210_store_reg,
    549		       AD2S1210_REG_DOS_RST_MIN_THRD);
    550static IIO_DEVICE_ATTR(lot_high_thrd, 0644,
    551		       ad2s1210_show_reg, ad2s1210_store_reg,
    552		       AD2S1210_REG_LOT_HIGH_THRD);
    553static IIO_DEVICE_ATTR(lot_low_thrd, 0644,
    554		       ad2s1210_show_reg, ad2s1210_store_reg,
    555		       AD2S1210_REG_LOT_LOW_THRD);
    556
    557static const struct iio_chan_spec ad2s1210_channels[] = {
    558	{
    559		.type = IIO_ANGL,
    560		.indexed = 1,
    561		.channel = 0,
    562		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
    563	}, {
    564		.type = IIO_ANGL_VEL,
    565		.indexed = 1,
    566		.channel = 0,
    567		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
    568	}
    569};
    570
    571static struct attribute *ad2s1210_attributes[] = {
    572	&iio_dev_attr_fclkin.dev_attr.attr,
    573	&iio_dev_attr_fexcit.dev_attr.attr,
    574	&iio_dev_attr_control.dev_attr.attr,
    575	&iio_dev_attr_bits.dev_attr.attr,
    576	&iio_dev_attr_fault.dev_attr.attr,
    577	&iio_dev_attr_los_thrd.dev_attr.attr,
    578	&iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
    579	&iio_dev_attr_dos_mis_thrd.dev_attr.attr,
    580	&iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
    581	&iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
    582	&iio_dev_attr_lot_high_thrd.dev_attr.attr,
    583	&iio_dev_attr_lot_low_thrd.dev_attr.attr,
    584	NULL,
    585};
    586
    587static const struct attribute_group ad2s1210_attribute_group = {
    588	.attrs = ad2s1210_attributes,
    589};
    590
    591static int ad2s1210_initial(struct ad2s1210_state *st)
    592{
    593	unsigned char data;
    594	int ret;
    595
    596	mutex_lock(&st->lock);
    597	ad2s1210_set_resolution_pin(st);
    598
    599	ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
    600	if (ret < 0)
    601		goto error_ret;
    602	data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
    603	data |= (st->resolution - 10) >> 1;
    604	ret = ad2s1210_config_write(st, data);
    605	if (ret < 0)
    606		goto error_ret;
    607	ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
    608	if (ret < 0)
    609		goto error_ret;
    610
    611	if (ret & AD2S1210_MSB_IS_HIGH) {
    612		ret = -EIO;
    613		goto error_ret;
    614	}
    615
    616	ret = ad2s1210_update_frequency_control_word(st);
    617	if (ret < 0)
    618		goto error_ret;
    619	ret = ad2s1210_soft_reset(st);
    620error_ret:
    621	mutex_unlock(&st->lock);
    622	return ret;
    623}
    624
    625static const struct iio_info ad2s1210_info = {
    626	.read_raw = ad2s1210_read_raw,
    627	.attrs = &ad2s1210_attribute_group,
    628};
    629
    630static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
    631{
    632	struct spi_device *spi = st->sdev;
    633	int i, ret;
    634
    635	for (i = 0; i < ARRAY_SIZE(gpios); i++) {
    636		st->gpios[i] = devm_gpiod_get(&spi->dev, gpios[i].name,
    637					      gpios[i].flags);
    638		if (IS_ERR(st->gpios[i])) {
    639			ret = PTR_ERR(st->gpios[i]);
    640			dev_err(&spi->dev,
    641				"ad2s1210: failed to request %s GPIO: %d\n",
    642				gpios[i].name, ret);
    643			return ret;
    644		}
    645	}
    646
    647	return 0;
    648}
    649
    650static int ad2s1210_probe(struct spi_device *spi)
    651{
    652	struct iio_dev *indio_dev;
    653	struct ad2s1210_state *st;
    654	int ret;
    655
    656	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
    657	if (!indio_dev)
    658		return -ENOMEM;
    659	st = iio_priv(indio_dev);
    660	ret = ad2s1210_setup_gpios(st);
    661	if (ret < 0)
    662		return ret;
    663
    664	spi_set_drvdata(spi, indio_dev);
    665
    666	mutex_init(&st->lock);
    667	st->sdev = spi;
    668	st->hysteresis = true;
    669	st->mode = MOD_CONFIG;
    670	st->resolution = 12;
    671	st->fexcit = AD2S1210_DEF_EXCIT;
    672
    673	indio_dev->info = &ad2s1210_info;
    674	indio_dev->modes = INDIO_DIRECT_MODE;
    675	indio_dev->channels = ad2s1210_channels;
    676	indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
    677	indio_dev->name = spi_get_device_id(spi)->name;
    678
    679	ret = devm_iio_device_register(&spi->dev, indio_dev);
    680	if (ret)
    681		return ret;
    682
    683	st->fclkin = spi->max_speed_hz;
    684	spi->mode = SPI_MODE_3;
    685	spi_setup(spi);
    686	ad2s1210_initial(st);
    687
    688	return 0;
    689}
    690
    691static const struct of_device_id ad2s1210_of_match[] = {
    692	{ .compatible = "adi,ad2s1210", },
    693	{ }
    694};
    695MODULE_DEVICE_TABLE(of, ad2s1210_of_match);
    696
    697static const struct spi_device_id ad2s1210_id[] = {
    698	{ "ad2s1210" },
    699	{}
    700};
    701MODULE_DEVICE_TABLE(spi, ad2s1210_id);
    702
    703static struct spi_driver ad2s1210_driver = {
    704	.driver = {
    705		.name = DRV_NAME,
    706		.of_match_table = of_match_ptr(ad2s1210_of_match),
    707	},
    708	.probe = ad2s1210_probe,
    709	.id_table = ad2s1210_id,
    710};
    711module_spi_driver(ad2s1210_driver);
    712
    713MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
    714MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
    715MODULE_LICENSE("GPL v2");