cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hal.h (2556B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * hal.h - DIM2 HAL interface
      4 * (MediaLB, Device Interface Macro IP, OS62420)
      5 *
      6 * Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
      7 */
      8
      9#ifndef _DIM2_HAL_H
     10#define _DIM2_HAL_H
     11
     12#include <linux/types.h>
     13#include "reg.h"
     14
     15/*
     16 * The values below are specified in the hardware specification.
     17 * So, they should not be changed until the hardware specification changes.
     18 */
     19enum mlb_clk_speed {
     20	CLK_256FS = 0,
     21	CLK_512FS = 1,
     22	CLK_1024FS = 2,
     23	CLK_2048FS = 3,
     24	CLK_3072FS = 4,
     25	CLK_4096FS = 5,
     26	CLK_6144FS = 6,
     27	CLK_8192FS = 7,
     28};
     29
     30struct dim_ch_state_t {
     31	bool ready; /* Shows readiness to enqueue next buffer */
     32	u16 done_buffers; /* Number of completed buffers */
     33};
     34
     35struct int_ch_state {
     36	/* changed only in interrupt context */
     37	volatile int request_counter;
     38
     39	/* changed only in task context */
     40	volatile int service_counter;
     41
     42	u8 idx1;
     43	u8 idx2;
     44	u8 level; /* [0..2], buffering level */
     45};
     46
     47struct dim_channel {
     48	struct int_ch_state state;
     49	u8 addr;
     50	u16 dbr_addr;
     51	u16 dbr_size;
     52	u16 packet_length; /*< Isochronous packet length in bytes. */
     53	u16 bytes_per_frame; /*< Synchronous bytes per frame. */
     54	u16 done_sw_buffers_number; /*< Done software buffers number. */
     55};
     56
     57u8 dim_startup(struct dim2_regs __iomem *dim_base_address, u32 mlb_clock,
     58	       u32 fcnt);
     59
     60void dim_shutdown(void);
     61
     62bool dim_get_lock_state(void);
     63
     64u16 dim_norm_ctrl_async_buffer_size(u16 buf_size);
     65
     66u16 dim_norm_isoc_buffer_size(u16 buf_size, u16 packet_length);
     67
     68u16 dim_norm_sync_buffer_size(u16 buf_size, u16 bytes_per_frame);
     69
     70u8 dim_init_control(struct dim_channel *ch, u8 is_tx, u16 ch_address,
     71		    u16 max_buffer_size);
     72
     73u8 dim_init_async(struct dim_channel *ch, u8 is_tx, u16 ch_address,
     74		  u16 max_buffer_size);
     75
     76u8 dim_init_isoc(struct dim_channel *ch, u8 is_tx, u16 ch_address,
     77		 u16 packet_length);
     78
     79u8 dim_init_sync(struct dim_channel *ch, u8 is_tx, u16 ch_address,
     80		 u16 bytes_per_frame);
     81
     82u8 dim_destroy_channel(struct dim_channel *ch);
     83
     84void dim_service_mlb_int_irq(void);
     85
     86void dim_service_ahb_int_irq(struct dim_channel *const *channels);
     87
     88u8 dim_service_channel(struct dim_channel *ch);
     89
     90struct dim_ch_state_t *dim_get_channel_state(struct dim_channel *ch,
     91					     struct dim_ch_state_t *state_ptr);
     92
     93u16 dim_dbr_space(struct dim_channel *ch);
     94
     95bool dim_enqueue_buffer(struct dim_channel *ch, u32 buffer_addr,
     96			u16 buffer_size);
     97
     98bool dim_detach_buffers(struct dim_channel *ch, u16 buffers_number);
     99
    100void dimcb_on_error(u8 error_id, const char *error_message);
    101
    102#endif /* _DIM2_HAL_H */