cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rtl8712_xmit.h (2279B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/******************************************************************************
      3 *
      4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
      5 *
      6 * Modifications for inclusion into the Linux staging tree are
      7 * Copyright(c) 2010 Larry Finger. All rights reserved.
      8 *
      9 * Contact information:
     10 * WLAN FAE <wlanfae@realtek.com>
     11 * Larry Finger <Larry.Finger@lwfinger.net>
     12 *
     13 ******************************************************************************/
     14#ifndef _RTL8712_XMIT_H_
     15#define _RTL8712_XMIT_H_
     16
     17#define HWXMIT_ENTRY	4
     18
     19#define VO_QUEUE_INX	0
     20#define VI_QUEUE_INX	1
     21#define BE_QUEUE_INX	2
     22#define BK_QUEUE_INX	3
     23#define TS_QUEUE_INX	4
     24#define MGT_QUEUE_INX	5
     25#define BMC_QUEUE_INX	6
     26#define BCN_QUEUE_INX	7
     27
     28#define HW_QUEUE_ENTRY	8
     29
     30#define TXDESC_SIZE 32
     31#define TXDESC_OFFSET TXDESC_SIZE
     32
     33#define NR_AMSDU_XMITFRAME 8
     34#define NR_TXAGG_XMITFRAME 8
     35
     36#define MAX_AMSDU_XMITBUF_SZ 8704
     37#define MAX_TXAGG_XMITBUF_SZ 16384 /*16k*/
     38
     39#define tx_cmd tx_desc
     40
     41/*
     42 *defined for TX DESC Operation
     43 */
     44
     45#define MAX_TID (15)
     46
     47/*OFFSET 0*/
     48#define OFFSET_SZ (0)
     49#define OFFSET_SHT (16)
     50#define OWN	BIT(31)
     51#define FSG	BIT(27)
     52#define LSG	BIT(26)
     53#define TYPE_SHT (24)
     54#define TYPE_MSK (0x03000000)
     55
     56/*OFFSET 4*/
     57#define PKT_OFFSET_SZ (0)
     58#define QSEL_SHT (8)
     59#define HWPC BIT(31)
     60
     61/*OFFSET 8*/
     62#define BMC BIT(7)
     63#define BK BIT(30)
     64#define AGG_EN BIT(29)
     65#define RTS_RC_SHT (16)
     66
     67/*OFFSET 12*/
     68#define SEQ_SHT (16)
     69
     70/*OFFSET 16*/
     71#define TXBW BIT(18)
     72
     73/*OFFSET 20*/
     74#define DISFB BIT(15)
     75#define RSVD6_MSK (0x00E00000)
     76#define RSVD6_SHT (21)
     77
     78struct tx_desc {
     79	/*DWORD 0*/
     80	__le32 txdw0;
     81	__le32 txdw1;
     82	__le32 txdw2;
     83	__le32 txdw3;
     84	__le32 txdw4;
     85	__le32 txdw5;
     86	__le32 txdw6;
     87	__le32 txdw7;
     88};
     89
     90union txdesc {
     91	struct tx_desc txdesc;
     92	unsigned int value[TXDESC_SIZE >> 2];
     93};
     94
     95int r8712_xmitframe_complete(struct _adapter *padapter,
     96			     struct xmit_priv *pxmitpriv,
     97			     struct xmit_buf *pxmitbuf);
     98void r8712_do_queue_select(struct _adapter *padapter,
     99			   struct pkt_attrib *pattrib);
    100
    101#ifdef CONFIG_R8712_TX_AGGR
    102void r8712_xmitframe_aggr_1st(struct xmit_buf *pxmitbuf,
    103			      struct xmit_frame *pxmitframe);
    104void r8712_dump_aggr_xframe(struct xmit_buf *pxmitbuf,
    105			    struct xmit_frame *pxmitframe);
    106#endif
    107
    108#endif