cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rtl871x_io.h (6595B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/******************************************************************************
      3 *
      4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
      5 *
      6 * Modifications for inclusion into the Linux staging tree are
      7 * Copyright(c) 2010 Larry Finger. All rights reserved.
      8 *
      9 * Contact information:
     10 * WLAN FAE <wlanfae@realtek.com>
     11 * Larry Finger <Larry.Finger@lwfinger.net>
     12 *
     13 ******************************************************************************/
     14#ifndef _RTL871X_IO_H_
     15#define _RTL871X_IO_H_
     16
     17#include "osdep_service.h"
     18#include "osdep_intf.h"
     19
     20#define NUM_IOREQ		8
     21
     22#define MAX_PROT_SZ	(64-16)
     23
     24#define _IOREADY			0
     25#define _IO_WAIT_COMPLETE   1
     26#define _IO_WAIT_RSP        2
     27
     28/* IO COMMAND TYPE */
     29#define _IOSZ_MASK_		(0x7F)
     30#define _IO_WRITE_		BIT(7)
     31#define _IO_FIXED_		BIT(8)
     32#define _IO_BURST_		BIT(9)
     33#define _IO_BYTE_		BIT(10)
     34#define _IO_HW_			BIT(11)
     35#define _IO_WORD_		BIT(12)
     36#define _IO_SYNC_		BIT(13)
     37#define _IO_CMDMASK_	(0x1F80)
     38
     39/*
     40 *	For prompt mode accessing, caller shall free io_req
     41 *	Otherwise, io_handler will free io_req
     42 */
     43/* IO STATUS TYPE */
     44#define _IO_ERR_		BIT(2)
     45#define _IO_SUCCESS_	BIT(1)
     46#define _IO_DONE_		BIT(0)
     47#define IO_RD32			(_IO_SYNC_ | _IO_WORD_)
     48#define IO_RD16			(_IO_SYNC_ | _IO_HW_)
     49#define IO_RD8			(_IO_SYNC_ | _IO_BYTE_)
     50#define IO_RD32_ASYNC	(_IO_WORD_)
     51#define IO_RD16_ASYNC	(_IO_HW_)
     52#define IO_RD8_ASYNC	(_IO_BYTE_)
     53#define IO_WR32			(_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_)
     54#define IO_WR16			(_IO_WRITE_ | _IO_SYNC_ | _IO_HW_)
     55#define IO_WR8			(_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_)
     56#define IO_WR32_ASYNC	(_IO_WRITE_ | _IO_WORD_)
     57#define IO_WR16_ASYNC	(_IO_WRITE_ | _IO_HW_)
     58#define IO_WR8_ASYNC	(_IO_WRITE_ | _IO_BYTE_)
     59/*
     60 *	Only Sync. burst accessing is provided.
     61 */
     62#define IO_WR_BURST(x)		(IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | \
     63				((x) & _IOSZ_MASK_))
     64#define IO_RD_BURST(x)		(_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_))
     65/*below is for the intf_option bit defition...*/
     66#define _INTF_ASYNC_	BIT(0)	/*support async io*/
     67struct intf_priv;
     68struct	intf_hdl;
     69struct io_queue;
     70struct	_io_ops {
     71	uint (*_sdbus_read_bytes_to_membuf)(struct intf_priv *pintfpriv,
     72					    u32 addr, u32 cnt, u8 *pbuf);
     73	uint (*_sdbus_read_blocks_to_membuf)(struct intf_priv *pintfpriv,
     74					     u32 addr, u32 cnt, u8 *pbuf);
     75	u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
     76	u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
     77	u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
     78	uint (*_sdbus_write_blocks_from_membuf)(struct intf_priv *pintfpriv,
     79						u32 addr, u32 cnt, u8 *pbuf,
     80						u8 async);
     81	uint (*_sdbus_write_bytes_from_membuf)(struct intf_priv *pintfpriv,
     82					       u32 addr, u32 cnt, u8 *pbuf);
     83	u8 (*_cmd52r)(struct intf_priv *pintfpriv, u32 addr);
     84	void (*_cmd52w)(struct intf_priv *pintfpriv, u32 addr, u8 val8);
     85	u8 (*_cmdfunc152r)(struct intf_priv *pintfpriv, u32 addr);
     86	void (*_cmdfunc152w)(struct intf_priv *pintfpriv, u32 addr, u8 val8);
     87	void (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
     88	void (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
     89	void (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
     90	void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
     91			  u8 *pmem);
     92	void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
     93			   u8 *pmem);
     94	void (*_sync_irp_protocol_rw)(struct io_queue *pio_q);
     95	u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
     96			  u8 *pmem);
     97	u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
     98			   u8 *pmem);
     99};
    100
    101struct io_req {
    102	struct list_head list;
    103	u32	addr;
    104	/*volatile*/ u32	val;
    105	u32	command;
    106	u32	status;
    107	u8	*pbuf;
    108	void (*_async_io_callback)(struct _adapter *padapter,
    109				   struct io_req *pio_req, u8 *cnxt);
    110	u8 *cnxt;
    111};
    112
    113struct	intf_hdl {
    114	u32	intf_option;
    115	u8	*adapter;
    116	u8	*intf_dev;
    117	struct intf_priv	*pintfpriv;
    118	void (*intf_hdl_init)(u8 *priv);
    119	void (*intf_hdl_unload)(u8 *priv);
    120	void (*intf_hdl_open)(u8 *priv);
    121	void (*intf_hdl_close)(u8 *priv);
    122	struct	_io_ops	io_ops;
    123};
    124
    125struct reg_protocol_rd {
    126#ifdef __LITTLE_ENDIAN
    127	/* DW1 */
    128	u32		NumOfTrans:4;
    129	u32		Reserved1:4;
    130	u32		Reserved2:24;
    131	/* DW2 */
    132	u32		ByteCount:7;
    133	u32		WriteEnable:1;		/*0:read, 1:write*/
    134	u32		FixOrContinuous:1;	/*0:continuous, 1: Fix*/
    135	u32		BurstMode:1;
    136	u32		Byte1Access:1;
    137	u32		Byte2Access:1;
    138	u32		Byte4Access:1;
    139	u32		Reserved3:3;
    140	u32		Reserved4:16;
    141	/*DW3*/
    142	u32		BusAddress;
    143	/*DW4*/
    144#else
    145/*DW1*/
    146	u32 Reserved1:4;
    147	u32 NumOfTrans:4;
    148	u32 Reserved2:24;
    149	/*DW2*/
    150	u32 WriteEnable:1;
    151	u32 ByteCount:7;
    152	u32 Reserved3:3;
    153	u32 Byte4Access:1;
    154	u32 Byte2Access:1;
    155	u32 Byte1Access:1;
    156	u32 BurstMode:1;
    157	u32 FixOrContinuous:1;
    158	u32 Reserved4:16;
    159	/*DW3*/
    160	u32 BusAddress;
    161	/*DW4*/
    162#endif
    163};
    164
    165struct reg_protocol_wt {
    166#ifdef __LITTLE_ENDIAN
    167	/*DW1*/
    168	u32 NumOfTrans:4;
    169	u32 Reserved1:4;
    170	u32 Reserved2:24;
    171	/*DW2*/
    172	u32 ByteCount:7;
    173	u32 WriteEnable:1;	/*0:read, 1:write*/
    174	u32 FixOrContinuous:1;	/*0:continuous, 1: Fix*/
    175	u32 BurstMode:1;
    176	u32 Byte1Access:1;
    177	u32 Byte2Access:1;
    178	u32 Byte4Access:1;
    179	u32 Reserved3:3;
    180	u32 Reserved4:16;
    181	/*DW3*/
    182	u32 BusAddress;
    183	/*DW4*/
    184	u32 Value;
    185#else
    186	/*DW1*/
    187	u32 Reserved1:4;
    188	u32 NumOfTrans:4;
    189	u32 Reserved2:24;
    190	/*DW2*/
    191	u32 WriteEnable:1;
    192	u32 ByteCount:7;
    193	u32 Reserved3:3;
    194	u32 Byte4Access:1;
    195	u32 Byte2Access:1;
    196	u32 Byte1Access:1;
    197	u32 BurstMode:1;
    198	u32 FixOrContinuous:1;
    199	u32 Reserved4:16;
    200	/*DW3*/
    201	u32 BusAddress;
    202	/*DW4*/
    203	u32 Value;
    204#endif
    205};
    206
    207/*
    208 * Below is the data structure used by _io_handler
    209 */
    210
    211struct io_queue {
    212	spinlock_t lock;
    213	struct list_head free_ioreqs;
    214	/*The io_req list that will be served in the single protocol r/w.*/
    215	struct list_head pending;
    216	struct list_head processing;
    217	u8 *free_ioreqs_buf; /* 4-byte aligned */
    218	u8 *pallocated_free_ioreqs_buf;
    219	struct	intf_hdl intf;
    220};
    221
    222u8 r8712_read8(struct _adapter *adapter, u32 addr);
    223u16 r8712_read16(struct _adapter *adapter, u32 addr);
    224u32 r8712_read32(struct _adapter *adapter, u32 addr);
    225void r8712_read_mem(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
    226void r8712_read_port(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
    227void r8712_write8(struct _adapter *adapter, u32 addr, u8 val);
    228void r8712_write16(struct _adapter *adapter, u32 addr, u16 val);
    229void r8712_write32(struct _adapter *adapter, u32 addr, u32 val);
    230void r8712_write_mem(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
    231void r8712_write_port(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
    232/*ioreq */
    233uint r8712_alloc_io_queue(struct _adapter *adapter);
    234void r8712_free_io_queue(struct _adapter *adapter);
    235
    236#endif	/*_RTL871X_IO_H_*/