cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

ddk750_chip.h (2270B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef DDK750_CHIP_H__
      3#define DDK750_CHIP_H__
      4#define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
      5#ifndef SM750LE_REVISION_ID
      6#define SM750LE_REVISION_ID ((unsigned char)0xfe)
      7#endif
      8
      9#include <linux/io.h>
     10#include <linux/ioport.h>
     11#include <linux/uaccess.h>
     12
     13extern void __iomem *mmio750;
     14
     15/* software control endianness */
     16static inline u32 peek32(u32 addr)
     17{
     18	return readl(addr + mmio750);
     19}
     20
     21static inline void poke32(u32 addr, u32 data)
     22{
     23	writel(data, addr + mmio750);
     24}
     25
     26/* This is all the chips recognized by this library */
     27enum logical_chip_type {
     28	SM_UNKNOWN,
     29	SM718,
     30	SM750,
     31	SM750LE,
     32};
     33
     34enum clock_type {
     35	MXCLK_PLL,
     36	PRIMARY_PLL,
     37	SECONDARY_PLL,
     38	VGA0_PLL,
     39	VGA1_PLL,
     40};
     41
     42struct pll_value {
     43	enum clock_type clock_type;
     44	unsigned long input_freq; /* Input clock frequency to the PLL */
     45
     46	/* Use this when clockType = PANEL_PLL */
     47	unsigned long M;
     48	unsigned long N;
     49	unsigned long OD;
     50	unsigned long POD;
     51};
     52
     53/* input struct to initChipParam() function */
     54struct initchip_param {
     55	/* Use power mode 0 or 1 */
     56	unsigned short power_mode;
     57
     58	/*
     59	 * Speed of main chip clock in MHz unit
     60	 * 0 = keep the current clock setting
     61	 * Others = the new main chip clock
     62	 */
     63	unsigned short chip_clock;
     64
     65	/*
     66	 * Speed of memory clock in MHz unit
     67	 * 0 = keep the current clock setting
     68	 * Others = the new memory clock
     69	 */
     70	unsigned short mem_clock;
     71
     72	/*
     73	 * Speed of master clock in MHz unit
     74	 * 0 = keep the current clock setting
     75	 * Others = the new master clock
     76	 */
     77	unsigned short master_clock;
     78
     79	/*
     80	 * 0 = leave all engine state untouched.
     81	 * 1 = make sure they are off: 2D, Overlay,
     82	 * video alpha, alpha, hardware cursors
     83	 */
     84	unsigned short set_all_eng_off;
     85
     86	/*
     87	 * 0 = Do not reset the memory controller
     88	 * 1 = Reset the memory controller
     89	 */
     90	unsigned char reset_memory;
     91
     92	/* More initialization parameter can be added if needed */
     93};
     94
     95enum logical_chip_type sm750_get_chip_type(void);
     96void sm750_set_chip_type(unsigned short dev_id, u8 rev_id);
     97unsigned int sm750_calc_pll_value(unsigned int request, struct  pll_value *pll);
     98unsigned int sm750_format_pll_reg(struct pll_value *p_PLL);
     99unsigned int ddk750_get_vm_size(void);
    100int ddk750_init_hw(struct initchip_param *pinit_param);
    101
    102#endif