cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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device.h (6850B)


      1/* SPDX-License-Identifier: GPL-2.0+ */
      2/*
      3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
      4 * All rights reserved.
      5 *
      6 * Purpose: MAC Data structure
      7 *
      8 * Author: Tevin Chen
      9 *
     10 * Date: Mar 17, 1997
     11 *
     12 */
     13
     14#ifndef __DEVICE_H__
     15#define __DEVICE_H__
     16
     17#include <linux/module.h>
     18#include <linux/types.h>
     19#include <linux/pci.h>
     20#include <linux/etherdevice.h>
     21#include <linux/skbuff.h>
     22#include <linux/interrupt.h>
     23#include <linux/crc32.h>
     24#include <net/mac80211.h>
     25
     26/* device specific */
     27
     28#include "device_cfg.h"
     29#include "card.h"
     30#include "srom.h"
     31#include "desc.h"
     32#include "key.h"
     33#include "mac.h"
     34
     35/*---------------------  Export Definitions -------------------------*/
     36
     37#define RATE_1M		0
     38#define RATE_2M		1
     39#define RATE_5M		2
     40#define RATE_11M	3
     41#define RATE_6M		4
     42#define RATE_9M		5
     43#define RATE_12M	6
     44#define RATE_18M	7
     45#define RATE_24M	8
     46#define RATE_36M	9
     47#define RATE_48M	10
     48#define RATE_54M	11
     49#define MAX_RATE	12
     50
     51#define AUTO_FB_NONE            0
     52#define AUTO_FB_0               1
     53#define AUTO_FB_1               2
     54
     55#define FB_RATE0                0
     56#define FB_RATE1                1
     57
     58/* Antenna Mode */
     59#define ANT_A                   0
     60#define ANT_B                   1
     61#define ANT_DIVERSITY           2
     62#define ANT_RXD_TXA             3
     63#define ANT_RXD_TXB             4
     64#define ANT_UNKNOWN             0xFF
     65
     66#define BB_VGA_LEVEL            4
     67#define BB_VGA_CHANGE_THRESHOLD 16
     68
     69#define MAKE_BEACON_RESERVED	10  /* (us) */
     70
     71/* BUILD OBJ mode */
     72
     73#define	AVAIL_TD(p, q)	((p)->opts.tx_descs[(q)] - ((p)->iTDUsed[(q)]))
     74
     75/* 0:11A 1:11B 2:11G */
     76#define BB_TYPE_11A    0
     77#define BB_TYPE_11B    1
     78#define BB_TYPE_11G    2
     79
     80/* 0:11a, 1:11b, 2:11gb (only CCK in BasicRate), 3:11ga (OFDM in BasicRate) */
     81#define PK_TYPE_11A     0
     82#define PK_TYPE_11B     1
     83#define PK_TYPE_11GB    2
     84#define PK_TYPE_11GA    3
     85
     86#define OWNED_BY_HOST	0
     87#define	OWNED_BY_NIC	1
     88
     89struct vnt_options {
     90	int rx_descs0;		/* Number of RX descriptors0 */
     91	int rx_descs1;		/* Number of RX descriptors1 */
     92	int tx_descs[2];	/* Number of TX descriptors 0, 1 */
     93	int int_works;		/* interrupt limits */
     94	int short_retry;
     95	int long_retry;
     96	int bbp_type;
     97	u32 flags;
     98};
     99
    100struct vnt_private {
    101	struct pci_dev *pcid;
    102	/* mac80211 */
    103	struct ieee80211_hw *hw;
    104	struct ieee80211_vif *vif;
    105	unsigned long key_entry_inuse;
    106	u32 basic_rates;
    107	u16 current_aid;
    108	int mc_list_count;
    109	u8 mac_hw;
    110
    111/* dma addr, rx/tx pool */
    112	dma_addr_t                  pool_dma;
    113	dma_addr_t                  rd0_pool_dma;
    114	dma_addr_t                  rd1_pool_dma;
    115
    116	dma_addr_t                  td0_pool_dma;
    117	dma_addr_t                  td1_pool_dma;
    118
    119	dma_addr_t                  tx_bufs_dma0;
    120	dma_addr_t                  tx_bufs_dma1;
    121	dma_addr_t                  tx_beacon_dma;
    122
    123	unsigned char *tx0_bufs;
    124	unsigned char *tx1_bufs;
    125	unsigned char *tx_beacon_bufs;
    126
    127	void __iomem                *port_offset;
    128	u32                         memaddr;
    129	u32                         ioaddr;
    130
    131	spinlock_t                  lock;
    132
    133	volatile int                iTDUsed[TYPE_MAXTD];
    134
    135	struct vnt_tx_desc *apCurrTD[TYPE_MAXTD];
    136	struct vnt_tx_desc *apTailTD[TYPE_MAXTD];
    137
    138	struct vnt_tx_desc *apTD0Rings;
    139	struct vnt_tx_desc *apTD1Rings;
    140
    141	struct vnt_rx_desc *aRD0Ring;
    142	struct vnt_rx_desc *aRD1Ring;
    143	struct vnt_rx_desc *pCurrRD[TYPE_MAXRD];
    144
    145	struct vnt_options opts;
    146
    147	u32                         flags;
    148
    149	u32                         rx_buf_sz;
    150	u8 rx_rate;
    151
    152	u32                         rx_bytes;
    153
    154	/* Version control */
    155	unsigned char local_id;
    156	unsigned char byRFType;
    157
    158	unsigned char max_pwr_level;
    159	unsigned char byZoneType;
    160	bool bZoneRegExist;
    161	unsigned char byOriginalZonetype;
    162
    163	unsigned char abyCurrentNetAddr[ETH_ALEN]; __aligned(2)
    164	bool bLinkPass;          /* link status: OK or fail */
    165
    166	unsigned int current_rssi;
    167	unsigned char byCurrSQ;
    168
    169	unsigned long dwTxAntennaSel;
    170	unsigned long dwRxAntennaSel;
    171	unsigned char byAntennaCount;
    172	unsigned char byRxAntennaMode;
    173	unsigned char byTxAntennaMode;
    174	bool bTxRxAntInv;
    175
    176	unsigned char *pbyTmpBuff;
    177	unsigned int	uSIFS;    /* Current SIFS */
    178	unsigned int	uDIFS;    /* Current DIFS */
    179	unsigned int	uEIFS;    /* Current EIFS */
    180	unsigned int	uSlot;    /* Current SlotTime */
    181	unsigned int	uCwMin;   /* Current CwMin */
    182	unsigned int	uCwMax;   /* CwMax is fixed on 1023. */
    183	/* PHY parameter */
    184	unsigned char bySIFS;
    185	unsigned char byDIFS;
    186	unsigned char byEIFS;
    187	unsigned char bySlot;
    188	unsigned char byCWMaxMin;
    189
    190	u8		byBBType; /* 0:11A, 1:11B, 2:11G */
    191	u8		byPacketType; /*
    192				       * 0:11a,1:11b,2:11gb (only CCK
    193				       * in BasicRate), 3:11ga (OFDM in
    194				       * Basic Rate)
    195				       */
    196	unsigned short wBasicRate;
    197	unsigned char byACKRate;
    198	unsigned char byTopOFDMBasicRate;
    199	unsigned char byTopCCKBasicRate;
    200
    201	unsigned char byMinChannel;
    202	unsigned char byMaxChannel;
    203
    204	unsigned char preamble_type;
    205	unsigned char byShortPreamble;
    206
    207	unsigned short wCurrentRate;
    208	unsigned char byShortRetryLimit;
    209	unsigned char byLongRetryLimit;
    210	enum nl80211_iftype op_mode;
    211	bool bBSSIDFilter;
    212	unsigned short wMaxTransmitMSDULifetime;
    213
    214	bool bEncryptionEnable;
    215	bool bLongHeader;
    216	bool short_slot_time;
    217	bool bProtectMode;
    218	bool bNonERPPresent;
    219	bool bBarkerPreambleMd;
    220
    221	bool bRadioControlOff;
    222	bool radio_off;
    223	bool bEnablePSMode;
    224	unsigned short wListenInterval;
    225	bool bPWBitOn;
    226
    227	/* GPIO Radio Control */
    228	unsigned char byRadioCtl;
    229	unsigned char byGPIO;
    230	bool hw_radio_off;
    231	bool bPrvActive4RadioOFF;
    232	bool bGPIOBlockRead;
    233
    234	/* Beacon related */
    235	unsigned short wSeqCounter;
    236	unsigned short wBCNBufLen;
    237	bool bBeaconBufReady;
    238	bool bBeaconSent;
    239	bool bIsBeaconBufReadySet;
    240	unsigned int	cbBeaconBufReadySetCnt;
    241	bool bFixRate;
    242	u16 byCurrentCh;
    243
    244	bool bAES;
    245
    246	unsigned char byAutoFBCtrl;
    247
    248	/* For Update BaseBand VGA Gain Offset */
    249	bool bUpdateBBVGA;
    250	unsigned int	uBBVGADiffCount;
    251	unsigned char byBBVGANew;
    252	unsigned char byBBVGACurrent;
    253	unsigned char abyBBVGA[BB_VGA_LEVEL];
    254	long                    dbm_threshold[BB_VGA_LEVEL];
    255
    256	unsigned char byBBPreEDRSSI;
    257	unsigned char byBBPreEDIndex;
    258
    259	unsigned long dwDiagRefCount;
    260
    261	/* For FOE Tuning */
    262	unsigned char byFOETuning;
    263
    264	/* For RF Power table */
    265	unsigned char byCCKPwr;
    266	unsigned char byOFDMPwrG;
    267	unsigned char byCurPwr;
    268	char	 byCurPwrdBm;
    269	unsigned char abyCCKPwrTbl[CB_MAX_CHANNEL_24G + 1];
    270	unsigned char abyOFDMPwrTbl[CB_MAX_CHANNEL + 1];
    271	char	abyCCKDefaultPwr[CB_MAX_CHANNEL_24G + 1];
    272	char	abyOFDMDefaultPwr[CB_MAX_CHANNEL + 1];
    273	char	abyRegPwr[CB_MAX_CHANNEL + 1];
    274	char	abyLocalPwr[CB_MAX_CHANNEL + 1];
    275
    276	/* BaseBand Loopback Use */
    277	unsigned char byBBCR4d;
    278	unsigned char byBBCRc9;
    279	unsigned char byBBCR88;
    280	unsigned char byBBCR09;
    281
    282	unsigned char abyEEPROM[EEP_MAX_CONTEXT_SIZE]; /* unsigned long alignment */
    283
    284	unsigned short wBeaconInterval;
    285	u16 wake_up_count;
    286
    287	struct work_struct interrupt_work;
    288
    289	struct ieee80211_low_level_stats low_stats;
    290};
    291
    292#endif