cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

device_main.c (45214B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
      4 * All rights reserved.
      5 *
      6 * Purpose: driver entry for initial, open, close, tx and rx.
      7 *
      8 * Author: Lyndon Chen
      9 *
     10 * Date: Jan 8, 2003
     11 *
     12 * Functions:
     13 *
     14 *   vt6655_probe - module initial (insmod) driver entry
     15 *   vt6655_remove - module remove entry
     16 *   device_free_info - device structure resource free function
     17 *   device_print_info - print out resource
     18 *   device_rx_srv - rx service function
     19 *   device_alloc_rx_buf - rx buffer pre-allocated function
     20 *   device_free_rx_buf - free rx buffer function
     21 *   device_free_tx_buf - free tx buffer function
     22 *   device_init_rd0_ring - initial rd dma0 ring
     23 *   device_init_rd1_ring - initial rd dma1 ring
     24 *   device_init_td0_ring - initial tx dma0 ring buffer
     25 *   device_init_td1_ring - initial tx dma1 ring buffer
     26 *   device_init_registers - initial MAC & BBP & RF internal registers.
     27 *   device_init_rings - initial tx/rx ring buffer
     28 *   device_free_rings - free all allocated ring buffer
     29 *   device_tx_srv - tx interrupt service function
     30 *
     31 * Revision History:
     32 */
     33
     34#include <linux/file.h>
     35#include "device.h"
     36#include "card.h"
     37#include "channel.h"
     38#include "baseband.h"
     39#include "mac.h"
     40#include "power.h"
     41#include "rxtx.h"
     42#include "dpc.h"
     43#include "rf.h"
     44#include <linux/delay.h>
     45#include <linux/kthread.h>
     46#include <linux/slab.h>
     47
     48/*---------------------  Static Definitions -------------------------*/
     49/*
     50 * Define module options
     51 */
     52MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
     53MODULE_LICENSE("GPL");
     54MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
     55
     56#define DEVICE_PARAM(N, D)
     57
     58#define RX_DESC_MIN0     16
     59#define RX_DESC_MAX0     128
     60#define RX_DESC_DEF0     32
     61DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
     62
     63#define RX_DESC_MIN1     16
     64#define RX_DESC_MAX1     128
     65#define RX_DESC_DEF1     32
     66DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
     67
     68#define TX_DESC_MIN0     16
     69#define TX_DESC_MAX0     128
     70#define TX_DESC_DEF0     32
     71DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
     72
     73#define TX_DESC_MIN1     16
     74#define TX_DESC_MAX1     128
     75#define TX_DESC_DEF1     64
     76DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
     77
     78#define INT_WORKS_DEF   20
     79#define INT_WORKS_MIN   10
     80#define INT_WORKS_MAX   64
     81
     82DEVICE_PARAM(int_works, "Number of packets per interrupt services");
     83
     84#define RTS_THRESH_DEF     2347
     85
     86#define FRAG_THRESH_DEF     2346
     87
     88#define SHORT_RETRY_MIN     0
     89#define SHORT_RETRY_MAX     31
     90#define SHORT_RETRY_DEF     8
     91
     92DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
     93
     94#define LONG_RETRY_MIN     0
     95#define LONG_RETRY_MAX     15
     96#define LONG_RETRY_DEF     4
     97
     98DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
     99
    100/* BasebandType[] baseband type selected
    101 * 0: indicate 802.11a type
    102 * 1: indicate 802.11b type
    103 * 2: indicate 802.11g type
    104 */
    105#define BBP_TYPE_MIN     0
    106#define BBP_TYPE_MAX     2
    107#define BBP_TYPE_DEF     2
    108
    109DEVICE_PARAM(BasebandType, "baseband type");
    110
    111/*
    112 * Static vars definitions
    113 */
    114static const struct pci_device_id vt6655_pci_id_table[] = {
    115	{ PCI_VDEVICE(VIA, 0x3253) },
    116	{ 0, }
    117};
    118
    119/*---------------------  Static Functions  --------------------------*/
    120
    121static int  vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
    122static void device_free_info(struct vnt_private *priv);
    123static void device_print_info(struct vnt_private *priv);
    124
    125static int device_init_rd0_ring(struct vnt_private *priv);
    126static int device_init_rd1_ring(struct vnt_private *priv);
    127static int device_init_td0_ring(struct vnt_private *priv);
    128static int device_init_td1_ring(struct vnt_private *priv);
    129
    130static int  device_rx_srv(struct vnt_private *priv, unsigned int idx);
    131static int  device_tx_srv(struct vnt_private *priv, unsigned int idx);
    132static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
    133static void device_free_rx_buf(struct vnt_private *priv,
    134			       struct vnt_rx_desc *rd);
    135static void device_init_registers(struct vnt_private *priv);
    136static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
    137static void device_free_td0_ring(struct vnt_private *priv);
    138static void device_free_td1_ring(struct vnt_private *priv);
    139static void device_free_rd0_ring(struct vnt_private *priv);
    140static void device_free_rd1_ring(struct vnt_private *priv);
    141static void device_free_rings(struct vnt_private *priv);
    142
    143/*---------------------  Export Variables  --------------------------*/
    144
    145/*---------------------  Export Functions  --------------------------*/
    146
    147static void vt6655_remove(struct pci_dev *pcid)
    148{
    149	struct vnt_private *priv = pci_get_drvdata(pcid);
    150
    151	if (!priv)
    152		return;
    153	device_free_info(priv);
    154}
    155
    156static void device_get_options(struct vnt_private *priv)
    157{
    158	struct vnt_options *opts = &priv->opts;
    159
    160	opts->rx_descs0 = RX_DESC_DEF0;
    161	opts->rx_descs1 = RX_DESC_DEF1;
    162	opts->tx_descs[0] = TX_DESC_DEF0;
    163	opts->tx_descs[1] = TX_DESC_DEF1;
    164	opts->int_works = INT_WORKS_DEF;
    165
    166	opts->short_retry = SHORT_RETRY_DEF;
    167	opts->long_retry = LONG_RETRY_DEF;
    168	opts->bbp_type = BBP_TYPE_DEF;
    169}
    170
    171static void
    172device_set_options(struct vnt_private *priv)
    173{
    174	priv->byShortRetryLimit = priv->opts.short_retry;
    175	priv->byLongRetryLimit = priv->opts.long_retry;
    176	priv->byBBType = priv->opts.bbp_type;
    177	priv->byPacketType = priv->byBBType;
    178	priv->byAutoFBCtrl = AUTO_FB_0;
    179	priv->bUpdateBBVGA = true;
    180	priv->preamble_type = 0;
    181
    182	pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
    183	pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
    184	pr_debug(" preamble_type= %d\n", (int)priv->preamble_type);
    185	pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
    186	pr_debug(" byBBType= %d\n", (int)priv->byBBType);
    187}
    188
    189/*
    190 * Initialisation of MAC & BBP registers
    191 */
    192
    193static void device_init_registers(struct vnt_private *priv)
    194{
    195	unsigned long flags;
    196	unsigned int ii;
    197	unsigned char byValue;
    198	unsigned char byCCKPwrdBm = 0;
    199	unsigned char byOFDMPwrdBm = 0;
    200
    201	MACbShutdown(priv);
    202	bb_software_reset(priv);
    203
    204	/* Do MACbSoftwareReset in MACvInitialize */
    205	MACbSoftwareReset(priv);
    206
    207	priv->bAES = false;
    208
    209	/* Only used in 11g type, sync with ERP IE */
    210	priv->bProtectMode = false;
    211
    212	priv->bNonERPPresent = false;
    213	priv->bBarkerPreambleMd = false;
    214	priv->wCurrentRate = RATE_1M;
    215	priv->byTopOFDMBasicRate = RATE_24M;
    216	priv->byTopCCKBasicRate = RATE_1M;
    217
    218	/* init MAC */
    219	MACvInitialize(priv);
    220
    221	/* Get Local ID */
    222	priv->local_id = ioread8(priv->port_offset + MAC_REG_LOCALID);
    223
    224	spin_lock_irqsave(&priv->lock, flags);
    225
    226	SROMvReadAllContents(priv->port_offset, priv->abyEEPROM);
    227
    228	spin_unlock_irqrestore(&priv->lock, flags);
    229
    230	/* Get Channel range */
    231	priv->byMinChannel = 1;
    232	priv->byMaxChannel = CB_MAX_CHANNEL;
    233
    234	/* Get Antena */
    235	byValue = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_ANTENNA);
    236	if (byValue & EEP_ANTINV)
    237		priv->bTxRxAntInv = true;
    238	else
    239		priv->bTxRxAntInv = false;
    240
    241	byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
    242	/* if not set default is All */
    243	if (byValue == 0)
    244		byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
    245
    246	if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
    247		priv->byAntennaCount = 2;
    248		priv->byTxAntennaMode = ANT_B;
    249		priv->dwTxAntennaSel = 1;
    250		priv->dwRxAntennaSel = 1;
    251
    252		if (priv->bTxRxAntInv)
    253			priv->byRxAntennaMode = ANT_A;
    254		else
    255			priv->byRxAntennaMode = ANT_B;
    256	} else  {
    257		priv->byAntennaCount = 1;
    258		priv->dwTxAntennaSel = 0;
    259		priv->dwRxAntennaSel = 0;
    260
    261		if (byValue & EEP_ANTENNA_AUX) {
    262			priv->byTxAntennaMode = ANT_A;
    263
    264			if (priv->bTxRxAntInv)
    265				priv->byRxAntennaMode = ANT_B;
    266			else
    267				priv->byRxAntennaMode = ANT_A;
    268		} else {
    269			priv->byTxAntennaMode = ANT_B;
    270
    271			if (priv->bTxRxAntInv)
    272				priv->byRxAntennaMode = ANT_A;
    273			else
    274				priv->byRxAntennaMode = ANT_B;
    275		}
    276	}
    277
    278	/* Set initial antenna mode */
    279	bb_set_tx_antenna_mode(priv, priv->byTxAntennaMode);
    280	bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode);
    281
    282	/* zonetype initial */
    283	priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
    284
    285	if (!priv->bZoneRegExist)
    286		priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
    287
    288	pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
    289
    290	/* Init RF module */
    291	RFbInit(priv);
    292
    293	/* Get Desire Power Value */
    294	priv->byCurPwr = 0xFF;
    295	priv->byCCKPwr = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_PWR_CCK);
    296	priv->byOFDMPwrG = SROMbyReadEmbedded(priv->port_offset,
    297					      EEP_OFS_PWR_OFDMG);
    298
    299	/* Load power Table */
    300	for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
    301		priv->abyCCKPwrTbl[ii + 1] =
    302			SROMbyReadEmbedded(priv->port_offset,
    303					   (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
    304		if (priv->abyCCKPwrTbl[ii + 1] == 0)
    305			priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
    306
    307		priv->abyOFDMPwrTbl[ii + 1] =
    308			SROMbyReadEmbedded(priv->port_offset,
    309					   (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
    310		if (priv->abyOFDMPwrTbl[ii + 1] == 0)
    311			priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
    312
    313		priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
    314		priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
    315	}
    316
    317	/* recover 12,13 ,14channel for EUROPE by 11 channel */
    318	for (ii = 11; ii < 14; ii++) {
    319		priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
    320		priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
    321	}
    322
    323	/* Load OFDM A Power Table */
    324	for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
    325		priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
    326			SROMbyReadEmbedded(priv->port_offset,
    327					   (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
    328
    329		priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
    330			SROMbyReadEmbedded(priv->port_offset,
    331					   (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
    332	}
    333
    334	if (priv->local_id > REV_ID_VT3253_B1) {
    335		MACvSelectPage1(priv->port_offset);
    336
    337		iowrite8(MSRCTL1_TXPWR | MSRCTL1_CSAPAREN, priv->port_offset + MAC_REG_MSRCTL + 1);
    338
    339		MACvSelectPage0(priv->port_offset);
    340	}
    341
    342	/* use relative tx timeout and 802.11i D4 */
    343	MACvWordRegBitsOn(priv->port_offset,
    344			  MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
    345
    346	/* set performance parameter by registry */
    347	MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
    348	MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
    349
    350	/* reset TSF counter */
    351	iowrite8(TFTCTL_TSFCNTRST, priv->port_offset + MAC_REG_TFTCTL);
    352	/* enable TSF counter */
    353	iowrite8(TFTCTL_TSFCNTREN, priv->port_offset + MAC_REG_TFTCTL);
    354
    355	/* initialize BBP registers */
    356	bb_vt3253_init(priv);
    357
    358	if (priv->bUpdateBBVGA) {
    359		priv->byBBVGACurrent = priv->abyBBVGA[0];
    360		priv->byBBVGANew = priv->byBBVGACurrent;
    361		bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
    362	}
    363
    364	bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode);
    365	bb_set_tx_antenna_mode(priv, priv->byTxAntennaMode);
    366
    367	/* Set BB and packet type at the same time. */
    368	/* Set Short Slot Time, xIFS, and RSPINF. */
    369	priv->wCurrentRate = RATE_54M;
    370
    371	priv->radio_off = false;
    372
    373	priv->byRadioCtl = SROMbyReadEmbedded(priv->port_offset,
    374					      EEP_OFS_RADIOCTL);
    375	priv->hw_radio_off = false;
    376
    377	if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
    378		/* Get GPIO */
    379		priv->byGPIO = ioread8(priv->port_offset + MAC_REG_GPIOCTL1);
    380
    381		if (((priv->byGPIO & GPIO0_DATA) &&
    382		     !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
    383		     (!(priv->byGPIO & GPIO0_DATA) &&
    384		     (priv->byRadioCtl & EEP_RADIOCTL_INV)))
    385			priv->hw_radio_off = true;
    386	}
    387
    388	if (priv->hw_radio_off || priv->bRadioControlOff)
    389		CARDbRadioPowerOff(priv);
    390
    391	/* get Permanent network address */
    392	SROMvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr);
    393	pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
    394
    395	/* reset Tx pointer */
    396	CARDvSafeResetRx(priv);
    397	/* reset Rx pointer */
    398	CARDvSafeResetTx(priv);
    399
    400	if (priv->local_id <= REV_ID_VT3253_A1)
    401		MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR);
    402
    403	/* Turn On Rx DMA */
    404	MACvReceive0(priv->port_offset);
    405	MACvReceive1(priv->port_offset);
    406
    407	/* start the adapter */
    408	iowrite8(HOSTCR_MACEN | HOSTCR_RXON | HOSTCR_TXON, priv->port_offset + MAC_REG_HOSTCR);
    409}
    410
    411static void device_print_info(struct vnt_private *priv)
    412{
    413	dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
    414		 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
    415		 (unsigned long)priv->port_offset, priv->pcid->irq);
    416}
    417
    418static void device_free_info(struct vnt_private *priv)
    419{
    420	if (!priv)
    421		return;
    422
    423	if (priv->mac_hw)
    424		ieee80211_unregister_hw(priv->hw);
    425
    426	if (priv->port_offset)
    427		iounmap(priv->port_offset);
    428
    429	if (priv->pcid)
    430		pci_release_regions(priv->pcid);
    431
    432	if (priv->hw)
    433		ieee80211_free_hw(priv->hw);
    434}
    435
    436static bool device_init_rings(struct vnt_private *priv)
    437{
    438	void *vir_pool;
    439
    440	/*allocate all RD/TD rings a single pool*/
    441	vir_pool = dma_alloc_coherent(&priv->pcid->dev,
    442				      priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
    443				      priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
    444				      priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
    445				      priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
    446				      &priv->pool_dma, GFP_ATOMIC);
    447	if (!vir_pool) {
    448		dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
    449		return false;
    450	}
    451
    452	priv->aRD0Ring = vir_pool;
    453	priv->aRD1Ring = vir_pool +
    454		priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
    455
    456	priv->rd0_pool_dma = priv->pool_dma;
    457	priv->rd1_pool_dma = priv->rd0_pool_dma +
    458		priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
    459
    460	priv->tx0_bufs = dma_alloc_coherent(&priv->pcid->dev,
    461					    priv->opts.tx_descs[0] * PKT_BUF_SZ +
    462					    priv->opts.tx_descs[1] * PKT_BUF_SZ +
    463					    CB_BEACON_BUF_SIZE +
    464					    CB_MAX_BUF_SIZE,
    465					    &priv->tx_bufs_dma0, GFP_ATOMIC);
    466	if (!priv->tx0_bufs) {
    467		dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
    468
    469		dma_free_coherent(&priv->pcid->dev,
    470				  priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
    471				  priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
    472				  priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
    473				  priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
    474				  vir_pool, priv->pool_dma);
    475		return false;
    476	}
    477
    478	priv->td0_pool_dma = priv->rd1_pool_dma +
    479		priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
    480
    481	priv->td1_pool_dma = priv->td0_pool_dma +
    482		priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
    483
    484	/* vir_pool: pvoid type */
    485	priv->apTD0Rings = vir_pool
    486		+ priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
    487		+ priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
    488
    489	priv->apTD1Rings = vir_pool
    490		+ priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
    491		+ priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
    492		+ priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
    493
    494	priv->tx1_bufs = priv->tx0_bufs +
    495		priv->opts.tx_descs[0] * PKT_BUF_SZ;
    496
    497	priv->tx_beacon_bufs = priv->tx1_bufs +
    498		priv->opts.tx_descs[1] * PKT_BUF_SZ;
    499
    500	priv->pbyTmpBuff = priv->tx_beacon_bufs +
    501		CB_BEACON_BUF_SIZE;
    502
    503	priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
    504		priv->opts.tx_descs[0] * PKT_BUF_SZ;
    505
    506	priv->tx_beacon_dma = priv->tx_bufs_dma1 +
    507		priv->opts.tx_descs[1] * PKT_BUF_SZ;
    508
    509	return true;
    510}
    511
    512static void device_free_rings(struct vnt_private *priv)
    513{
    514	dma_free_coherent(&priv->pcid->dev,
    515			  priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
    516			  priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
    517			  priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
    518			  priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
    519			  priv->aRD0Ring, priv->pool_dma);
    520
    521	if (priv->tx0_bufs)
    522		dma_free_coherent(&priv->pcid->dev,
    523				  priv->opts.tx_descs[0] * PKT_BUF_SZ +
    524				  priv->opts.tx_descs[1] * PKT_BUF_SZ +
    525				  CB_BEACON_BUF_SIZE +
    526				  CB_MAX_BUF_SIZE,
    527				  priv->tx0_bufs, priv->tx_bufs_dma0);
    528}
    529
    530static int device_init_rd0_ring(struct vnt_private *priv)
    531{
    532	int i;
    533	dma_addr_t      curr = priv->rd0_pool_dma;
    534	struct vnt_rx_desc *desc;
    535	int ret;
    536
    537	/* Init the RD0 ring entries */
    538	for (i = 0; i < priv->opts.rx_descs0;
    539	     i ++, curr += sizeof(struct vnt_rx_desc)) {
    540		desc = &priv->aRD0Ring[i];
    541		desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
    542		if (!desc->rd_info) {
    543			ret = -ENOMEM;
    544			goto err_free_desc;
    545		}
    546
    547		if (!device_alloc_rx_buf(priv, desc)) {
    548			dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
    549			ret = -ENOMEM;
    550			goto err_free_rd;
    551		}
    552
    553		desc->next = &priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0];
    554		desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
    555	}
    556
    557	if (i > 0)
    558		priv->aRD0Ring[i - 1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
    559	priv->pCurrRD[0] = &priv->aRD0Ring[0];
    560
    561	return 0;
    562
    563err_free_rd:
    564	kfree(desc->rd_info);
    565
    566err_free_desc:
    567	while (--i) {
    568		desc = &priv->aRD0Ring[i];
    569		device_free_rx_buf(priv, desc);
    570		kfree(desc->rd_info);
    571	}
    572
    573	return ret;
    574}
    575
    576static int device_init_rd1_ring(struct vnt_private *priv)
    577{
    578	int i;
    579	dma_addr_t      curr = priv->rd1_pool_dma;
    580	struct vnt_rx_desc *desc;
    581	int ret;
    582
    583	/* Init the RD1 ring entries */
    584	for (i = 0; i < priv->opts.rx_descs1;
    585	     i ++, curr += sizeof(struct vnt_rx_desc)) {
    586		desc = &priv->aRD1Ring[i];
    587		desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
    588		if (!desc->rd_info) {
    589			ret = -ENOMEM;
    590			goto err_free_desc;
    591		}
    592
    593		if (!device_alloc_rx_buf(priv, desc)) {
    594			dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
    595			ret = -ENOMEM;
    596			goto err_free_rd;
    597		}
    598
    599		desc->next = &priv->aRD1Ring[(i + 1) % priv->opts.rx_descs1];
    600		desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
    601	}
    602
    603	if (i > 0)
    604		priv->aRD1Ring[i - 1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
    605	priv->pCurrRD[1] = &priv->aRD1Ring[0];
    606
    607	return 0;
    608
    609err_free_rd:
    610	kfree(desc->rd_info);
    611
    612err_free_desc:
    613	while (--i) {
    614		desc = &priv->aRD1Ring[i];
    615		device_free_rx_buf(priv, desc);
    616		kfree(desc->rd_info);
    617	}
    618
    619	return ret;
    620}
    621
    622static void device_free_rd0_ring(struct vnt_private *priv)
    623{
    624	int i;
    625
    626	for (i = 0; i < priv->opts.rx_descs0; i++) {
    627		struct vnt_rx_desc *desc = &priv->aRD0Ring[i];
    628
    629		device_free_rx_buf(priv, desc);
    630		kfree(desc->rd_info);
    631	}
    632}
    633
    634static void device_free_rd1_ring(struct vnt_private *priv)
    635{
    636	int i;
    637
    638	for (i = 0; i < priv->opts.rx_descs1; i++) {
    639		struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
    640
    641		device_free_rx_buf(priv, desc);
    642		kfree(desc->rd_info);
    643	}
    644}
    645
    646static int device_init_td0_ring(struct vnt_private *priv)
    647{
    648	int i;
    649	dma_addr_t  curr;
    650	struct vnt_tx_desc *desc;
    651	int ret;
    652
    653	curr = priv->td0_pool_dma;
    654	for (i = 0; i < priv->opts.tx_descs[0];
    655	     i++, curr += sizeof(struct vnt_tx_desc)) {
    656		desc = &priv->apTD0Rings[i];
    657		desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
    658		if (!desc->td_info) {
    659			ret = -ENOMEM;
    660			goto err_free_desc;
    661		}
    662
    663		desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
    664		desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
    665
    666		desc->next = &(priv->apTD0Rings[(i + 1) % priv->opts.tx_descs[0]]);
    667		desc->next_desc = cpu_to_le32(curr +
    668					      sizeof(struct vnt_tx_desc));
    669	}
    670
    671	if (i > 0)
    672		priv->apTD0Rings[i - 1].next_desc = cpu_to_le32(priv->td0_pool_dma);
    673	priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
    674
    675	return 0;
    676
    677err_free_desc:
    678	while (--i) {
    679		desc = &priv->apTD0Rings[i];
    680		kfree(desc->td_info);
    681	}
    682
    683	return ret;
    684}
    685
    686static int device_init_td1_ring(struct vnt_private *priv)
    687{
    688	int i;
    689	dma_addr_t  curr;
    690	struct vnt_tx_desc *desc;
    691	int ret;
    692
    693	/* Init the TD ring entries */
    694	curr = priv->td1_pool_dma;
    695	for (i = 0; i < priv->opts.tx_descs[1];
    696	     i++, curr += sizeof(struct vnt_tx_desc)) {
    697		desc = &priv->apTD1Rings[i];
    698		desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
    699		if (!desc->td_info) {
    700			ret = -ENOMEM;
    701			goto err_free_desc;
    702		}
    703
    704		desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
    705		desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
    706
    707		desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
    708		desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
    709	}
    710
    711	if (i > 0)
    712		priv->apTD1Rings[i - 1].next_desc = cpu_to_le32(priv->td1_pool_dma);
    713	priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
    714
    715	return 0;
    716
    717err_free_desc:
    718	while (--i) {
    719		desc = &priv->apTD1Rings[i];
    720		kfree(desc->td_info);
    721	}
    722
    723	return ret;
    724}
    725
    726static void device_free_td0_ring(struct vnt_private *priv)
    727{
    728	int i;
    729
    730	for (i = 0; i < priv->opts.tx_descs[0]; i++) {
    731		struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
    732		struct vnt_td_info *td_info = desc->td_info;
    733
    734		dev_kfree_skb(td_info->skb);
    735		kfree(desc->td_info);
    736	}
    737}
    738
    739static void device_free_td1_ring(struct vnt_private *priv)
    740{
    741	int i;
    742
    743	for (i = 0; i < priv->opts.tx_descs[1]; i++) {
    744		struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
    745		struct vnt_td_info *td_info = desc->td_info;
    746
    747		dev_kfree_skb(td_info->skb);
    748		kfree(desc->td_info);
    749	}
    750}
    751
    752/*-----------------------------------------------------------------*/
    753
    754static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
    755{
    756	struct vnt_rx_desc *rd;
    757	int works = 0;
    758
    759	for (rd = priv->pCurrRD[idx];
    760	     rd->rd0.owner == OWNED_BY_HOST;
    761	     rd = rd->next) {
    762		if (works++ > 15)
    763			break;
    764
    765		if (!rd->rd_info->skb)
    766			break;
    767
    768		if (vnt_receive_frame(priv, rd)) {
    769			if (!device_alloc_rx_buf(priv, rd)) {
    770				dev_err(&priv->pcid->dev,
    771					"can not allocate rx buf\n");
    772				break;
    773			}
    774		}
    775		rd->rd0.owner = OWNED_BY_NIC;
    776	}
    777
    778	priv->pCurrRD[idx] = rd;
    779
    780	return works;
    781}
    782
    783static bool device_alloc_rx_buf(struct vnt_private *priv,
    784				struct vnt_rx_desc *rd)
    785{
    786	struct vnt_rd_info *rd_info = rd->rd_info;
    787
    788	rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
    789	if (!rd_info->skb)
    790		return false;
    791
    792	rd_info->skb_dma =
    793		dma_map_single(&priv->pcid->dev,
    794			       skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
    795			       priv->rx_buf_sz, DMA_FROM_DEVICE);
    796	if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
    797		dev_kfree_skb(rd_info->skb);
    798		rd_info->skb = NULL;
    799		return false;
    800	}
    801
    802	*((unsigned int *)&rd->rd0) = 0; /* FIX cast */
    803
    804	rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
    805	rd->rd0.owner = OWNED_BY_NIC;
    806	rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
    807	rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
    808
    809	return true;
    810}
    811
    812static void device_free_rx_buf(struct vnt_private *priv,
    813			       struct vnt_rx_desc *rd)
    814{
    815	struct vnt_rd_info *rd_info = rd->rd_info;
    816
    817	dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
    818			 priv->rx_buf_sz, DMA_FROM_DEVICE);
    819	dev_kfree_skb(rd_info->skb);
    820}
    821
    822static const u8 fallback_rate0[5][5] = {
    823	{RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
    824	{RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
    825	{RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
    826	{RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
    827	{RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
    828};
    829
    830static const u8 fallback_rate1[5][5] = {
    831	{RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
    832	{RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
    833	{RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
    834	{RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
    835	{RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
    836};
    837
    838static int vnt_int_report_rate(struct vnt_private *priv,
    839			       struct vnt_td_info *context, u8 tsr0, u8 tsr1)
    840{
    841	struct vnt_tx_fifo_head *fifo_head;
    842	struct ieee80211_tx_info *info;
    843	struct ieee80211_rate *rate;
    844	u16 fb_option;
    845	u8 tx_retry = (tsr0 & TSR0_NCR);
    846	s8 idx;
    847
    848	if (!context)
    849		return -ENOMEM;
    850
    851	if (!context->skb)
    852		return -EINVAL;
    853
    854	fifo_head = (struct vnt_tx_fifo_head *)context->buf;
    855	fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
    856			(FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
    857
    858	info = IEEE80211_SKB_CB(context->skb);
    859	idx = info->control.rates[0].idx;
    860
    861	if (fb_option && !(tsr1 & TSR1_TERR)) {
    862		u8 tx_rate;
    863		u8 retry = tx_retry;
    864
    865		rate = ieee80211_get_tx_rate(priv->hw, info);
    866		tx_rate = rate->hw_value - RATE_18M;
    867
    868		if (retry > 4)
    869			retry = 4;
    870
    871		if (fb_option & FIFOCTL_AUTO_FB_0)
    872			tx_rate = fallback_rate0[tx_rate][retry];
    873		else if (fb_option & FIFOCTL_AUTO_FB_1)
    874			tx_rate = fallback_rate1[tx_rate][retry];
    875
    876		if (info->band == NL80211_BAND_5GHZ)
    877			idx = tx_rate - RATE_6M;
    878		else
    879			idx = tx_rate;
    880	}
    881
    882	ieee80211_tx_info_clear_status(info);
    883
    884	info->status.rates[0].count = tx_retry;
    885
    886	if (!(tsr1 & TSR1_TERR)) {
    887		info->status.rates[0].idx = idx;
    888
    889		if (info->flags & IEEE80211_TX_CTL_NO_ACK)
    890			info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
    891		else
    892			info->flags |= IEEE80211_TX_STAT_ACK;
    893	}
    894
    895	return 0;
    896}
    897
    898static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
    899{
    900	struct vnt_tx_desc *desc;
    901	int                      works = 0;
    902	unsigned char byTsr0;
    903	unsigned char byTsr1;
    904
    905	for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
    906		if (desc->td0.owner == OWNED_BY_NIC)
    907			break;
    908		if (works++ > 15)
    909			break;
    910
    911		byTsr0 = desc->td0.tsr0;
    912		byTsr1 = desc->td0.tsr1;
    913
    914		/* Only the status of first TD in the chain is correct */
    915		if (desc->td1.tcr & TCR_STP) {
    916			if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
    917				if (!(byTsr1 & TSR1_TERR)) {
    918					if (byTsr0 != 0) {
    919						pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
    920							 (int)idx, byTsr1,
    921							 byTsr0);
    922					}
    923				} else {
    924					pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
    925						 (int)idx, byTsr1, byTsr0);
    926				}
    927			}
    928
    929			if (byTsr1 & TSR1_TERR) {
    930				if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
    931					pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
    932						 (int)idx, byTsr1, byTsr0);
    933				}
    934			}
    935
    936			vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
    937
    938			device_free_tx_buf(priv, desc);
    939			priv->iTDUsed[idx]--;
    940		}
    941	}
    942
    943	priv->apTailTD[idx] = desc;
    944
    945	return works;
    946}
    947
    948static void device_error(struct vnt_private *priv, unsigned short status)
    949{
    950	if (status & ISR_FETALERR) {
    951		dev_err(&priv->pcid->dev, "Hardware fatal error\n");
    952
    953		MACbShutdown(priv);
    954		return;
    955	}
    956}
    957
    958static void device_free_tx_buf(struct vnt_private *priv,
    959			       struct vnt_tx_desc *desc)
    960{
    961	struct vnt_td_info *td_info = desc->td_info;
    962	struct sk_buff *skb = td_info->skb;
    963
    964	if (skb)
    965		ieee80211_tx_status_irqsafe(priv->hw, skb);
    966
    967	td_info->skb = NULL;
    968	td_info->flags = 0;
    969}
    970
    971static void vnt_check_bb_vga(struct vnt_private *priv)
    972{
    973	long dbm;
    974	int i;
    975
    976	if (!priv->bUpdateBBVGA)
    977		return;
    978
    979	if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
    980		return;
    981
    982	if (!(priv->vif->bss_conf.assoc && priv->current_rssi))
    983		return;
    984
    985	RFvRSSITodBm(priv, (u8)priv->current_rssi, &dbm);
    986
    987	for (i = 0; i < BB_VGA_LEVEL; i++) {
    988		if (dbm < priv->dbm_threshold[i]) {
    989			priv->byBBVGANew = priv->abyBBVGA[i];
    990			break;
    991		}
    992	}
    993
    994	if (priv->byBBVGANew == priv->byBBVGACurrent) {
    995		priv->uBBVGADiffCount = 1;
    996		return;
    997	}
    998
    999	priv->uBBVGADiffCount++;
   1000
   1001	if (priv->uBBVGADiffCount == 1) {
   1002		/* first VGA diff gain */
   1003		bb_set_vga_gain_offset(priv, priv->byBBVGANew);
   1004
   1005		dev_dbg(&priv->pcid->dev,
   1006			"First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
   1007			(int)dbm, priv->byBBVGANew,
   1008			priv->byBBVGACurrent,
   1009			(int)priv->uBBVGADiffCount);
   1010	}
   1011
   1012	if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
   1013		dev_dbg(&priv->pcid->dev,
   1014			"RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
   1015			(int)dbm, priv->byBBVGANew,
   1016			priv->byBBVGACurrent,
   1017			(int)priv->uBBVGADiffCount);
   1018
   1019		bb_set_vga_gain_offset(priv, priv->byBBVGANew);
   1020	}
   1021}
   1022
   1023static void vnt_interrupt_process(struct vnt_private *priv)
   1024{
   1025	struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
   1026	int             max_count = 0;
   1027	u32 mib_counter;
   1028	u32 isr;
   1029	unsigned long flags;
   1030
   1031	isr = ioread32(priv->port_offset + MAC_REG_ISR);
   1032
   1033	if (isr == 0)
   1034		return;
   1035
   1036	if (isr == 0xffffffff) {
   1037		pr_debug("isr = 0xffff\n");
   1038		return;
   1039	}
   1040
   1041	spin_lock_irqsave(&priv->lock, flags);
   1042
   1043	/* Read low level stats */
   1044	mib_counter = ioread32(priv->port_offset + MAC_REG_MIBCNTR);
   1045
   1046	low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
   1047	low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
   1048	low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
   1049	low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
   1050
   1051	/*
   1052	 * TBD....
   1053	 * Must do this after doing rx/tx, cause ISR bit is slow
   1054	 * than RD/TD write back
   1055	 * update ISR counter
   1056	 */
   1057	while (isr && priv->vif) {
   1058		MACvWriteISR(priv->port_offset, isr);
   1059
   1060		if (isr & ISR_FETALERR) {
   1061			pr_debug(" ISR_FETALERR\n");
   1062			iowrite8(0, priv->port_offset + MAC_REG_SOFTPWRCTL);
   1063			VNSvOutPortW(priv->port_offset +
   1064				     MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
   1065			device_error(priv, isr);
   1066		}
   1067
   1068		if (isr & ISR_TBTT) {
   1069			if (priv->op_mode != NL80211_IFTYPE_ADHOC)
   1070				vnt_check_bb_vga(priv);
   1071
   1072			priv->bBeaconSent = false;
   1073			if (priv->bEnablePSMode)
   1074				PSbIsNextTBTTWakeUp((void *)priv);
   1075
   1076			if ((priv->op_mode == NL80211_IFTYPE_AP ||
   1077			    priv->op_mode == NL80211_IFTYPE_ADHOC) &&
   1078			    priv->vif->bss_conf.enable_beacon)
   1079				MACvOneShotTimer1MicroSec(priv,
   1080							  (priv->vif->bss_conf.beacon_int -
   1081							   MAKE_BEACON_RESERVED) << 10);
   1082
   1083			/* TODO: adhoc PS mode */
   1084		}
   1085
   1086		if (isr & ISR_BNTX) {
   1087			if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
   1088				priv->bIsBeaconBufReadySet = false;
   1089				priv->cbBeaconBufReadySetCnt = 0;
   1090			}
   1091
   1092			priv->bBeaconSent = true;
   1093		}
   1094
   1095		if (isr & ISR_RXDMA0)
   1096			max_count += device_rx_srv(priv, TYPE_RXDMA0);
   1097
   1098		if (isr & ISR_RXDMA1)
   1099			max_count += device_rx_srv(priv, TYPE_RXDMA1);
   1100
   1101		if (isr & ISR_TXDMA0)
   1102			max_count += device_tx_srv(priv, TYPE_TXDMA0);
   1103
   1104		if (isr & ISR_AC0DMA)
   1105			max_count += device_tx_srv(priv, TYPE_AC0DMA);
   1106
   1107		if (isr & ISR_SOFTTIMER1) {
   1108			if (priv->vif->bss_conf.enable_beacon)
   1109				vnt_beacon_make(priv, priv->vif);
   1110		}
   1111
   1112		/* If both buffers available wake the queue */
   1113		if (AVAIL_TD(priv, TYPE_TXDMA0) &&
   1114		    AVAIL_TD(priv, TYPE_AC0DMA) &&
   1115		    ieee80211_queue_stopped(priv->hw, 0))
   1116			ieee80211_wake_queues(priv->hw);
   1117
   1118		isr = ioread32(priv->port_offset + MAC_REG_ISR);
   1119
   1120		MACvReceive0(priv->port_offset);
   1121		MACvReceive1(priv->port_offset);
   1122
   1123		if (max_count > priv->opts.int_works)
   1124			break;
   1125	}
   1126
   1127	spin_unlock_irqrestore(&priv->lock, flags);
   1128}
   1129
   1130static void vnt_interrupt_work(struct work_struct *work)
   1131{
   1132	struct vnt_private *priv =
   1133		container_of(work, struct vnt_private, interrupt_work);
   1134
   1135	if (priv->vif)
   1136		vnt_interrupt_process(priv);
   1137
   1138	MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
   1139}
   1140
   1141static irqreturn_t vnt_interrupt(int irq,  void *arg)
   1142{
   1143	struct vnt_private *priv = arg;
   1144
   1145	schedule_work(&priv->interrupt_work);
   1146
   1147	MACvIntDisable(priv->port_offset);
   1148
   1149	return IRQ_HANDLED;
   1150}
   1151
   1152static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
   1153{
   1154	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
   1155	struct vnt_tx_desc *head_td;
   1156	u32 dma_idx;
   1157	unsigned long flags;
   1158
   1159	spin_lock_irqsave(&priv->lock, flags);
   1160
   1161	if (ieee80211_is_data(hdr->frame_control))
   1162		dma_idx = TYPE_AC0DMA;
   1163	else
   1164		dma_idx = TYPE_TXDMA0;
   1165
   1166	if (AVAIL_TD(priv, dma_idx) < 1) {
   1167		spin_unlock_irqrestore(&priv->lock, flags);
   1168		ieee80211_stop_queues(priv->hw);
   1169		return -ENOMEM;
   1170	}
   1171
   1172	head_td = priv->apCurrTD[dma_idx];
   1173
   1174	head_td->td1.tcr = 0;
   1175
   1176	head_td->td_info->skb = skb;
   1177
   1178	if (dma_idx == TYPE_AC0DMA)
   1179		head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
   1180
   1181	priv->apCurrTD[dma_idx] = head_td->next;
   1182
   1183	spin_unlock_irqrestore(&priv->lock, flags);
   1184
   1185	vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
   1186
   1187	spin_lock_irqsave(&priv->lock, flags);
   1188
   1189	priv->bPWBitOn = false;
   1190
   1191	/* Set TSR1 & ReqCount in TxDescHead */
   1192	head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
   1193	head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
   1194
   1195	head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
   1196
   1197	/* Poll Transmit the adapter */
   1198	wmb();
   1199	head_td->td0.owner = OWNED_BY_NIC;
   1200	wmb(); /* second memory barrier */
   1201
   1202	if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
   1203		MACvTransmitAC0(priv->port_offset);
   1204	else
   1205		MACvTransmit0(priv->port_offset);
   1206
   1207	priv->iTDUsed[dma_idx]++;
   1208
   1209	spin_unlock_irqrestore(&priv->lock, flags);
   1210
   1211	return 0;
   1212}
   1213
   1214static void vnt_tx_80211(struct ieee80211_hw *hw,
   1215			 struct ieee80211_tx_control *control,
   1216			 struct sk_buff *skb)
   1217{
   1218	struct vnt_private *priv = hw->priv;
   1219
   1220	if (vnt_tx_packet(priv, skb))
   1221		ieee80211_free_txskb(hw, skb);
   1222}
   1223
   1224static int vnt_start(struct ieee80211_hw *hw)
   1225{
   1226	struct vnt_private *priv = hw->priv;
   1227	int ret;
   1228
   1229	priv->rx_buf_sz = PKT_BUF_SZ;
   1230	if (!device_init_rings(priv))
   1231		return -ENOMEM;
   1232
   1233	ret = request_irq(priv->pcid->irq, vnt_interrupt,
   1234			  IRQF_SHARED, "vt6655", priv);
   1235	if (ret) {
   1236		dev_dbg(&priv->pcid->dev, "failed to start irq\n");
   1237		goto err_free_rings;
   1238	}
   1239
   1240	dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
   1241	ret = device_init_rd0_ring(priv);
   1242	if (ret)
   1243		goto err_free_irq;
   1244	ret = device_init_rd1_ring(priv);
   1245	if (ret)
   1246		goto err_free_rd0_ring;
   1247	ret = device_init_td0_ring(priv);
   1248	if (ret)
   1249		goto err_free_rd1_ring;
   1250	ret = device_init_td1_ring(priv);
   1251	if (ret)
   1252		goto err_free_td0_ring;
   1253
   1254	device_init_registers(priv);
   1255
   1256	dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
   1257	MACvIntEnable(priv->port_offset, IMR_MASK_VALUE);
   1258
   1259	ieee80211_wake_queues(hw);
   1260
   1261	return 0;
   1262
   1263err_free_td0_ring:
   1264	device_free_td0_ring(priv);
   1265err_free_rd1_ring:
   1266	device_free_rd1_ring(priv);
   1267err_free_rd0_ring:
   1268	device_free_rd0_ring(priv);
   1269err_free_irq:
   1270	free_irq(priv->pcid->irq, priv);
   1271err_free_rings:
   1272	device_free_rings(priv);
   1273	return ret;
   1274}
   1275
   1276static void vnt_stop(struct ieee80211_hw *hw)
   1277{
   1278	struct vnt_private *priv = hw->priv;
   1279
   1280	ieee80211_stop_queues(hw);
   1281
   1282	cancel_work_sync(&priv->interrupt_work);
   1283
   1284	MACbShutdown(priv);
   1285	MACbSoftwareReset(priv);
   1286	CARDbRadioPowerOff(priv);
   1287
   1288	device_free_td0_ring(priv);
   1289	device_free_td1_ring(priv);
   1290	device_free_rd0_ring(priv);
   1291	device_free_rd1_ring(priv);
   1292	device_free_rings(priv);
   1293
   1294	free_irq(priv->pcid->irq, priv);
   1295}
   1296
   1297static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
   1298{
   1299	struct vnt_private *priv = hw->priv;
   1300
   1301	priv->vif = vif;
   1302
   1303	switch (vif->type) {
   1304	case NL80211_IFTYPE_STATION:
   1305		break;
   1306	case NL80211_IFTYPE_ADHOC:
   1307		MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
   1308
   1309		MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
   1310
   1311		break;
   1312	case NL80211_IFTYPE_AP:
   1313		MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST);
   1314
   1315		MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
   1316
   1317		break;
   1318	default:
   1319		return -EOPNOTSUPP;
   1320	}
   1321
   1322	priv->op_mode = vif->type;
   1323
   1324	return 0;
   1325}
   1326
   1327static void vnt_remove_interface(struct ieee80211_hw *hw,
   1328				 struct ieee80211_vif *vif)
   1329{
   1330	struct vnt_private *priv = hw->priv;
   1331
   1332	switch (vif->type) {
   1333	case NL80211_IFTYPE_STATION:
   1334		break;
   1335	case NL80211_IFTYPE_ADHOC:
   1336		MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
   1337		MACvRegBitsOff(priv->port_offset,
   1338			       MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
   1339		MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
   1340		break;
   1341	case NL80211_IFTYPE_AP:
   1342		MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX);
   1343		MACvRegBitsOff(priv->port_offset,
   1344			       MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
   1345		MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP);
   1346		break;
   1347	default:
   1348		break;
   1349	}
   1350
   1351	priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
   1352}
   1353
   1354static int vnt_config(struct ieee80211_hw *hw, u32 changed)
   1355{
   1356	struct vnt_private *priv = hw->priv;
   1357	struct ieee80211_conf *conf = &hw->conf;
   1358	u8 bb_type;
   1359
   1360	if (changed & IEEE80211_CONF_CHANGE_PS) {
   1361		if (conf->flags & IEEE80211_CONF_PS)
   1362			PSvEnablePowerSaving(priv, conf->listen_interval);
   1363		else
   1364			PSvDisablePowerSaving(priv);
   1365	}
   1366
   1367	if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
   1368	    (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
   1369		set_channel(priv, conf->chandef.chan);
   1370
   1371		if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
   1372			bb_type = BB_TYPE_11A;
   1373		else
   1374			bb_type = BB_TYPE_11G;
   1375
   1376		if (priv->byBBType != bb_type) {
   1377			priv->byBBType = bb_type;
   1378
   1379			CARDbSetPhyParameter(priv, priv->byBBType);
   1380		}
   1381	}
   1382
   1383	if (changed & IEEE80211_CONF_CHANGE_POWER) {
   1384		if (priv->byBBType == BB_TYPE_11B)
   1385			priv->wCurrentRate = RATE_1M;
   1386		else
   1387			priv->wCurrentRate = RATE_54M;
   1388
   1389		RFbSetPower(priv, priv->wCurrentRate,
   1390			    conf->chandef.chan->hw_value);
   1391	}
   1392
   1393	return 0;
   1394}
   1395
   1396static void vnt_bss_info_changed(struct ieee80211_hw *hw,
   1397				 struct ieee80211_vif *vif,
   1398				 struct ieee80211_bss_conf *conf, u32 changed)
   1399{
   1400	struct vnt_private *priv = hw->priv;
   1401
   1402	priv->current_aid = conf->aid;
   1403
   1404	if (changed & BSS_CHANGED_BSSID && conf->bssid) {
   1405		unsigned long flags;
   1406
   1407		spin_lock_irqsave(&priv->lock, flags);
   1408
   1409		MACvWriteBSSIDAddress(priv->port_offset, conf->bssid);
   1410
   1411		spin_unlock_irqrestore(&priv->lock, flags);
   1412	}
   1413
   1414	if (changed & BSS_CHANGED_BASIC_RATES) {
   1415		priv->basic_rates = conf->basic_rates;
   1416
   1417		CARDvUpdateBasicTopRate(priv);
   1418
   1419		dev_dbg(&priv->pcid->dev,
   1420			"basic rates %x\n", conf->basic_rates);
   1421	}
   1422
   1423	if (changed & BSS_CHANGED_ERP_PREAMBLE) {
   1424		if (conf->use_short_preamble) {
   1425			MACvEnableBarkerPreambleMd(priv->port_offset);
   1426			priv->preamble_type = true;
   1427		} else {
   1428			MACvDisableBarkerPreambleMd(priv->port_offset);
   1429			priv->preamble_type = false;
   1430		}
   1431	}
   1432
   1433	if (changed & BSS_CHANGED_ERP_CTS_PROT) {
   1434		if (conf->use_cts_prot)
   1435			MACvEnableProtectMD(priv->port_offset);
   1436		else
   1437			MACvDisableProtectMD(priv->port_offset);
   1438	}
   1439
   1440	if (changed & BSS_CHANGED_ERP_SLOT) {
   1441		if (conf->use_short_slot)
   1442			priv->short_slot_time = true;
   1443		else
   1444			priv->short_slot_time = false;
   1445
   1446		CARDbSetPhyParameter(priv, priv->byBBType);
   1447		bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
   1448	}
   1449
   1450	if (changed & BSS_CHANGED_TXPOWER)
   1451		RFbSetPower(priv, priv->wCurrentRate,
   1452			    conf->chandef.chan->hw_value);
   1453
   1454	if (changed & BSS_CHANGED_BEACON_ENABLED) {
   1455		dev_dbg(&priv->pcid->dev,
   1456			"Beacon enable %d\n", conf->enable_beacon);
   1457
   1458		if (conf->enable_beacon) {
   1459			vnt_beacon_enable(priv, vif, conf);
   1460
   1461			MACvRegBitsOn(priv->port_offset, MAC_REG_TCR,
   1462				      TCR_AUTOBCNTX);
   1463		} else {
   1464			MACvRegBitsOff(priv->port_offset, MAC_REG_TCR,
   1465				       TCR_AUTOBCNTX);
   1466		}
   1467	}
   1468
   1469	if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
   1470	    priv->op_mode != NL80211_IFTYPE_AP) {
   1471		if (conf->assoc && conf->beacon_rate) {
   1472			CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
   1473				       conf->sync_tsf);
   1474
   1475			CARDbSetBeaconPeriod(priv, conf->beacon_int);
   1476
   1477			CARDvSetFirstNextTBTT(priv, conf->beacon_int);
   1478		} else {
   1479			iowrite8(TFTCTL_TSFCNTRST, priv->port_offset + MAC_REG_TFTCTL);
   1480			iowrite8(TFTCTL_TSFCNTREN, priv->port_offset + MAC_REG_TFTCTL);
   1481		}
   1482	}
   1483}
   1484
   1485static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
   1486				 struct netdev_hw_addr_list *mc_list)
   1487{
   1488	struct vnt_private *priv = hw->priv;
   1489	struct netdev_hw_addr *ha;
   1490	u64 mc_filter = 0;
   1491	u32 bit_nr = 0;
   1492
   1493	netdev_hw_addr_list_for_each(ha, mc_list) {
   1494		bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
   1495
   1496		mc_filter |= 1ULL << (bit_nr & 0x3f);
   1497	}
   1498
   1499	priv->mc_list_count = mc_list->count;
   1500
   1501	return mc_filter;
   1502}
   1503
   1504static void vnt_configure(struct ieee80211_hw *hw,
   1505			  unsigned int changed_flags,
   1506			  unsigned int *total_flags, u64 multicast)
   1507{
   1508	struct vnt_private *priv = hw->priv;
   1509	u8 rx_mode = 0;
   1510
   1511	*total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
   1512
   1513	rx_mode = ioread8(priv->port_offset + MAC_REG_RCR);
   1514
   1515	dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
   1516
   1517	if (changed_flags & FIF_ALLMULTI) {
   1518		if (*total_flags & FIF_ALLMULTI) {
   1519			unsigned long flags;
   1520
   1521			spin_lock_irqsave(&priv->lock, flags);
   1522
   1523			if (priv->mc_list_count > 2) {
   1524				MACvSelectPage1(priv->port_offset);
   1525
   1526				VNSvOutPortD(priv->port_offset +
   1527					     MAC_REG_MAR0, 0xffffffff);
   1528				VNSvOutPortD(priv->port_offset +
   1529					    MAC_REG_MAR0 + 4, 0xffffffff);
   1530
   1531				MACvSelectPage0(priv->port_offset);
   1532			} else {
   1533				MACvSelectPage1(priv->port_offset);
   1534
   1535				VNSvOutPortD(priv->port_offset +
   1536					     MAC_REG_MAR0, (u32)multicast);
   1537				VNSvOutPortD(priv->port_offset +
   1538					     MAC_REG_MAR0 + 4,
   1539					     (u32)(multicast >> 32));
   1540
   1541				MACvSelectPage0(priv->port_offset);
   1542			}
   1543
   1544			spin_unlock_irqrestore(&priv->lock, flags);
   1545
   1546			rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
   1547		} else {
   1548			rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
   1549		}
   1550	}
   1551
   1552	if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
   1553		rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
   1554
   1555		if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
   1556			rx_mode &= ~RCR_BSSID;
   1557		else
   1558			rx_mode |= RCR_BSSID;
   1559	}
   1560
   1561	iowrite8(rx_mode, priv->port_offset + MAC_REG_RCR);
   1562
   1563	dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
   1564}
   1565
   1566static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
   1567		       struct ieee80211_vif *vif, struct ieee80211_sta *sta,
   1568		       struct ieee80211_key_conf *key)
   1569{
   1570	struct vnt_private *priv = hw->priv;
   1571
   1572	switch (cmd) {
   1573	case SET_KEY:
   1574		if (vnt_set_keys(hw, sta, vif, key))
   1575			return -EOPNOTSUPP;
   1576		break;
   1577	case DISABLE_KEY:
   1578		if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
   1579			clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
   1580		break;
   1581	default:
   1582		break;
   1583	}
   1584
   1585	return 0;
   1586}
   1587
   1588static int vnt_get_stats(struct ieee80211_hw *hw,
   1589			 struct ieee80211_low_level_stats *stats)
   1590{
   1591	struct vnt_private *priv = hw->priv;
   1592
   1593	memcpy(stats, &priv->low_stats, sizeof(*stats));
   1594
   1595	return 0;
   1596}
   1597
   1598static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
   1599{
   1600	struct vnt_private *priv = hw->priv;
   1601	u64 tsf;
   1602
   1603	tsf = vt6655_get_current_tsf(priv);
   1604
   1605	return tsf;
   1606}
   1607
   1608static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
   1609			u64 tsf)
   1610{
   1611	struct vnt_private *priv = hw->priv;
   1612
   1613	CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
   1614}
   1615
   1616static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
   1617{
   1618	struct vnt_private *priv = hw->priv;
   1619
   1620	/* reset TSF counter */
   1621	iowrite8(TFTCTL_TSFCNTRST, priv->port_offset + MAC_REG_TFTCTL);
   1622}
   1623
   1624static const struct ieee80211_ops vnt_mac_ops = {
   1625	.tx			= vnt_tx_80211,
   1626	.start			= vnt_start,
   1627	.stop			= vnt_stop,
   1628	.add_interface		= vnt_add_interface,
   1629	.remove_interface	= vnt_remove_interface,
   1630	.config			= vnt_config,
   1631	.bss_info_changed	= vnt_bss_info_changed,
   1632	.prepare_multicast	= vnt_prepare_multicast,
   1633	.configure_filter	= vnt_configure,
   1634	.set_key		= vnt_set_key,
   1635	.get_stats		= vnt_get_stats,
   1636	.get_tsf		= vnt_get_tsf,
   1637	.set_tsf		= vnt_set_tsf,
   1638	.reset_tsf		= vnt_reset_tsf,
   1639};
   1640
   1641static int vnt_init(struct vnt_private *priv)
   1642{
   1643	SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
   1644
   1645	vnt_init_bands(priv);
   1646
   1647	if (ieee80211_register_hw(priv->hw))
   1648		return -ENODEV;
   1649
   1650	priv->mac_hw = true;
   1651
   1652	CARDbRadioPowerOff(priv);
   1653
   1654	return 0;
   1655}
   1656
   1657static int
   1658vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
   1659{
   1660	struct vnt_private *priv;
   1661	struct ieee80211_hw *hw;
   1662	struct wiphy *wiphy;
   1663	int         rc;
   1664
   1665	dev_notice(&pcid->dev,
   1666		   "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
   1667
   1668	dev_notice(&pcid->dev,
   1669		   "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
   1670
   1671	hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
   1672	if (!hw) {
   1673		dev_err(&pcid->dev, "could not register ieee80211_hw\n");
   1674		return -ENOMEM;
   1675	}
   1676
   1677	priv = hw->priv;
   1678	priv->pcid = pcid;
   1679
   1680	spin_lock_init(&priv->lock);
   1681
   1682	priv->hw = hw;
   1683
   1684	SET_IEEE80211_DEV(priv->hw, &pcid->dev);
   1685
   1686	if (pci_enable_device(pcid)) {
   1687		device_free_info(priv);
   1688		return -ENODEV;
   1689	}
   1690
   1691	dev_dbg(&pcid->dev,
   1692		"Before get pci_info memaddr is %x\n", priv->memaddr);
   1693
   1694	pci_set_master(pcid);
   1695
   1696	priv->memaddr = pci_resource_start(pcid, 0);
   1697	priv->ioaddr = pci_resource_start(pcid, 1);
   1698	priv->port_offset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
   1699				   256);
   1700	if (!priv->port_offset) {
   1701		dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
   1702		device_free_info(priv);
   1703		return -ENODEV;
   1704	}
   1705
   1706	rc = pci_request_regions(pcid, DEVICE_NAME);
   1707	if (rc) {
   1708		dev_err(&pcid->dev, ": Failed to find PCI device\n");
   1709		device_free_info(priv);
   1710		return -ENODEV;
   1711	}
   1712
   1713	if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
   1714		dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
   1715		device_free_info(priv);
   1716		return -ENODEV;
   1717	}
   1718
   1719	INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
   1720
   1721	/* do reset */
   1722	if (!MACbSoftwareReset(priv)) {
   1723		dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
   1724		device_free_info(priv);
   1725		return -ENODEV;
   1726	}
   1727	/* initial to reload eeprom */
   1728	MACvInitialize(priv);
   1729	MACvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr);
   1730
   1731	/* Get RFType */
   1732	priv->byRFType = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE);
   1733	priv->byRFType &= RF_MASK;
   1734
   1735	dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
   1736
   1737	device_get_options(priv);
   1738	device_set_options(priv);
   1739
   1740	wiphy = priv->hw->wiphy;
   1741
   1742	wiphy->frag_threshold = FRAG_THRESH_DEF;
   1743	wiphy->rts_threshold = RTS_THRESH_DEF;
   1744	wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
   1745		BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
   1746
   1747	ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
   1748	ieee80211_hw_set(priv->hw, SIGNAL_DBM);
   1749	ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
   1750	ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
   1751	ieee80211_hw_set(priv->hw, SUPPORTS_PS);
   1752
   1753	priv->hw->max_signal = 100;
   1754
   1755	if (vnt_init(priv)) {
   1756		device_free_info(priv);
   1757		return -ENODEV;
   1758	}
   1759
   1760	device_print_info(priv);
   1761	pci_set_drvdata(pcid, priv);
   1762
   1763	return 0;
   1764}
   1765
   1766/*------------------------------------------------------------------*/
   1767
   1768static int __maybe_unused vt6655_suspend(struct device *dev_d)
   1769{
   1770	struct vnt_private *priv = dev_get_drvdata(dev_d);
   1771	unsigned long flags;
   1772
   1773	spin_lock_irqsave(&priv->lock, flags);
   1774
   1775	MACbShutdown(priv);
   1776
   1777	spin_unlock_irqrestore(&priv->lock, flags);
   1778
   1779	return 0;
   1780}
   1781
   1782static int __maybe_unused vt6655_resume(struct device *dev_d)
   1783{
   1784	device_wakeup_disable(dev_d);
   1785
   1786	return 0;
   1787}
   1788
   1789MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
   1790
   1791static SIMPLE_DEV_PM_OPS(vt6655_pm_ops, vt6655_suspend, vt6655_resume);
   1792
   1793static struct pci_driver device_driver = {
   1794	.name = DEVICE_NAME,
   1795	.id_table = vt6655_pci_id_table,
   1796	.probe = vt6655_probe,
   1797	.remove = vt6655_remove,
   1798	.driver.pm = &vt6655_pm_ops,
   1799};
   1800
   1801module_pci_driver(device_driver);