cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (4388B)


      1# SPDX-License-Identifier: GPL-2.0-only
      2config INTEL_POWERCLAMP
      3	tristate "Intel PowerClamp idle injection driver"
      4	depends on X86
      5	depends on CPU_SUP_INTEL
      6	help
      7	  Enable this to enable Intel PowerClamp idle injection driver. This
      8	  enforce idle time which results in more package C-state residency. The
      9	  user interface is exposed via generic thermal framework.
     10
     11config X86_THERMAL_VECTOR
     12	def_bool y
     13	depends on X86 && CPU_SUP_INTEL && X86_LOCAL_APIC
     14
     15config X86_PKG_TEMP_THERMAL
     16	tristate "X86 package temperature thermal driver"
     17	depends on X86_THERMAL_VECTOR
     18	select THERMAL_GOV_USER_SPACE
     19	select THERMAL_WRITABLE_TRIPS
     20	default m
     21	help
     22	  Enable this to register CPU digital sensor for package temperature as
     23	  thermal zone. Each package will have its own thermal zone. There are
     24	  two trip points which can be set by user to get notifications via thermal
     25	  notification methods.
     26
     27config INTEL_SOC_DTS_IOSF_CORE
     28	tristate
     29	depends on X86 && PCI
     30	select IOSF_MBI
     31	help
     32	  This is becoming a common feature for Intel SoCs to expose the additional
     33	  digital temperature sensors (DTSs) using side band interface (IOSF). This
     34	  implements the common set of helper functions to register, get temperature
     35	  and get/set thresholds on DTSs.
     36
     37config INTEL_SOC_DTS_THERMAL
     38	tristate "Intel SoCs DTS thermal driver"
     39	depends on X86 && PCI && ACPI
     40	select INTEL_SOC_DTS_IOSF_CORE
     41	select THERMAL_WRITABLE_TRIPS
     42	help
     43	  Enable this to register Intel SoCs (e.g. Bay Trail) platform digital
     44	  temperature sensor (DTS). These SoCs have two additional DTSs in
     45	  addition to DTSs on CPU cores. Each DTS will be registered as a
     46	  thermal zone. There are two trip points. One of the trip point can
     47	  be set by user mode programs to get notifications via Linux thermal
     48	  notification methods.The other trip is a critical trip point, which
     49	  was set by the driver based on the TJ MAX temperature.
     50
     51config INTEL_QUARK_DTS_THERMAL
     52	tristate "Intel Quark DTS thermal driver"
     53	depends on X86_INTEL_QUARK
     54	help
     55	  Enable this to register Intel Quark SoC (e.g. X1000) platform digital
     56	  temperature sensor (DTS). For X1000 SoC, it has one on-die DTS.
     57	  The DTS will be registered as a thermal zone. There are two trip points:
     58	  hot & critical. The critical trip point default value is set by
     59	  underlying BIOS/Firmware.
     60
     61menu "ACPI INT340X thermal drivers"
     62source "drivers/thermal/intel/int340x_thermal/Kconfig"
     63endmenu
     64
     65config INTEL_BXT_PMIC_THERMAL
     66	tristate "Intel Broxton PMIC thermal driver"
     67	depends on X86 && INTEL_SOC_PMIC_BXTWC && REGMAP
     68	help
     69	  Select this driver for Intel Broxton PMIC with ADC channels monitoring
     70	  system temperature measurements and alerts.
     71	  This driver is used for monitoring the ADC channels of PMIC and handles
     72	  the alert trip point interrupts and notifies the thermal framework with
     73	  the trip point and temperature details of the zone.
     74
     75config INTEL_PCH_THERMAL
     76	tristate "Intel PCH Thermal Reporting Driver"
     77	depends on X86 && PCI
     78	help
     79	  Enable this to support thermal reporting on certain intel PCHs.
     80	  Thermal reporting device will provide temperature reading,
     81	  programmable trip points and other information.
     82
     83config INTEL_TCC_COOLING
     84	tristate "Intel TCC offset cooling Driver"
     85	depends on X86
     86	help
     87	  Enable this to support system cooling by adjusting the effective TCC
     88	  activation temperature via the TCC Offset register, which is widely
     89	  supported on modern Intel platforms.
     90	  Note that, on different platforms, the behavior might be different
     91	  on how fast the setting takes effect, and how much the CPU frequency
     92	  is reduced.
     93
     94config INTEL_MENLOW
     95	tristate "Thermal Management driver for Intel menlow platform"
     96	depends on ACPI_THERMAL
     97	help
     98	  ACPI thermal management enhancement driver on
     99	  Intel Menlow platform.
    100
    101	  If unsure, say N.
    102
    103config INTEL_HFI_THERMAL
    104	bool "Intel Hardware Feedback Interface"
    105	depends on NET
    106	depends on CPU_SUP_INTEL
    107	depends on X86_THERMAL_VECTOR
    108	select THERMAL_NETLINK
    109	help
    110	  Select this option to enable the Hardware Feedback Interface. If
    111	  selected, hardware provides guidance to the operating system on
    112	  the performance and energy efficiency capabilities of each CPU.
    113	  These capabilities may change as a result of changes in the operating
    114	  conditions of the system such power and thermal limits. If selected,
    115	  the kernel relays updates in CPUs' capabilities to userspace.