cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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8250_mid.c (9535B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
      4 *
      5 * Copyright (C) 2015 Intel Corporation
      6 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
      7 */
      8
      9#include <linux/bitops.h>
     10#include <linux/module.h>
     11#include <linux/pci.h>
     12#include <linux/rational.h>
     13
     14#include <linux/dma/hsu.h>
     15#include <linux/8250_pci.h>
     16
     17#include "8250.h"
     18
     19#define PCI_DEVICE_ID_INTEL_PNW_UART1	0x081b
     20#define PCI_DEVICE_ID_INTEL_PNW_UART2	0x081c
     21#define PCI_DEVICE_ID_INTEL_PNW_UART3	0x081d
     22#define PCI_DEVICE_ID_INTEL_TNG_UART	0x1191
     23#define PCI_DEVICE_ID_INTEL_CDF_UART	0x18d8
     24#define PCI_DEVICE_ID_INTEL_DNV_UART	0x19d8
     25
     26/* Intel MID Specific registers */
     27#define INTEL_MID_UART_FISR		0x08
     28#define INTEL_MID_UART_PS		0x30
     29#define INTEL_MID_UART_MUL		0x34
     30#define INTEL_MID_UART_DIV		0x38
     31
     32struct mid8250;
     33
     34struct mid8250_board {
     35	unsigned int flags;
     36	unsigned long freq;
     37	unsigned int base_baud;
     38	int (*setup)(struct mid8250 *, struct uart_port *p);
     39	void (*exit)(struct mid8250 *);
     40};
     41
     42struct mid8250 {
     43	int line;
     44	int dma_index;
     45	struct pci_dev *dma_dev;
     46	struct uart_8250_dma dma;
     47	struct mid8250_board *board;
     48	struct hsu_dma_chip dma_chip;
     49};
     50
     51/*****************************************************************************/
     52
     53static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
     54{
     55	struct pci_dev *pdev = to_pci_dev(p->dev);
     56
     57	switch (pdev->device) {
     58	case PCI_DEVICE_ID_INTEL_PNW_UART1:
     59		mid->dma_index = 0;
     60		break;
     61	case PCI_DEVICE_ID_INTEL_PNW_UART2:
     62		mid->dma_index = 1;
     63		break;
     64	case PCI_DEVICE_ID_INTEL_PNW_UART3:
     65		mid->dma_index = 2;
     66		break;
     67	default:
     68		return -EINVAL;
     69	}
     70
     71	mid->dma_dev = pci_get_slot(pdev->bus,
     72				    PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
     73	return 0;
     74}
     75
     76static void pnw_exit(struct mid8250 *mid)
     77{
     78	pci_dev_put(mid->dma_dev);
     79}
     80
     81static int tng_handle_irq(struct uart_port *p)
     82{
     83	struct mid8250 *mid = p->private_data;
     84	struct uart_8250_port *up = up_to_u8250p(p);
     85	struct hsu_dma_chip *chip;
     86	u32 status;
     87	int ret = 0;
     88	int err;
     89
     90	chip = pci_get_drvdata(mid->dma_dev);
     91
     92	/* Rx DMA */
     93	err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
     94	if (err > 0) {
     95		serial8250_rx_dma_flush(up);
     96		ret |= 1;
     97	} else if (err == 0)
     98		ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
     99
    100	/* Tx DMA */
    101	err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
    102	if (err > 0)
    103		ret |= 1;
    104	else if (err == 0)
    105		ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
    106
    107	/* UART */
    108	ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
    109	return IRQ_RETVAL(ret);
    110}
    111
    112static int tng_setup(struct mid8250 *mid, struct uart_port *p)
    113{
    114	struct pci_dev *pdev = to_pci_dev(p->dev);
    115	int index = PCI_FUNC(pdev->devfn);
    116
    117	/*
    118	 * Device 0000:00:04.0 is not a real HSU port. It provides a global
    119	 * register set for all HSU ports, although it has the same PCI ID.
    120	 * Skip it here.
    121	 */
    122	if (index-- == 0)
    123		return -ENODEV;
    124
    125	mid->dma_index = index;
    126	mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
    127
    128	p->handle_irq = tng_handle_irq;
    129	return 0;
    130}
    131
    132static void tng_exit(struct mid8250 *mid)
    133{
    134	pci_dev_put(mid->dma_dev);
    135}
    136
    137static int dnv_handle_irq(struct uart_port *p)
    138{
    139	struct mid8250 *mid = p->private_data;
    140	struct uart_8250_port *up = up_to_u8250p(p);
    141	unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
    142	u32 status;
    143	int ret = 0;
    144	int err;
    145
    146	if (fisr & BIT(2)) {
    147		err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
    148		if (err > 0) {
    149			serial8250_rx_dma_flush(up);
    150			ret |= 1;
    151		} else if (err == 0)
    152			ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
    153	}
    154	if (fisr & BIT(1)) {
    155		err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
    156		if (err > 0)
    157			ret |= 1;
    158		else if (err == 0)
    159			ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
    160	}
    161	if (fisr & BIT(0))
    162		ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
    163	return IRQ_RETVAL(ret);
    164}
    165
    166#define DNV_DMA_CHAN_OFFSET 0x80
    167
    168static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
    169{
    170	struct hsu_dma_chip *chip = &mid->dma_chip;
    171	struct pci_dev *pdev = to_pci_dev(p->dev);
    172	unsigned int bar = FL_GET_BASE(mid->board->flags);
    173	int ret;
    174
    175	pci_set_master(pdev);
    176
    177	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
    178	if (ret < 0)
    179		return ret;
    180
    181	p->irq = pci_irq_vector(pdev, 0);
    182
    183	chip->dev = &pdev->dev;
    184	chip->irq = pci_irq_vector(pdev, 0);
    185	chip->regs = p->membase;
    186	chip->length = pci_resource_len(pdev, bar);
    187	chip->offset = DNV_DMA_CHAN_OFFSET;
    188
    189	/* Falling back to PIO mode if DMA probing fails */
    190	ret = hsu_dma_probe(chip);
    191	if (ret)
    192		return 0;
    193
    194	mid->dma_dev = pdev;
    195
    196	p->handle_irq = dnv_handle_irq;
    197	return 0;
    198}
    199
    200static void dnv_exit(struct mid8250 *mid)
    201{
    202	if (!mid->dma_dev)
    203		return;
    204	hsu_dma_remove(&mid->dma_chip);
    205}
    206
    207/*****************************************************************************/
    208
    209static void mid8250_set_termios(struct uart_port *p,
    210				struct ktermios *termios,
    211				struct ktermios *old)
    212{
    213	unsigned int baud = tty_termios_baud_rate(termios);
    214	struct mid8250 *mid = p->private_data;
    215	unsigned short ps = 16;
    216	unsigned long fuart = baud * ps;
    217	unsigned long w = BIT(24) - 1;
    218	unsigned long mul, div;
    219
    220	/* Gracefully handle the B0 case: fall back to B9600 */
    221	fuart = fuart ? fuart : 9600 * 16;
    222
    223	if (mid->board->freq < fuart) {
    224		/* Find prescaler value that satisfies Fuart < Fref */
    225		if (mid->board->freq > baud)
    226			ps = mid->board->freq / baud;	/* baud rate too high */
    227		else
    228			ps = 1;				/* PLL case */
    229		fuart = baud * ps;
    230	} else {
    231		/* Get Fuart closer to Fref */
    232		fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
    233	}
    234
    235	rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
    236	p->uartclk = fuart * 16 / ps;		/* core uses ps = 16 always */
    237
    238	writel(ps, p->membase + INTEL_MID_UART_PS);		/* set PS */
    239	writel(mul, p->membase + INTEL_MID_UART_MUL);		/* set MUL */
    240	writel(div, p->membase + INTEL_MID_UART_DIV);
    241
    242	serial8250_do_set_termios(p, termios, old);
    243}
    244
    245static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
    246{
    247	struct hsu_dma_slave *s = param;
    248
    249	if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
    250		return false;
    251
    252	chan->private = s;
    253	return true;
    254}
    255
    256static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
    257{
    258	struct uart_8250_dma *dma = &mid->dma;
    259	struct device *dev = port->port.dev;
    260	struct hsu_dma_slave *rx_param;
    261	struct hsu_dma_slave *tx_param;
    262
    263	if (!mid->dma_dev)
    264		return 0;
    265
    266	rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
    267	if (!rx_param)
    268		return -ENOMEM;
    269
    270	tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
    271	if (!tx_param)
    272		return -ENOMEM;
    273
    274	rx_param->chan_id = mid->dma_index * 2 + 1;
    275	tx_param->chan_id = mid->dma_index * 2;
    276
    277	dma->rxconf.src_maxburst = 64;
    278	dma->txconf.dst_maxburst = 64;
    279
    280	rx_param->dma_dev = &mid->dma_dev->dev;
    281	tx_param->dma_dev = &mid->dma_dev->dev;
    282
    283	dma->fn = mid8250_dma_filter;
    284	dma->rx_param = rx_param;
    285	dma->tx_param = tx_param;
    286
    287	port->dma = dma;
    288	return 0;
    289}
    290
    291static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
    292{
    293	struct uart_8250_port uart;
    294	struct mid8250 *mid;
    295	unsigned int bar;
    296	int ret;
    297
    298	ret = pcim_enable_device(pdev);
    299	if (ret)
    300		return ret;
    301
    302	mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
    303	if (!mid)
    304		return -ENOMEM;
    305
    306	mid->board = (struct mid8250_board *)id->driver_data;
    307	bar = FL_GET_BASE(mid->board->flags);
    308
    309	memset(&uart, 0, sizeof(struct uart_8250_port));
    310
    311	uart.port.dev = &pdev->dev;
    312	uart.port.irq = pdev->irq;
    313	uart.port.private_data = mid;
    314	uart.port.type = PORT_16750;
    315	uart.port.iotype = UPIO_MEM;
    316	uart.port.uartclk = mid->board->base_baud * 16;
    317	uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
    318	uart.port.set_termios = mid8250_set_termios;
    319
    320	uart.port.mapbase = pci_resource_start(pdev, bar);
    321	uart.port.membase = pcim_iomap(pdev, bar, 0);
    322	if (!uart.port.membase)
    323		return -ENOMEM;
    324
    325	ret = mid->board->setup(mid, &uart.port);
    326	if (ret)
    327		return ret;
    328
    329	ret = mid8250_dma_setup(mid, &uart);
    330	if (ret)
    331		goto err;
    332
    333	ret = serial8250_register_8250_port(&uart);
    334	if (ret < 0)
    335		goto err;
    336
    337	mid->line = ret;
    338
    339	pci_set_drvdata(pdev, mid);
    340	return 0;
    341
    342err:
    343	mid->board->exit(mid);
    344	return ret;
    345}
    346
    347static void mid8250_remove(struct pci_dev *pdev)
    348{
    349	struct mid8250 *mid = pci_get_drvdata(pdev);
    350
    351	serial8250_unregister_port(mid->line);
    352
    353	mid->board->exit(mid);
    354}
    355
    356static const struct mid8250_board pnw_board = {
    357	.flags = FL_BASE0,
    358	.freq = 50000000,
    359	.base_baud = 115200,
    360	.setup = pnw_setup,
    361	.exit = pnw_exit,
    362};
    363
    364static const struct mid8250_board tng_board = {
    365	.flags = FL_BASE0,
    366	.freq = 38400000,
    367	.base_baud = 1843200,
    368	.setup = tng_setup,
    369	.exit = tng_exit,
    370};
    371
    372static const struct mid8250_board dnv_board = {
    373	.flags = FL_BASE1,
    374	.freq = 133333333,
    375	.base_baud = 115200,
    376	.setup = dnv_setup,
    377	.exit = dnv_exit,
    378};
    379
    380static const struct pci_device_id pci_ids[] = {
    381	{ PCI_DEVICE_DATA(INTEL, PNW_UART1, &pnw_board) },
    382	{ PCI_DEVICE_DATA(INTEL, PNW_UART2, &pnw_board) },
    383	{ PCI_DEVICE_DATA(INTEL, PNW_UART3, &pnw_board) },
    384	{ PCI_DEVICE_DATA(INTEL, TNG_UART, &tng_board) },
    385	{ PCI_DEVICE_DATA(INTEL, CDF_UART, &dnv_board) },
    386	{ PCI_DEVICE_DATA(INTEL, DNV_UART, &dnv_board) },
    387	{ }
    388};
    389MODULE_DEVICE_TABLE(pci, pci_ids);
    390
    391static struct pci_driver mid8250_pci_driver = {
    392	.name           = "8250_mid",
    393	.id_table       = pci_ids,
    394	.probe          = mid8250_probe,
    395	.remove         = mid8250_remove,
    396};
    397
    398module_pci_driver(mid8250_pci_driver);
    399
    400MODULE_AUTHOR("Intel Corporation");
    401MODULE_LICENSE("GPL v2");
    402MODULE_DESCRIPTION("Intel MID UART driver");