digicolor-usart.c (14274B)
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Driver for Conexant Digicolor serial ports (USART) 4 * 5 * Author: Baruch Siach <baruch@tkos.co.il> 6 * 7 * Copyright (C) 2014 Paradox Innovation Ltd. 8 */ 9 10#include <linux/module.h> 11#include <linux/console.h> 12#include <linux/serial_core.h> 13#include <linux/serial.h> 14#include <linux/clk.h> 15#include <linux/io.h> 16#include <linux/tty.h> 17#include <linux/tty_flip.h> 18#include <linux/of.h> 19#include <linux/platform_device.h> 20#include <linux/workqueue.h> 21 22#define UA_ENABLE 0x00 23#define UA_ENABLE_ENABLE BIT(0) 24 25#define UA_CONTROL 0x01 26#define UA_CONTROL_RX_ENABLE BIT(0) 27#define UA_CONTROL_TX_ENABLE BIT(1) 28#define UA_CONTROL_SOFT_RESET BIT(2) 29 30#define UA_STATUS 0x02 31#define UA_STATUS_PARITY_ERR BIT(0) 32#define UA_STATUS_FRAME_ERR BIT(1) 33#define UA_STATUS_OVERRUN_ERR BIT(2) 34#define UA_STATUS_TX_READY BIT(6) 35 36#define UA_CONFIG 0x03 37#define UA_CONFIG_CHAR_LEN BIT(0) 38#define UA_CONFIG_STOP_BITS BIT(1) 39#define UA_CONFIG_PARITY BIT(2) 40#define UA_CONFIG_ODD_PARITY BIT(4) 41 42#define UA_EMI_REC 0x04 43 44#define UA_HBAUD_LO 0x08 45#define UA_HBAUD_HI 0x09 46 47#define UA_STATUS_FIFO 0x0a 48#define UA_STATUS_FIFO_RX_EMPTY BIT(2) 49#define UA_STATUS_FIFO_RX_INT_ALMOST BIT(3) 50#define UA_STATUS_FIFO_TX_FULL BIT(4) 51#define UA_STATUS_FIFO_TX_INT_ALMOST BIT(7) 52 53#define UA_CONFIG_FIFO 0x0b 54#define UA_CONFIG_FIFO_RX_THRESH 7 55#define UA_CONFIG_FIFO_RX_FIFO_MODE BIT(3) 56#define UA_CONFIG_FIFO_TX_FIFO_MODE BIT(7) 57 58#define UA_INTFLAG_CLEAR 0x1c 59#define UA_INTFLAG_SET 0x1d 60#define UA_INT_ENABLE 0x1e 61#define UA_INT_STATUS 0x1f 62 63#define UA_INT_TX BIT(0) 64#define UA_INT_RX BIT(1) 65 66#define DIGICOLOR_USART_NR 3 67 68/* 69 * We use the 16 bytes hardware FIFO to buffer Rx traffic. Rx interrupt is 70 * only produced when the FIFO is filled more than a certain configurable 71 * threshold. Unfortunately, there is no way to set this threshold below half 72 * FIFO. This means that we must periodically poll the FIFO status register to 73 * see whether there are waiting Rx bytes. 74 */ 75 76struct digicolor_port { 77 struct uart_port port; 78 struct delayed_work rx_poll_work; 79}; 80 81static struct uart_port *digicolor_ports[DIGICOLOR_USART_NR]; 82 83static bool digicolor_uart_tx_full(struct uart_port *port) 84{ 85 return !!(readb_relaxed(port->membase + UA_STATUS_FIFO) & 86 UA_STATUS_FIFO_TX_FULL); 87} 88 89static bool digicolor_uart_rx_empty(struct uart_port *port) 90{ 91 return !!(readb_relaxed(port->membase + UA_STATUS_FIFO) & 92 UA_STATUS_FIFO_RX_EMPTY); 93} 94 95static void digicolor_uart_stop_tx(struct uart_port *port) 96{ 97 u8 int_enable = readb_relaxed(port->membase + UA_INT_ENABLE); 98 99 int_enable &= ~UA_INT_TX; 100 writeb_relaxed(int_enable, port->membase + UA_INT_ENABLE); 101} 102 103static void digicolor_uart_start_tx(struct uart_port *port) 104{ 105 u8 int_enable = readb_relaxed(port->membase + UA_INT_ENABLE); 106 107 int_enable |= UA_INT_TX; 108 writeb_relaxed(int_enable, port->membase + UA_INT_ENABLE); 109} 110 111static void digicolor_uart_stop_rx(struct uart_port *port) 112{ 113 u8 int_enable = readb_relaxed(port->membase + UA_INT_ENABLE); 114 115 int_enable &= ~UA_INT_RX; 116 writeb_relaxed(int_enable, port->membase + UA_INT_ENABLE); 117} 118 119static void digicolor_rx_poll(struct work_struct *work) 120{ 121 struct digicolor_port *dp = 122 container_of(to_delayed_work(work), 123 struct digicolor_port, rx_poll_work); 124 125 if (!digicolor_uart_rx_empty(&dp->port)) 126 /* force RX interrupt */ 127 writeb_relaxed(UA_INT_RX, dp->port.membase + UA_INTFLAG_SET); 128 129 schedule_delayed_work(&dp->rx_poll_work, msecs_to_jiffies(100)); 130} 131 132static void digicolor_uart_rx(struct uart_port *port) 133{ 134 unsigned long flags; 135 136 spin_lock_irqsave(&port->lock, flags); 137 138 while (1) { 139 u8 status, ch; 140 unsigned int ch_flag; 141 142 if (digicolor_uart_rx_empty(port)) 143 break; 144 145 ch = readb_relaxed(port->membase + UA_EMI_REC); 146 status = readb_relaxed(port->membase + UA_STATUS); 147 148 port->icount.rx++; 149 ch_flag = TTY_NORMAL; 150 151 if (status) { 152 if (status & UA_STATUS_PARITY_ERR) 153 port->icount.parity++; 154 else if (status & UA_STATUS_FRAME_ERR) 155 port->icount.frame++; 156 else if (status & UA_STATUS_OVERRUN_ERR) 157 port->icount.overrun++; 158 159 status &= port->read_status_mask; 160 161 if (status & UA_STATUS_PARITY_ERR) 162 ch_flag = TTY_PARITY; 163 else if (status & UA_STATUS_FRAME_ERR) 164 ch_flag = TTY_FRAME; 165 else if (status & UA_STATUS_OVERRUN_ERR) 166 ch_flag = TTY_OVERRUN; 167 } 168 169 if (status & port->ignore_status_mask) 170 continue; 171 172 uart_insert_char(port, status, UA_STATUS_OVERRUN_ERR, ch, 173 ch_flag); 174 } 175 176 spin_unlock_irqrestore(&port->lock, flags); 177 178 tty_flip_buffer_push(&port->state->port); 179} 180 181static void digicolor_uart_tx(struct uart_port *port) 182{ 183 struct circ_buf *xmit = &port->state->xmit; 184 unsigned long flags; 185 186 if (digicolor_uart_tx_full(port)) 187 return; 188 189 spin_lock_irqsave(&port->lock, flags); 190 191 if (port->x_char) { 192 writeb_relaxed(port->x_char, port->membase + UA_EMI_REC); 193 port->icount.tx++; 194 port->x_char = 0; 195 goto out; 196 } 197 198 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 199 digicolor_uart_stop_tx(port); 200 goto out; 201 } 202 203 while (!uart_circ_empty(xmit)) { 204 writeb(xmit->buf[xmit->tail], port->membase + UA_EMI_REC); 205 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 206 port->icount.tx++; 207 208 if (digicolor_uart_tx_full(port)) 209 break; 210 } 211 212 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 213 uart_write_wakeup(port); 214 215out: 216 spin_unlock_irqrestore(&port->lock, flags); 217} 218 219static irqreturn_t digicolor_uart_int(int irq, void *dev_id) 220{ 221 struct uart_port *port = dev_id; 222 u8 int_status = readb_relaxed(port->membase + UA_INT_STATUS); 223 224 writeb_relaxed(UA_INT_RX | UA_INT_TX, 225 port->membase + UA_INTFLAG_CLEAR); 226 227 if (int_status & UA_INT_RX) 228 digicolor_uart_rx(port); 229 if (int_status & UA_INT_TX) 230 digicolor_uart_tx(port); 231 232 return IRQ_HANDLED; 233} 234 235static unsigned int digicolor_uart_tx_empty(struct uart_port *port) 236{ 237 u8 status = readb_relaxed(port->membase + UA_STATUS); 238 239 return (status & UA_STATUS_TX_READY) ? TIOCSER_TEMT : 0; 240} 241 242static unsigned int digicolor_uart_get_mctrl(struct uart_port *port) 243{ 244 return TIOCM_CTS; 245} 246 247static void digicolor_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 248{ 249} 250 251static void digicolor_uart_break_ctl(struct uart_port *port, int state) 252{ 253} 254 255static int digicolor_uart_startup(struct uart_port *port) 256{ 257 struct digicolor_port *dp = 258 container_of(port, struct digicolor_port, port); 259 260 writeb_relaxed(UA_ENABLE_ENABLE, port->membase + UA_ENABLE); 261 writeb_relaxed(UA_CONTROL_SOFT_RESET, port->membase + UA_CONTROL); 262 writeb_relaxed(0, port->membase + UA_CONTROL); 263 264 writeb_relaxed(UA_CONFIG_FIFO_RX_FIFO_MODE 265 | UA_CONFIG_FIFO_TX_FIFO_MODE | UA_CONFIG_FIFO_RX_THRESH, 266 port->membase + UA_CONFIG_FIFO); 267 writeb_relaxed(UA_STATUS_FIFO_RX_INT_ALMOST, 268 port->membase + UA_STATUS_FIFO); 269 writeb_relaxed(UA_CONTROL_RX_ENABLE | UA_CONTROL_TX_ENABLE, 270 port->membase + UA_CONTROL); 271 writeb_relaxed(UA_INT_TX | UA_INT_RX, 272 port->membase + UA_INT_ENABLE); 273 274 schedule_delayed_work(&dp->rx_poll_work, msecs_to_jiffies(100)); 275 276 return 0; 277} 278 279static void digicolor_uart_shutdown(struct uart_port *port) 280{ 281 struct digicolor_port *dp = 282 container_of(port, struct digicolor_port, port); 283 284 writeb_relaxed(0, port->membase + UA_ENABLE); 285 cancel_delayed_work_sync(&dp->rx_poll_work); 286} 287 288static void digicolor_uart_set_termios(struct uart_port *port, 289 struct ktermios *termios, 290 struct ktermios *old) 291{ 292 unsigned int baud, divisor; 293 u8 config = 0; 294 unsigned long flags; 295 296 /* Mask termios capabilities we don't support */ 297 termios->c_cflag &= ~CMSPAR; 298 termios->c_iflag &= ~(BRKINT | IGNBRK); 299 300 /* Limit baud rates so that we don't need the fractional divider */ 301 baud = uart_get_baud_rate(port, termios, old, 302 port->uartclk / (0x10000*16), 303 port->uartclk / 256); 304 divisor = uart_get_divisor(port, baud) - 1; 305 306 switch (termios->c_cflag & CSIZE) { 307 case CS7: 308 break; 309 case CS8: 310 default: 311 config |= UA_CONFIG_CHAR_LEN; 312 termios->c_cflag &= ~CSIZE; 313 termios->c_cflag |= CS8; 314 break; 315 } 316 317 if (termios->c_cflag & CSTOPB) 318 config |= UA_CONFIG_STOP_BITS; 319 320 if (termios->c_cflag & PARENB) { 321 config |= UA_CONFIG_PARITY; 322 if (termios->c_cflag & PARODD) 323 config |= UA_CONFIG_ODD_PARITY; 324 } 325 326 /* Set read status mask */ 327 port->read_status_mask = UA_STATUS_OVERRUN_ERR; 328 if (termios->c_iflag & INPCK) 329 port->read_status_mask |= UA_STATUS_PARITY_ERR 330 | UA_STATUS_FRAME_ERR; 331 332 /* Set status ignore mask */ 333 port->ignore_status_mask = 0; 334 if (!(termios->c_cflag & CREAD)) 335 port->ignore_status_mask |= UA_STATUS_OVERRUN_ERR 336 | UA_STATUS_PARITY_ERR | UA_STATUS_FRAME_ERR; 337 338 spin_lock_irqsave(&port->lock, flags); 339 340 uart_update_timeout(port, termios->c_cflag, baud); 341 342 writeb_relaxed(config, port->membase + UA_CONFIG); 343 writeb_relaxed(divisor & 0xff, port->membase + UA_HBAUD_LO); 344 writeb_relaxed(divisor >> 8, port->membase + UA_HBAUD_HI); 345 346 spin_unlock_irqrestore(&port->lock, flags); 347} 348 349static const char *digicolor_uart_type(struct uart_port *port) 350{ 351 return (port->type == PORT_DIGICOLOR) ? "DIGICOLOR USART" : NULL; 352} 353 354static void digicolor_uart_config_port(struct uart_port *port, int flags) 355{ 356 if (flags & UART_CONFIG_TYPE) 357 port->type = PORT_DIGICOLOR; 358} 359 360static void digicolor_uart_release_port(struct uart_port *port) 361{ 362} 363 364static int digicolor_uart_request_port(struct uart_port *port) 365{ 366 return 0; 367} 368 369static const struct uart_ops digicolor_uart_ops = { 370 .tx_empty = digicolor_uart_tx_empty, 371 .set_mctrl = digicolor_uart_set_mctrl, 372 .get_mctrl = digicolor_uart_get_mctrl, 373 .stop_tx = digicolor_uart_stop_tx, 374 .start_tx = digicolor_uart_start_tx, 375 .stop_rx = digicolor_uart_stop_rx, 376 .break_ctl = digicolor_uart_break_ctl, 377 .startup = digicolor_uart_startup, 378 .shutdown = digicolor_uart_shutdown, 379 .set_termios = digicolor_uart_set_termios, 380 .type = digicolor_uart_type, 381 .config_port = digicolor_uart_config_port, 382 .release_port = digicolor_uart_release_port, 383 .request_port = digicolor_uart_request_port, 384}; 385 386static void digicolor_uart_console_putchar(struct uart_port *port, unsigned char ch) 387{ 388 while (digicolor_uart_tx_full(port)) 389 cpu_relax(); 390 391 writeb_relaxed(ch, port->membase + UA_EMI_REC); 392} 393 394static void digicolor_uart_console_write(struct console *co, const char *c, 395 unsigned n) 396{ 397 struct uart_port *port = digicolor_ports[co->index]; 398 u8 status; 399 unsigned long flags; 400 int locked = 1; 401 402 if (oops_in_progress) 403 locked = spin_trylock_irqsave(&port->lock, flags); 404 else 405 spin_lock_irqsave(&port->lock, flags); 406 407 uart_console_write(port, c, n, digicolor_uart_console_putchar); 408 409 if (locked) 410 spin_unlock_irqrestore(&port->lock, flags); 411 412 /* Wait for transmitter to become empty */ 413 do { 414 status = readb_relaxed(port->membase + UA_STATUS); 415 } while ((status & UA_STATUS_TX_READY) == 0); 416} 417 418static int digicolor_uart_console_setup(struct console *co, char *options) 419{ 420 int baud = 115200, bits = 8, parity = 'n', flow = 'n'; 421 struct uart_port *port; 422 423 if (co->index < 0 || co->index >= DIGICOLOR_USART_NR) 424 return -EINVAL; 425 426 port = digicolor_ports[co->index]; 427 if (!port) 428 return -ENODEV; 429 430 if (options) 431 uart_parse_options(options, &baud, &parity, &bits, &flow); 432 433 return uart_set_options(port, co, baud, parity, bits, flow); 434} 435 436static struct console digicolor_console = { 437 .name = "ttyS", 438 .device = uart_console_device, 439 .write = digicolor_uart_console_write, 440 .setup = digicolor_uart_console_setup, 441 .flags = CON_PRINTBUFFER, 442 .index = -1, 443}; 444 445static struct uart_driver digicolor_uart = { 446 .driver_name = "digicolor-usart", 447 .dev_name = "ttyS", 448 .nr = DIGICOLOR_USART_NR, 449}; 450 451static int digicolor_uart_probe(struct platform_device *pdev) 452{ 453 struct device_node *np = pdev->dev.of_node; 454 int irq, ret, index; 455 struct digicolor_port *dp; 456 struct resource *res; 457 struct clk *uart_clk; 458 459 if (!np) { 460 dev_err(&pdev->dev, "Missing device tree node\n"); 461 return -ENXIO; 462 } 463 464 index = of_alias_get_id(np, "serial"); 465 if (index < 0 || index >= DIGICOLOR_USART_NR) 466 return -EINVAL; 467 468 dp = devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL); 469 if (!dp) 470 return -ENOMEM; 471 472 uart_clk = devm_clk_get(&pdev->dev, NULL); 473 if (IS_ERR(uart_clk)) 474 return PTR_ERR(uart_clk); 475 476 dp->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 477 if (IS_ERR(dp->port.membase)) 478 return PTR_ERR(dp->port.membase); 479 dp->port.mapbase = res->start; 480 481 irq = platform_get_irq(pdev, 0); 482 if (irq < 0) 483 return irq; 484 dp->port.irq = irq; 485 486 dp->port.iotype = UPIO_MEM; 487 dp->port.uartclk = clk_get_rate(uart_clk); 488 dp->port.fifosize = 16; 489 dp->port.dev = &pdev->dev; 490 dp->port.ops = &digicolor_uart_ops; 491 dp->port.line = index; 492 dp->port.type = PORT_DIGICOLOR; 493 spin_lock_init(&dp->port.lock); 494 495 digicolor_ports[index] = &dp->port; 496 platform_set_drvdata(pdev, &dp->port); 497 498 INIT_DELAYED_WORK(&dp->rx_poll_work, digicolor_rx_poll); 499 500 ret = devm_request_irq(&pdev->dev, dp->port.irq, digicolor_uart_int, 0, 501 dev_name(&pdev->dev), &dp->port); 502 if (ret) 503 return ret; 504 505 return uart_add_one_port(&digicolor_uart, &dp->port); 506} 507 508static int digicolor_uart_remove(struct platform_device *pdev) 509{ 510 struct uart_port *port = platform_get_drvdata(pdev); 511 512 uart_remove_one_port(&digicolor_uart, port); 513 514 return 0; 515} 516 517static const struct of_device_id digicolor_uart_dt_ids[] = { 518 { .compatible = "cnxt,cx92755-usart", }, 519 { } 520}; 521MODULE_DEVICE_TABLE(of, digicolor_uart_dt_ids); 522 523static struct platform_driver digicolor_uart_platform = { 524 .driver = { 525 .name = "digicolor-usart", 526 .of_match_table = of_match_ptr(digicolor_uart_dt_ids), 527 }, 528 .probe = digicolor_uart_probe, 529 .remove = digicolor_uart_remove, 530}; 531 532static int __init digicolor_uart_init(void) 533{ 534 int ret; 535 536 if (IS_ENABLED(CONFIG_SERIAL_CONEXANT_DIGICOLOR_CONSOLE)) { 537 digicolor_uart.cons = &digicolor_console; 538 digicolor_console.data = &digicolor_uart; 539 } 540 541 ret = uart_register_driver(&digicolor_uart); 542 if (ret) 543 return ret; 544 545 ret = platform_driver_register(&digicolor_uart_platform); 546 if (ret) 547 uart_unregister_driver(&digicolor_uart); 548 549 return ret; 550} 551module_init(digicolor_uart_init); 552 553static void __exit digicolor_uart_exit(void) 554{ 555 platform_driver_unregister(&digicolor_uart_platform); 556 uart_unregister_driver(&digicolor_uart); 557} 558module_exit(digicolor_uart_exit); 559 560MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 561MODULE_DESCRIPTION("Conexant Digicolor USART serial driver"); 562MODULE_LICENSE("GPL");